Documentation/devicetree/bindings/power/reset/ocelot-reset.txt

   1 Microsemi Ocelot reset controller
   2
   3 The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the
   4 SoC MIPS core.
   5
   6 Required Properties:
   7  - compatible: "mscc,ocelot-chip-reset"
   8
   9 Example:
  10         reset@1070008 {
  11                 compatible = "mscc,ocelot-chip-reset";
  12                 reg = <0x1070008 0x4>;
  13         };
  14