2 * Copyright (C) 2014-2017 Phytec Messtechnik GmbH
3 * Author: Wadim Egorov <w.egorov@phytec.de>
4 * Teresa Remmet <t.remmet@phytec.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <dt-bindings/input/input.h>
14 model = "Phytec AM335x PCM-953";
15 compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";
18 vcc3v3: fixedregulator1 {
19 compatible = "regulator-fixed";
20 regulator-name = "vcc3v3";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
26 vcc1v8: fixedregulator2 {
27 compatible = "regulator-fixed";
28 regulator-name = "vcc1v8";
29 regulator-min-microvolt = <1800000>;
30 regulator-max-microvolt = <1800000>;
35 user_leds: user_leds {
36 compatible = "gpio-leds";
37 pinctrl-names = "default";
38 pinctrl-0 = <&user_leds_pins>;
42 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
43 linux,default-trigger = "gpio";
48 label = "yellow:user";
49 gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
50 linux,default-trigger = "gpio";
55 user_buttons: user_buttons {
56 compatible = "gpio-keys";
57 pinctrl-names = "default";
58 pinctrl-0 = <&user_buttons_pins>;
62 linux,code = <KEY_HOME>;
63 gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
69 linux,code = <KEY_MENU>;
70 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
78 user_buttons_pins: pinmux_user_buttons {
79 pinctrl-single,pins = <
80 AM33XX_IOPAD(0x9e4, PIN_INPUT_PULLDOWN | MUX_MODE7) /* emu0.gpio3_7 */
81 AM33XX_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7) /* emu1.gpio3_8 */
85 user_leds_pins: pinmux_user_leds {
86 pinctrl-single,pins = <
87 AM33XX_IOPAD(0x880, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
88 AM33XX_IOPAD(0x884, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
95 dcan1_pins: pinmux_dcan1 {
96 pinctrl-single,pins = <
97 AM33XX_IOPAD(0x980, PIN_OUTPUT_PULLUP | MUX_MODE2) /* uart1_rxd.dcan1_tx_mux2 */
98 AM33XX_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.dcan1_rx_mux2 */
104 pinctrl-names = "default";
105 pinctrl-0 = <&dcan1_pins>;
111 ethernet1_pins: pinmux_ethernet1 {
112 pinctrl-single,pins = <
113 AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
114 AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
115 AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
116 AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
117 AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
118 AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
119 AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
120 AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
121 AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
122 AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
123 AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
124 AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
130 phy-handle = <&phy1>;
131 phy-mode = "rgmii-id";
132 dual_emac_res_vlan = <2>;
137 phy1: ethernet-phy@2 {
140 /* Register 260 (104h) – RGMII Clock and Control Pad Skew */
141 rxc-skew-ps = <1400>;
143 txc-skew-ps = <1400>;
145 /* Register 261 (105h) – RGMII RX Data Pad Skew */
150 /* Register 262 (106h) – RGMII TX Data Pad Skew */
160 pinctrl-names = "default";
161 pinctrl-0 = <ðernet0_pins ðernet1_pins>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&cb_gpio_pins>;
170 cb_gpio_pins: pinmux_cb_gpio {
171 pinctrl-single,pins = <
172 AM33XX_IOPAD(0x968, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart0_ctsn.gpio1_8 */
173 AM33XX_IOPAD(0x96c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* uart0_rtsn.gpio1_9 */
180 mmc1_pins: pinmux_mmc1_pins {
181 pinctrl-single,pins = <
182 AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
183 AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
184 AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
185 AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
186 AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
187 AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
188 AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
194 vmmc-supply = <&vcc3v3>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&mmc1_pins>;
198 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
204 uart0_pins: pinmux_uart0 {
205 pinctrl-single,pins = <
206 AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
207 AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
211 uart1_pins: pinmux_uart1 {
212 pinctrl-single,pins = <
213 AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
214 AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
215 AM33XX_IOPAD(0x978, PIN_INPUT | MUX_MODE0) /* uart1_ctsn.uart1_ctsn */
216 AM33XX_IOPAD(0x97c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_rtsn.uart1_rtsn */
220 uart2_pins: pinmux_uart2 {
221 pinctrl-single,pins = <
222 AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
223 AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rx_clk.uart2_txd */
227 uart3_pins: pinmux_uart3 {
228 pinctrl-single,pins = <
229 AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE1) /* mii1_rxd3.uart3_rxd */
230 AM33XX_IOPAD(0x938, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd2.uart3_txd */
236 pinctrl-names = "default";
237 pinctrl-0 = <&uart0_pins>;
242 pinctrl-names = "default";
243 pinctrl-0 = <&uart1_pins>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&uart2_pins>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&uart3_pins>;