GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / am437x-gp-evm.dts
1 /*
2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 /* AM437x GP EVM */
10
11 /dts-v1/;
12
13 #include "am4372.dtsi"
14 #include <dt-bindings/pinctrl/am43xx.h>
15 #include <dt-bindings/pwm/pwm.h>
16 #include <dt-bindings/gpio/gpio.h>
17
18 / {
19         model = "TI AM437x GP EVM";
20         compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
21
22         aliases {
23                 display0 = &lcd0;
24         };
25
26         chosen {
27                 stdout-path = &uart0;
28         };
29
30         evm_v3_3d: fixedregulator-v3_3d {
31                 compatible = "regulator-fixed";
32                 regulator-name = "evm_v3_3d";
33                 regulator-min-microvolt = <3300000>;
34                 regulator-max-microvolt = <3300000>;
35                 enable-active-high;
36         };
37
38         vtt_fixed: fixedregulator-vtt {
39                 compatible = "regulator-fixed";
40                 regulator-name = "vtt_fixed";
41                 regulator-min-microvolt = <1500000>;
42                 regulator-max-microvolt = <1500000>;
43                 regulator-always-on;
44                 regulator-boot-on;
45                 enable-active-high;
46                 gpio = <&gpio5 7 GPIO_ACTIVE_HIGH>;
47         };
48
49         vmmcwl_fixed: fixedregulator-mmcwl {
50                 compatible = "regulator-fixed";
51                 regulator-name = "vmmcwl_fixed";
52                 regulator-min-microvolt = <1800000>;
53                 regulator-max-microvolt = <1800000>;
54                 gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
55                 enable-active-high;
56         };
57
58         lcd_bl: backlight {
59                 compatible = "pwm-backlight";
60                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
61                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
62                 default-brightness-level = <8>;
63         };
64
65         matrix_keypad: matrix_keypad0 {
66                 compatible = "gpio-matrix-keypad";
67                 debounce-delay-ms = <5>;
68                 col-scan-delay-us = <2>;
69
70                 row-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH /* Bank3, pin21 */
71                                 &gpio4 3 GPIO_ACTIVE_HIGH /* Bank4, pin3 */
72                                 &gpio4 2 GPIO_ACTIVE_HIGH>; /* Bank4, pin2 */
73
74                 col-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH /* Bank3, pin19 */
75                                 &gpio3 20 GPIO_ACTIVE_HIGH>; /* Bank3, pin20 */
76
77                 linux,keymap = <0x00000201      /* P1 */
78                                 0x00010202      /* P2 */
79                                 0x01000067      /* UP */
80                                 0x0101006a      /* RIGHT */
81                                 0x02000069      /* LEFT */
82                                 0x0201006c>;      /* DOWN */
83                 };
84
85         lcd0: display {
86                 compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
87                 label = "lcd";
88
89                 backlight = <&lcd_bl>;
90
91                 panel-timing {
92                         clock-frequency = <33000000>;
93                         hactive = <800>;
94                         vactive = <480>;
95                         hfront-porch = <210>;
96                         hback-porch = <16>;
97                         hsync-len = <30>;
98                         vback-porch = <10>;
99                         vfront-porch = <22>;
100                         vsync-len = <13>;
101                         hsync-active = <0>;
102                         vsync-active = <0>;
103                         de-active = <1>;
104                         pixelclk-active = <1>;
105                 };
106
107                 port {
108                         lcd_in: endpoint {
109                                 remote-endpoint = <&dpi_out>;
110                         };
111                 };
112         };
113
114         /* fixed 12MHz oscillator */
115         refclk: oscillator {
116                 #clock-cells = <0>;
117                 compatible = "fixed-clock";
118                 clock-frequency = <12000000>;
119         };
120
121         /* fixed 32k external oscillator clock */
122         clk_32k_rtc: clk_32k_rtc {
123                 #clock-cells = <0>;
124                 compatible = "fixed-clock";
125                 clock-frequency = <32768>;
126         };
127
128         sound0: sound0 {
129                 compatible = "simple-audio-card";
130                 simple-audio-card,name = "AM437x-GP-EVM";
131                 simple-audio-card,widgets =
132                         "Headphone", "Headphone Jack",
133                         "Line", "Line In";
134                 simple-audio-card,routing =
135                         "Headphone Jack",       "HPLOUT",
136                         "Headphone Jack",       "HPROUT",
137                         "LINE1L",               "Line In",
138                         "LINE1R",               "Line In";
139                 simple-audio-card,format = "dsp_b";
140                 simple-audio-card,bitclock-master = <&sound0_master>;
141                 simple-audio-card,frame-master = <&sound0_master>;
142                 simple-audio-card,bitclock-inversion;
143
144                 simple-audio-card,cpu {
145                         sound-dai = <&mcasp1>;
146                         system-clock-frequency = <12000000>;
147                 };
148
149                 sound0_master: simple-audio-card,codec {
150                         sound-dai = <&tlv320aic3106>;
151                         system-clock-frequency = <12000000>;
152                 };
153         };
154
155         beeper: beeper {
156                 compatible = "gpio-beeper";
157                 pinctrl-names = "default";
158                 pinctrl-0 = <&beeper_pins>;
159                 gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
160         };
161 };
162
163 &am43xx_pinmux {
164         pinctrl-names = "default", "sleep";
165         pinctrl-0 = <&wlan_pins_default>;
166         pinctrl-1 = <&wlan_pins_sleep>;
167
168         i2c0_pins: i2c0_pins {
169                 pinctrl-single,pins = <
170                         AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
171                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
172                 >;
173         };
174
175         i2c1_pins: i2c1_pins {
176                 pinctrl-single,pins = <
177                         AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
178                         AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
179                 >;
180         };
181
182         mmc1_pins: pinmux_mmc1_pins {
183                 pinctrl-single,pins = <
184                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
185                 >;
186         };
187
188         ecap0_pins: backlight_pins {
189                 pinctrl-single,pins = <
190                         AM4372_IOPAD(0x964, MUX_MODE0)       /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
191                 >;
192         };
193
194         pixcir_ts_pins: pixcir_ts_pins {
195                 pinctrl-single,pins = <
196                         AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP | MUX_MODE7)  /* spi2_d0.gpio3_22 */
197                 >;
198         };
199
200         cpsw_default: cpsw_default {
201                 pinctrl-single,pins = <
202                         /* Slave 1 */
203                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_txen */
204                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rxctl */
205                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd3 */
206                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd2 */
207                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_txd1 */
208                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_txd0 */
209                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rmii1_tclk */
210                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
211                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd3 */
212                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd2 */
213                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rxd1 */
214                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rxd0 */
215                 >;
216         };
217
218         cpsw_sleep: cpsw_sleep {
219                 pinctrl-single,pins = <
220                         /* Slave 1 reset value */
221                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
222                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
223                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
224                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
225                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
226                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
227                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
228                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
229                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
230                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
231                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
232                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
233                 >;
234         };
235
236         davinci_mdio_default: davinci_mdio_default {
237                 pinctrl-single,pins = <
238                         /* MDIO */
239                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
240                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
241                 >;
242         };
243
244         davinci_mdio_sleep: davinci_mdio_sleep {
245                 pinctrl-single,pins = <
246                         /* MDIO reset value */
247                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
248                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
249                 >;
250         };
251
252         nand_flash_x8: nand_flash_x8 {
253                 pinctrl-single,pins = <
254                         AM4372_IOPAD(0x800, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
255                         AM4372_IOPAD(0x804, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
256                         AM4372_IOPAD(0x808, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
257                         AM4372_IOPAD(0x80c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
258                         AM4372_IOPAD(0x810, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
259                         AM4372_IOPAD(0x814, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
260                         AM4372_IOPAD(0x818, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
261                         AM4372_IOPAD(0x81c, PIN_INPUT  | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
262                         AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
263                         AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
264                         AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
265                         AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
266                         AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
267                         AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
268                         AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
269                 >;
270         };
271
272         dss_pins: dss_pins {
273                 pinctrl-single,pins = <
274                         AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
275                         AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
276                         AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
277                         AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
278                         AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
279                         AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
280                         AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
281                         AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
282                         AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
283                         AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
284                         AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
285                         AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
286                         AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
287                         AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
288                         AM4372_IOPAD(0x8b8, PIN_OUTPUT_PULLUP | MUX_MODE0)
289                         AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
290                         AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
291                         AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
292                         AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
293                         AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
294                         AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
295                         AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
296                         AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
297                         AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
298                         AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
299                         AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
300                         AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
301                         AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
302
303                 >;
304         };
305
306         display_mux_pins: display_mux_pins {
307                 pinctrl-single,pins = <
308                         /* GPIO 5_8 to select LCD / HDMI */
309                         AM4372_IOPAD(0xa38, PIN_OUTPUT_PULLUP | MUX_MODE7)
310                 >;
311         };
312
313         dcan0_default: dcan0_default_pins {
314                 pinctrl-single,pins = <
315                         AM4372_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2)             /* uart1_ctsn.d_can0_tx */
316                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_rtsn.d_can0_rx */
317                 >;
318         };
319
320         dcan0_sleep: dcan0_sleep_pins {
321                 pinctrl-single,pins = <
322                         AM4372_IOPAD(0x978, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_ctsn.gpio0_12 */
323                         AM4372_IOPAD(0x97c, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rtsn.gpio0_13 */
324                 >;
325         };
326
327         dcan1_default: dcan1_default_pins {
328                 pinctrl-single,pins = <
329                         AM4372_IOPAD(0x980, PIN_OUTPUT | MUX_MODE2)             /* uart1_rxd.d_can1_tx */
330                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE2)       /* uart1_txd.d_can1_rx */
331                 >;
332         };
333
334         dcan1_sleep: dcan1_sleep_pins {
335                 pinctrl-single,pins = <
336                         AM4372_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_rxd.gpio0_14 */
337                         AM4372_IOPAD(0x984, PIN_INPUT_PULLUP | MUX_MODE7)       /* uart1_txd.gpio0_15 */
338                 >;
339         };
340
341         vpfe0_pins_default: vpfe0_pins_default {
342                 pinctrl-single,pins = <
343                         AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
344                         AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
345                         AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
346                         AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
347                         AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
348                         AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
349                         AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
350                         AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
351                         AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
352                         AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
353                         AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
354                         AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
355                         AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
356                 >;
357         };
358
359         vpfe0_pins_sleep: vpfe0_pins_sleep {
360                 pinctrl-single,pins = <
361                         AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
362                         AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
363                         AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
364                         AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
365                         AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
366                         AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
367                         AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
368                         AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
369                         AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
370                         AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
371                         AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
372                         AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
373                         AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
374                 >;
375         };
376
377         vpfe1_pins_default: vpfe1_pins_default {
378                 pinctrl-single,pins = <
379                         AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0*/
380                         AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0*/
381                         AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0*/
382                         AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0*/
383                         AM4372_IOPAD(0x9dC, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0*/
384                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0*/
385                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0*/
386                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0*/
387                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0*/
388                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0*/
389                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0*/
390                         AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0*/
391                         AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0*/
392                 >;
393         };
394
395         vpfe1_pins_sleep: vpfe1_pins_sleep {
396                 pinctrl-single,pins = <
397                         AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data9 mode 0*/
398                         AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data8 mode 0*/
399                         AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_hd mode 0*/
400                         AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_vd mode 0*/
401                         AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_pclk mode 0*/
402                         AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data0 mode 0*/
403                         AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data1 mode 0*/
404                         AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data2 mode 0*/
405                         AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data3 mode 0*/
406                         AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data4 mode 0*/
407                         AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data5 mode 0*/
408                         AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data6 mode 0*/
409                         AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam1_data7 mode 0*/
410                 >;
411         };
412
413         mmc3_pins_default: pinmux_mmc3_pins_default {
414                 pinctrl-single,pins = <
415                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_clk.mmc2_clk */
416                         AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_csn3.mmc2_cmd */
417                         AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a1.mmc2_dat0 */
418                         AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a2.mmc2_dat1 */
419                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_a3.mmc2_dat2 */
420                         AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3)      /* gpmc_be1n.mmc2_dat3 */
421                 >;
422         };
423
424         mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
425                 pinctrl-single,pins = <
426                         AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_clk.mmc2_clk */
427                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_csn3.mmc2_cmd */
428                         AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a1.mmc2_dat0 */
429                         AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a2.mmc2_dat1 */
430                         AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_a3.mmc2_dat2 */
431                         AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7)     /* gpmc_be1n.mmc2_dat3 */
432                 >;
433         };
434
435         wlan_pins_default: pinmux_wlan_pins_default {
436                 pinctrl-single,pins = <
437                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
438                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
439                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a0.gpio1_16 BT_EN*/
440                 >;
441         };
442
443         wlan_pins_sleep: pinmux_wlan_pins_sleep {
444                 pinctrl-single,pins = <
445                         AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7)            /* gpmc_a4.gpio1_20 WL_EN */
446                         AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7)      /* gpmc_a7.gpio1_23 WL_IRQ*/
447                         AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7)              /* gpmc_a0.gpio1_16 BT_EN*/
448                 >;
449         };
450
451         uart3_pins: uart3_pins {
452                 pinctrl-single,pins = <
453                         AM4372_IOPAD(0xa28, PIN_INPUT | MUX_MODE0)              /* uart3_rxd.uart3_rxd */
454                         AM4372_IOPAD(0xa2c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_txd.uart3_txd */
455                         AM4372_IOPAD(0xa30, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart3_ctsn.uart3_ctsn */
456                         AM4372_IOPAD(0xa34, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart3_rtsn.uart3_rtsn */
457                 >;
458         };
459
460         mcasp1_pins: mcasp1_pins {
461                 pinctrl-single,pins = <
462                         AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4)    /* mii1_col.mcasp1_axr2 */
463                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_crs.mcasp1_aclkx */
464                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* mii1_rxerr.mcasp1_fsx */
465                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4)     /* rmii1_ref_clk.mcasp1_axr3 */
466                 >;
467         };
468
469         mcasp1_sleep_pins: mcasp1_sleep_pins {
470                 pinctrl-single,pins = <
471                         AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
472                         AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
473                         AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
474                         AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
475                 >;
476         };
477
478         gpio0_pins: gpio0_pins {
479                 pinctrl-single,pins = <
480                         AM4372_IOPAD(0xa6c, PIN_OUTPUT | MUX_MODE9) /* spi2_cs0.gpio0_23 SEL_eMMCorNANDn */
481                 >;
482         };
483
484         emmc_pins_default: emmc_pins_default {
485                 pinctrl-single,pins = <
486                         AM4372_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
487                         AM4372_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
488                         AM4372_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
489                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
490                         AM4372_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
491                         AM4372_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
492                         AM4372_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
493                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
494                         AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
495                         AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
496                 >;
497         };
498
499         emmc_pins_sleep: emmc_pins_sleep {
500                 pinctrl-single,pins = <
501                         AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad0.gpio1_0 */
502                         AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad1.gpio1_1 */
503                         AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad2.gpio1_2 */
504                         AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad3.gpio1_3 */
505                         AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */
506                         AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */
507                         AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */
508                         AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */
509                         AM4372_IOPAD(0x880, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn1.gpio1_30 */
510                         AM4372_IOPAD(0x884, PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_csn2.gpio1_31 */
511                 >;
512         };
513
514         uart0_pins_default: uart0_pins_default {
515                 pinctrl-single,pins = <
516                         AM4372_IOPAD(0x968, PIN_INPUT | MUX_MODE0)              /* uart0_ctsn.uart0_ctsn */
517                         AM4372_IOPAD(0x96C, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_rtsn.uart0_rtsn */
518                         AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)       /* uart0_rxd.uart0_rxd */
519                         AM4372_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)    /* uart0_txd.uart0_txd */
520                 >;
521         };
522
523         beeper_pins: beeper_pins {
524                 pinctrl-single,pins = <
525                         AM4372_IOPAD(0x9e0, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* cam1_field.gpio4_12 */
526                 >;
527         };
528
529 };
530
531 &uart0 {
532         status = "okay";
533         pinctrl-names = "default";
534         pinctrl-0 = <&uart0_pins_default>;
535 };
536
537 &i2c0 {
538         status = "okay";
539         pinctrl-names = "default";
540         pinctrl-0 = <&i2c0_pins>;
541         clock-frequency = <100000>;
542
543         tps65218: tps65218@24 {
544                 reg = <0x24>;
545                 compatible = "ti,tps65218";
546                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* NMIn */
547                 interrupt-controller;
548                 #interrupt-cells = <2>;
549
550                 dcdc1: regulator-dcdc1 {
551                         regulator-name = "vdd_core";
552                         regulator-min-microvolt = <912000>;
553                         regulator-max-microvolt = <1144000>;
554                         regulator-boot-on;
555                         regulator-always-on;
556                 };
557
558                 dcdc2: regulator-dcdc2 {
559                         regulator-name = "vdd_mpu";
560                         regulator-min-microvolt = <912000>;
561                         regulator-max-microvolt = <1378000>;
562                         regulator-boot-on;
563                         regulator-always-on;
564                 };
565
566                 dcdc3: regulator-dcdc3 {
567                         regulator-name = "vdcdc3";
568                         regulator-boot-on;
569                         regulator-always-on;
570                         regulator-state-mem {
571                                 regulator-on-in-suspend;
572                         };
573                         regulator-state-disk {
574                                 regulator-off-in-suspend;
575                         };
576                 };
577
578                 dcdc5: regulator-dcdc5 {
579                         regulator-name = "v1_0bat";
580                         regulator-min-microvolt = <1000000>;
581                         regulator-max-microvolt = <1000000>;
582                         regulator-boot-on;
583                         regulator-always-on;
584                         regulator-state-mem {
585                                 regulator-on-in-suspend;
586                         };
587                 };
588
589                 dcdc6: regulator-dcdc6 {
590                         regulator-name = "v1_8bat";
591                         regulator-min-microvolt = <1800000>;
592                         regulator-max-microvolt = <1800000>;
593                         regulator-boot-on;
594                         regulator-always-on;
595                         regulator-state-mem {
596                                 regulator-on-in-suspend;
597                         };
598                 };
599
600                 ldo1: regulator-ldo1 {
601                         regulator-min-microvolt = <1800000>;
602                         regulator-max-microvolt = <1800000>;
603                         regulator-boot-on;
604                         regulator-always-on;
605                 };
606         };
607
608         ov2659@30 {
609                 compatible = "ovti,ov2659";
610                 reg = <0x30>;
611
612                 clocks = <&refclk 0>;
613                 clock-names = "xvclk";
614
615                 port {
616                         ov2659_0: endpoint {
617                                 remote-endpoint = <&vpfe1_ep>;
618                                 link-frequencies = /bits/ 64 <70000000>;
619                         };
620                 };
621         };
622 };
623
624 &i2c1 {
625         status = "okay";
626         pinctrl-names = "default";
627         pinctrl-0 = <&i2c1_pins>;
628         pixcir_ts@5c {
629                 compatible = "pixcir,pixcir_tangoc";
630                 pinctrl-names = "default";
631                 pinctrl-0 = <&pixcir_ts_pins>;
632                 reg = <0x5c>;
633
634                 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
635
636                 /*
637                  * 0x264 represents the offset of padconf register of
638                  * gpio3_22 from am43xx_pinmux base.
639                  */
640                 interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
641                                       <&am43xx_pinmux 0x264>;
642                 interrupt-names = "tsc", "wakeup";
643
644                 touchscreen-size-x = <1024>;
645                 touchscreen-size-y = <600>;
646                 wakeup-source;
647         };
648
649         ov2659@30 {
650                 compatible = "ovti,ov2659";
651                 reg = <0x30>;
652
653                 clocks = <&refclk 0>;
654                 clock-names = "xvclk";
655
656                 port {
657                         ov2659_1: endpoint {
658                                 remote-endpoint = <&vpfe0_ep>;
659                                 link-frequencies = /bits/ 64 <70000000>;
660                         };
661                 };
662         };
663
664         tlv320aic3106: tlv320aic3106@1b {
665                 #sound-dai-cells = <0>;
666                 compatible = "ti,tlv320aic3106";
667                 reg = <0x1b>;
668                 status = "okay";
669
670                 /* Regulators */
671                 IOVDD-supply = <&evm_v3_3d>; /* V3_3D -> <tps63031> EN: V1_8D -> VBAT */
672                 AVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
673                 DRVDD-supply = <&evm_v3_3d>; /* v3_3AUD -> V3_3D -> ... */
674                 DVDD-supply = <&ldo1>; /* V1_8D -> LDO1 */
675         };
676 };
677
678 &epwmss0 {
679         status = "okay";
680 };
681
682 &tscadc {
683         status = "okay";
684
685         adc {
686                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
687         };
688 };
689
690 &ecap0 {
691         status = "okay";
692         pinctrl-names = "default";
693         pinctrl-0 = <&ecap0_pins>;
694 };
695
696 &gpio0 {
697         pinctrl-names = "default";
698         pinctrl-0 = <&gpio0_pins>;
699         status = "okay";
700
701         p23 {
702                 gpio-hog;
703                 gpios = <23 GPIO_ACTIVE_HIGH>;
704                 /* SelEMMCorNAND selects between eMMC and NAND:
705                  * Low: NAND
706                  * High: eMMC
707                  * When changing this line make sure the newly
708                  * selected device node is enabled and the previously
709                  * selected device node is disabled.
710                  */
711                 output-low;
712                 line-name = "SelEMMCorNAND";
713         };
714 };
715
716 &gpio1 {
717         status = "okay";
718 };
719
720 &gpio3 {
721         status = "okay";
722 };
723
724 &gpio4 {
725         status = "okay";
726 };
727
728 &gpio5 {
729         pinctrl-names = "default";
730         pinctrl-0 = <&display_mux_pins>;
731         status = "okay";
732         ti,no-reset-on-init;
733
734         p8 {
735                 /*
736                  * SelLCDorHDMI selects between display and audio paths:
737                  * Low: HDMI display with audio via HDMI
738                  * High: LCD display with analog audio via aic3111 codec
739                  */
740                 gpio-hog;
741                 gpios = <8 GPIO_ACTIVE_HIGH>;
742                 output-high;
743                 line-name = "SelLCDorHDMI";
744         };
745 };
746
747 &mmc1 {
748         status = "okay";
749         vmmc-supply = <&evm_v3_3d>;
750         bus-width = <4>;
751         pinctrl-names = "default";
752         pinctrl-0 = <&mmc1_pins>;
753         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
754 };
755
756 /* eMMC sits on mmc2 */
757 &mmc2 {
758         /*
759          * When enabling eMMC, disable GPMC/NAND and set
760          * SelEMMCorNAND to output-high
761          */
762         status = "disabled";
763         vmmc-supply = <&evm_v3_3d>;
764         bus-width = <8>;
765         pinctrl-names = "default", "sleep";
766         pinctrl-0 = <&emmc_pins_default>;
767         pinctrl-1 = <&emmc_pins_sleep>;
768         ti,non-removable;
769 };
770
771 &mmc3 {
772         status = "okay";
773         /* these are on the crossbar and are outlined in the
774            xbar-event-map element */
775         dmas = <&edma_xbar 30 0 1>,
776                 <&edma_xbar 31 0 2>;
777         dma-names = "tx", "rx";
778         vmmc-supply = <&vmmcwl_fixed>;
779         bus-width = <4>;
780         pinctrl-names = "default", "sleep";
781         pinctrl-0 = <&mmc3_pins_default>;
782         pinctrl-1 = <&mmc3_pins_sleep>;
783         cap-power-off-card;
784         keep-power-in-suspend;
785         ti,non-removable;
786
787         #address-cells = <1>;
788         #size-cells = <0>;
789         wlcore: wlcore@0 {
790                 compatible = "ti,wl1835";
791                 reg = <2>;
792                 interrupt-parent = <&gpio1>;
793                 interrupts = <23 IRQ_TYPE_EDGE_RISING>;
794         };
795 };
796
797 &uart3 {
798         status = "okay";
799         pinctrl-names = "default";
800         pinctrl-0 = <&uart3_pins>;
801 };
802
803 &usb2_phy1 {
804         status = "okay";
805 };
806
807 &usb1 {
808         dr_mode = "otg";
809         status = "okay";
810 };
811
812 &usb2_phy2 {
813         status = "okay";
814 };
815
816 &usb2 {
817         dr_mode = "host";
818         status = "okay";
819 };
820
821 &mac {
822         slaves = <1>;
823         pinctrl-names = "default", "sleep";
824         pinctrl-0 = <&cpsw_default>;
825         pinctrl-1 = <&cpsw_sleep>;
826         status = "okay";
827 };
828
829 &davinci_mdio {
830         pinctrl-names = "default", "sleep";
831         pinctrl-0 = <&davinci_mdio_default>;
832         pinctrl-1 = <&davinci_mdio_sleep>;
833         status = "okay";
834 };
835
836 &cpsw_emac0 {
837         phy_id = <&davinci_mdio>, <0>;
838         phy-mode = "rgmii";
839 };
840
841 &elm {
842         status = "okay";
843 };
844
845 &gpmc {
846         /*
847          * When enabling GPMC, disable eMMC and set
848          * SelEMMCorNAND to output-low
849          */
850         status = "okay";
851         pinctrl-names = "default";
852         pinctrl-0 = <&nand_flash_x8>;
853         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
854         nand@0,0 {
855                 compatible = "ti,omap2-nand";
856                 reg = <0 0 4>;          /* device IO registers */
857                 interrupt-parent = <&gpmc>;
858                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
859                              <1 IRQ_TYPE_NONE>; /* termcount */
860                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>;  /* gpmc_wait0 */
861                 ti,nand-xfer-type = "prefetch-dma";
862                 ti,nand-ecc-opt = "bch16";
863                 ti,elm-id = <&elm>;
864                 nand-bus-width = <8>;
865                 gpmc,device-width = <1>;
866                 gpmc,sync-clk-ps = <0>;
867                 gpmc,cs-on-ns = <0>;
868                 gpmc,cs-rd-off-ns = <40>;
869                 gpmc,cs-wr-off-ns = <40>;
870                 gpmc,adv-on-ns = <0>;
871                 gpmc,adv-rd-off-ns = <25>;
872                 gpmc,adv-wr-off-ns = <25>;
873                 gpmc,we-on-ns = <0>;
874                 gpmc,we-off-ns = <20>;
875                 gpmc,oe-on-ns = <3>;
876                 gpmc,oe-off-ns = <30>;
877                 gpmc,access-ns = <30>;
878                 gpmc,rd-cycle-ns = <40>;
879                 gpmc,wr-cycle-ns = <40>;
880                 gpmc,bus-turnaround-ns = <0>;
881                 gpmc,cycle2cycle-delay-ns = <0>;
882                 gpmc,clk-activation-ns = <0>;
883                 gpmc,wr-access-ns = <40>;
884                 gpmc,wr-data-mux-bus-ns = <0>;
885                 /* MTD partition table */
886                 /* All SPL-* partitions are sized to minimal length
887                  * which can be independently programmable. For
888                  * NAND flash this is equal to size of erase-block */
889                 #address-cells = <1>;
890                 #size-cells = <1>;
891                 partition@0 {
892                         label = "NAND.SPL";
893                         reg = <0x00000000 0x00040000>;
894                 };
895                 partition@1 {
896                         label = "NAND.SPL.backup1";
897                         reg = <0x00040000 0x00040000>;
898                 };
899                 partition@2 {
900                         label = "NAND.SPL.backup2";
901                         reg = <0x00080000 0x00040000>;
902                 };
903                 partition@3 {
904                         label = "NAND.SPL.backup3";
905                         reg = <0x000c0000 0x00040000>;
906                 };
907                 partition@4 {
908                         label = "NAND.u-boot-spl-os";
909                         reg = <0x00100000 0x00080000>;
910                 };
911                 partition@5 {
912                         label = "NAND.u-boot";
913                         reg = <0x00180000 0x00100000>;
914                 };
915                 partition@6 {
916                         label = "NAND.u-boot-env";
917                         reg = <0x00280000 0x00040000>;
918                 };
919                 partition@7 {
920                         label = "NAND.u-boot-env.backup1";
921                         reg = <0x002c0000 0x00040000>;
922                 };
923                 partition@8 {
924                         label = "NAND.kernel";
925                         reg = <0x00300000 0x00700000>;
926                 };
927                 partition@9 {
928                         label = "NAND.file-system";
929                         reg = <0x00a00000 0x1f600000>;
930                 };
931         };
932 };
933
934 &dss {
935         status = "ok";
936
937         pinctrl-names = "default";
938         pinctrl-0 = <&dss_pins>;
939
940         port {
941                 dpi_out: endpoint {
942                         remote-endpoint = <&lcd_in>;
943                         data-lines = <24>;
944                 };
945         };
946 };
947
948 &dcan0 {
949         pinctrl-names = "default", "sleep";
950         pinctrl-0 = <&dcan0_default>;
951         pinctrl-1 = <&dcan0_sleep>;
952         status = "okay";
953 };
954
955 &dcan1 {
956         pinctrl-names = "default", "sleep";
957         pinctrl-0 = <&dcan1_default>;
958         pinctrl-1 = <&dcan1_sleep>;
959         status = "okay";
960 };
961
962 &vpfe0 {
963         status = "okay";
964         pinctrl-names = "default", "sleep";
965         pinctrl-0 = <&vpfe0_pins_default>;
966         pinctrl-1 = <&vpfe0_pins_sleep>;
967
968         port {
969                 vpfe0_ep: endpoint {
970                         remote-endpoint = <&ov2659_1>;
971                         ti,am437x-vpfe-interface = <0>;
972                         bus-width = <8>;
973                         hsync-active = <0>;
974                         vsync-active = <0>;
975                 };
976         };
977 };
978
979 &vpfe1 {
980         status = "okay";
981         pinctrl-names = "default", "sleep";
982         pinctrl-0 = <&vpfe1_pins_default>;
983         pinctrl-1 = <&vpfe1_pins_sleep>;
984
985         port {
986                 vpfe1_ep: endpoint {
987                         remote-endpoint = <&ov2659_0>;
988                         ti,am437x-vpfe-interface = <0>;
989                         bus-width = <8>;
990                         hsync-active = <0>;
991                         vsync-active = <0>;
992                 };
993         };
994 };
995
996 &mcasp1 {
997         #sound-dai-cells = <0>;
998         pinctrl-names = "default", "sleep";
999         pinctrl-0 = <&mcasp1_pins>;
1000         pinctrl-1 = <&mcasp1_sleep_pins>;
1001
1002         status = "okay";
1003
1004         op-mode = <0>; /* MCASP_IIS_MODE */
1005         tdm-slots = <2>;
1006         /* 4 serializers */
1007         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
1008                 0 0 1 2
1009         >;
1010         tx-num-evt = <32>;
1011         rx-num-evt = <32>;
1012 };
1013
1014 &rtc {
1015         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
1016         clock-names = "ext-clk", "int-clk";
1017         status = "okay";
1018 };
1019
1020 &cpu {
1021         cpu0-supply = <&dcdc2>;
1022 };