arch/arm/boot/dts/bcm283x.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include <dt-bindings/clock/bcm2835.h>
   3 #include <dt-bindings/clock/bcm2835-aux.h>
   4 #include <dt-bindings/gpio/gpio.h>
   5
   6 /* firmware-provided startup stubs live here, where the secondary CPUs are
   7  * spinning.
   8  */
   9 /memreserve/ 0x00000000 0x00001000;
  10
  11 /* This include file covers the common peripherals and configuration between
  12  * bcm2835 and bcm2836 implementations, leaving the CPU configuration to
  13  * bcm2835.dtsi and bcm2836.dtsi.
  14  */
  15
  16 / {
  17         compatible = "brcm,bcm2835";
  18         model = "BCM2835";
  19         interrupt-parent = <&intc>;
  20         #address-cells = <1>;
  21         #size-cells = <1>;
  22
  23         chosen {
  24                 bootargs = "earlyprintk console=ttyAMA0";
  25         };
  26
  27         soc {
  28                 compatible = "simple-bus";
  29                 #address-cells = <1>;
  30                 #size-cells = <1>;
  31
  32                 timer@7e003000 {
  33                         compatible = "brcm,bcm2835-system-timer";
  34                         reg = <0x7e003000 0x1000>;
  35                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  36                         /* This could be a reference to BCM2835_CLOCK_TIMER,
  37                          * but we don't have the driver using the common clock
  38                          * support yet.
  39                          */
  40                         clock-frequency = <1000000>;
  41                 };
  42
  43                 dma: dma@7e007000 {
  44                         compatible = "brcm,bcm2835-dma";
  45                         reg = <0x7e007000 0xf00>;
  46                         interrupts = <1 16>,
  47                                      <1 17>,
  48                                      <1 18>,
  49                                      <1 19>,
  50                                      <1 20>,
  51                                      <1 21>,
  52                                      <1 22>,
  53                                      <1 23>,
  54                                      <1 24>,
  55                                      <1 25>,
  56                                      <1 26>,
  57                                      /* dma channel 11-14 share one irq */
  58                                      <1 27>,
  59                                      <1 27>,
  60                                      <1 27>,
  61                                      <1 27>,
  62                                      /* unused shared irq for all channels */
  63                                      <1 28>;
  64                         interrupt-names = "dma0",
  65                                           "dma1",
  66                                           "dma2",
  67                                           "dma3",
  68                                           "dma4",
  69                                           "dma5",
  70                                           "dma6",
  71                                           "dma7",
  72                                           "dma8",
  73                                           "dma9",
  74                                           "dma10",
  75                                           "dma11",
  76                                           "dma12",
  77                                           "dma13",
  78                                           "dma14",
  79                                           "dma-shared-all";
  80                         #dma-cells = <1>;
  81                         brcm,dma-channel-mask = <0x7f35>;
  82                 };
  83
  84                 intc: interrupt-controller@7e00b200 {
  85                         compatible = "brcm,bcm2835-armctrl-ic";
  86                         reg = <0x7e00b200 0x200>;
  87                         interrupt-controller;
  88                         #interrupt-cells = <2>;
  89                 };
  90
  91                 watchdog@7e100000 {
  92                         compatible = "brcm,bcm2835-pm-wdt";
  93                         reg = <0x7e100000 0x28>;
  94                 };
  95
  96                 clocks: cprman@7e101000 {
  97                         compatible = "brcm,bcm2835-cprman";
  98                         #clock-cells = <1>;
  99                         reg = <0x7e101000 0x2000>;
 100
 101                         /* CPRMAN derives everything from the platform's
 102                          * oscillator.
 103                          */
 104                         clocks = <&clk_osc>;
 105                 };
 106
 107                 rng@7e104000 {
 108                         compatible = "brcm,bcm2835-rng";
 109                         reg = <0x7e104000 0x10>;
 110                 };
 111
 112                 mailbox: mailbox@7e00b880 {
 113                         compatible = "brcm,bcm2835-mbox";
 114                         reg = <0x7e00b880 0x40>;
 115                         interrupts = <0 1>;
 116                         #mbox-cells = <0>;
 117                 };
 118
 119                 gpio: gpio@7e200000 {
 120                         compatible = "brcm,bcm2835-gpio";
 121                         reg = <0x7e200000 0xb4>;
 122                         /*
 123                          * The GPIO IP block is designed for 3 banks of GPIOs.
 124                          * Each bank has a GPIO interrupt for itself.
 125                          * There is an overall "any bank" interrupt.
 126                          * In order, these are GIC interrupts 17, 18, 19, 20.
 127                          * Since the BCM2835 only has 2 banks, the 2nd bank
 128                          * interrupt output appears to be mirrored onto the
 129                          * 3rd bank's interrupt signal.
 130                          * So, a bank0 interrupt shows up on 17, 20, and
 131                          * a bank1 interrupt shows up on 18, 19, 20!
 132                          */
 133                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
 134
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137
 138                         interrupt-controller;
 139                         #interrupt-cells = <2>;
 140                 };
 141
 142                 uart0: serial@7e201000 {
 143                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
 144                         reg = <0x7e201000 0x1000>;
 145                         interrupts = <2 25>;
 146                         clocks = <&clocks BCM2835_CLOCK_UART>,
 147                                  <&clocks BCM2835_CLOCK_VPU>;
 148                         clock-names = "uartclk", "apb_pclk";
 149                         arm,primecell-periphid = <0x00241011>;
 150                 };
 151
 152                 i2s: i2s@7e203000 {
 153                         compatible = "brcm,bcm2835-i2s";
 154                         reg = <0x7e203000 0x24>;
 155                         clocks = <&clocks BCM2835_CLOCK_PCM>;
 156
 157                         dmas = <&dma 2>,
 158                                <&dma 3>;
 159                         dma-names = "tx", "rx";
 160                         status = "disabled";
 161                 };
 162
 163                 spi: spi@7e204000 {
 164                         compatible = "brcm,bcm2835-spi";
 165                         reg = <0x7e204000 0x1000>;
 166                         interrupts = <2 22>;
 167                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 168                         #address-cells = <1>;
 169                         #size-cells = <0>;
 170                         status = "disabled";
 171                 };
 172
 173                 i2c0: i2c@7e205000 {
 174                         compatible = "brcm,bcm2835-i2c";
 175                         reg = <0x7e205000 0x1000>;
 176                         interrupts = <2 21>;
 177                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 178                         #address-cells = <1>;
 179                         #size-cells = <0>;
 180                         status = "disabled";
 181                 };
 182
 183                 pixelvalve@7e206000 {
 184                         compatible = "brcm,bcm2835-pixelvalve0";
 185                         reg = <0x7e206000 0x100>;
 186                         interrupts = <2 13>; /* pwa0 */
 187                 };
 188
 189                 pixelvalve@7e207000 {
 190                         compatible = "brcm,bcm2835-pixelvalve1";
 191                         reg = <0x7e207000 0x100>;
 192                         interrupts = <2 14>; /* pwa1 */
 193                 };
 194
 195                 aux: aux@0x7e215000 {
 196                         compatible = "brcm,bcm2835-aux";
 197                         #clock-cells = <1>;
 198                         reg = <0x7e215000 0x8>;
 199                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 200                 };
 201
 202                 uart1: serial@7e215040 {
 203                         compatible = "brcm,bcm2835-aux-uart";
 204                         reg = <0x7e215040 0x40>;
 205                         interrupts = <1 29>;
 206                         clocks = <&aux BCM2835_AUX_CLOCK_UART>;
 207                         status = "disabled";
 208                 };
 209
 210                 spi1: spi@7e215080 {
 211                         compatible = "brcm,bcm2835-aux-spi";
 212                         reg = <0x7e215080 0x40>;
 213                         interrupts = <1 29>;
 214                         clocks = <&aux BCM2835_AUX_CLOCK_SPI1>;
 215                         #address-cells = <1>;
 216                         #size-cells = <0>;
 217                         status = "disabled";
 218                 };
 219
 220                 spi2: spi@7e2150c0 {
 221                         compatible = "brcm,bcm2835-aux-spi";
 222                         reg = <0x7e2150c0 0x40>;
 223                         interrupts = <1 29>;
 224                         clocks = <&aux BCM2835_AUX_CLOCK_SPI2>;
 225                         #address-cells = <1>;
 226                         #size-cells = <0>;
 227                         status = "disabled";
 228                 };
 229
 230                 pwm: pwm@7e20c000 {
 231                         compatible = "brcm,bcm2835-pwm";
 232                         reg = <0x7e20c000 0x28>;
 233                         clocks = <&clocks BCM2835_CLOCK_PWM>;
 234                         assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
 235                         assigned-clock-rates = <10000000>;
 236                         #pwm-cells = <2>;
 237                         status = "disabled";
 238                 };
 239
 240                 sdhci: sdhci@7e300000 {
 241                         compatible = "brcm,bcm2835-sdhci";
 242                         reg = <0x7e300000 0x100>;
 243                         interrupts = <2 30>;
 244                         clocks = <&clocks BCM2835_CLOCK_EMMC>;
 245                         status = "disabled";
 246                 };
 247
 248                 hvs@7e400000 {
 249                         compatible = "brcm,bcm2835-hvs";
 250                         reg = <0x7e400000 0x6000>;
 251                         interrupts = <2 1>;
 252                 };
 253
 254                 i2c1: i2c@7e804000 {
 255                         compatible = "brcm,bcm2835-i2c";
 256                         reg = <0x7e804000 0x1000>;
 257                         interrupts = <2 21>;
 258                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 259                         #address-cells = <1>;
 260                         #size-cells = <0>;
 261                         status = "disabled";
 262                 };
 263
 264                 i2c2: i2c@7e805000 {
 265                         compatible = "brcm,bcm2835-i2c";
 266                         reg = <0x7e805000 0x1000>;
 267                         interrupts = <2 21>;
 268                         clocks = <&clocks BCM2835_CLOCK_VPU>;
 269                         #address-cells = <1>;
 270                         #size-cells = <0>;
 271                         status = "disabled";
 272                 };
 273
 274                 pixelvalve@7e807000 {
 275                         compatible = "brcm,bcm2835-pixelvalve2";
 276                         reg = <0x7e807000 0x100>;
 277                         interrupts = <2 10>; /* pixelvalve */
 278                 };
 279
 280                 hdmi: hdmi@7e902000 {
 281                         compatible = "brcm,bcm2835-hdmi";
 282                         reg = <0x7e902000 0x600>,
 283                               <0x7e808000 0x100>;
 284                         interrupts = <2 8>, <2 9>;
 285                         ddc = <&i2c2>;
 286                         clocks = <&clocks BCM2835_PLLH_PIX>,
 287                                  <&clocks BCM2835_CLOCK_HSM>;
 288                         clock-names = "pixel", "hdmi";
 289                         status = "disabled";
 290                 };
 291
 292                 usb: usb@7e980000 {
 293                         compatible = "brcm,bcm2835-usb";
 294                         reg = <0x7e980000 0x10000>;
 295                         interrupts = <1 9>;
 296                         #address-cells = <1>;
 297                         #size-cells = <0>;
 298                         clocks = <&clk_usb>;
 299                         clock-names = "otg";
 300                 };
 301
 302                 v3d: v3d@7ec00000 {
 303                         compatible = "brcm,bcm2835-v3d";
 304                         reg = <0x7ec00000 0x1000>;
 305                         interrupts = <1 10>;
 306                 };
 307
 308                 vc4: gpu {
 309                         compatible = "brcm,bcm2835-vc4";
 310                 };
 311         };
 312
 313         clocks {
 314                 compatible = "simple-bus";
 315                 #address-cells = <1>;
 316                 #size-cells = <0>;
 317
 318                 /* The oscillator is the root of the clock tree. */
 319                 clk_osc: clock@3 {
 320                         compatible = "fixed-clock";
 321                         reg = <3>;
 322                         #clock-cells = <0>;
 323                         clock-output-names = "osc";
 324                         clock-frequency = <19200000>;
 325                 };
 326
 327                 clk_usb: clock@4 {
 328                         compatible = "fixed-clock";
 329                         reg = <4>;
 330                         #clock-cells = <0>;
 331                         clock-output-names = "otg";
 332                         clock-frequency = <480000000>;
 333                 };
 334         };
 335 };