GNU Linux-libre 4.19.286-gnu1
[releases.git] / arch / arm / boot / dts / gemini-sq201.dts
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree file for ITian Square One SQ201 NAS
4  */
5
6 /dts-v1/;
7
8 #include "gemini.dtsi"
9 #include <dt-bindings/input/input.h>
10
11 / {
12         model = "ITian Square One SQ201";
13         compatible = "itian,sq201", "cortina,gemini";
14         #address-cells = <1>;
15         #size-cells = <1>;
16
17         memory@0 { /* 128 MB */
18                 device_type = "memory";
19                 reg = <0x00000000 0x8000000>;
20         };
21
22         chosen {
23                 bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
24                 stdout-path = &uart0;
25         };
26
27         gpio_keys {
28                 compatible = "gpio-keys";
29
30                 button-setup {
31                         debounce-interval = <50>;
32                         wakeup-source;
33                         linux,code = <KEY_SETUP>;
34                         label = "factory reset";
35                         /* Conflict with NAND flash */
36                         gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
37                 };
38         };
39
40         leds {
41                 compatible = "gpio-leds";
42                 led-green-info {
43                         label = "sq201:green:info";
44                         /* Conflict with parallel flash */
45                         gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
46                         default-state = "on";
47                         linux,default-trigger = "heartbeat";
48                 };
49                 led-green-usb {
50                         label = "sq201:green:usb";
51                         /* Conflict with parallel and NAND flash */
52                         gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
53                         default-state = "off";
54                         linux,default-trigger = "usb-host";
55                 };
56         };
57
58         mdio0: mdio {
59                 compatible = "virtual,mdio-gpio";
60                 /* Uses MDC and MDIO */
61                 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
62                         <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
63                 #address-cells = <1>;
64                 #size-cells = <0>;
65
66                 /* This is a Marvell 88E1111 ethernet transciever */
67                 phy0: ethernet-phy@1 {
68                         reg = <1>;
69                 };
70         };
71
72         spi {
73                 compatible = "spi-gpio";
74                 #address-cells = <1>;
75                 #size-cells = <0>;
76                 /* Check pin collisions */
77                 gpio-sck = <&gpio1 28 GPIO_ACTIVE_HIGH>;
78                 gpio-miso = <&gpio1 30 GPIO_ACTIVE_HIGH>;
79                 gpio-mosi = <&gpio1 29 GPIO_ACTIVE_HIGH>;
80                 cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
81                 num-chipselects = <1>;
82
83                 switch@0 {
84                         compatible = "vitesse,vsc7395";
85                         reg = <0>;
86                         /* Specified for 2.5 MHz or below */
87                         spi-max-frequency = <2500000>;
88                         gpio-controller;
89                         #gpio-cells = <2>;
90
91                         ports {
92                                 #address-cells = <1>;
93                                 #size-cells = <0>;
94
95                                 port@0 {
96                                         reg = <0>;
97                                         label = "lan1";
98                                 };
99                                 port@1 {
100                                         reg = <1>;
101                                         label = "lan2";
102                                 };
103                                 port@2 {
104                                         reg = <2>;
105                                         label = "lan3";
106                                 };
107                                 port@3 {
108                                         reg = <3>;
109                                         label = "lan4";
110                                 };
111                                 vsc: port@6 {
112                                         reg = <6>;
113                                         label = "cpu";
114                                         ethernet = <&gmac1>;
115                                         phy-mode = "rgmii";
116                                         fixed-link {
117                                                 speed = <1000>;
118                                                 full-duplex;
119                                                 pause;
120                                         };
121                                 };
122                         };
123                 };
124         };
125
126
127         soc {
128                 flash@30000000 {
129                         /*
130                          * Flash access can be enabled, with the side effect
131                          * of disabling access to GPIO LED on GPIO0[20] which
132                          * reuse one of the parallel flash chip select lines.
133                          * Also the default firmware on the machine has the
134                          * problem that since it uses the flash, the two LEDS
135                          * on the right become numb.
136                          */
137                         /* status = "okay"; */
138                         /* 16MB of flash */
139                         reg = <0x30000000 0x01000000>;
140
141                         partitions {
142                                 compatible = "redboot-fis";
143                                 /* Eraseblock at 0xfe0000 */
144                                 fis-index-block = <0x1fc>;
145                         };
146                 };
147
148                 syscon: syscon@40000000 {
149                         pinctrl {
150                                 /*
151                                  * gpio0fgrp cover line 18 used by reset button
152                                  * gpio0ggrp cover line 20 used by info LED
153                                  * gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
154                                  * gpio0kgrp cover line 31 used by USB LED
155                                  */
156                                 gpio0_default_pins: pinctrl-gpio0 {
157                                         mux {
158                                                 function = "gpio0";
159                                                 groups = "gpio0fgrp",
160                                                 "gpio0ggrp",
161                                                 "gpio0hgrp",
162                                                 "gpio0kgrp";
163                                         };
164                                 };
165                                 /*
166                                  * gpio0dgrp cover lines used by the SPI
167                                  * to the Vitesse G5x chip.
168                                  */
169                                 gpio1_default_pins: pinctrl-gpio1 {
170                                         mux {
171                                                 function = "gpio1";
172                                                 groups = "gpio1dgrp";
173                                         };
174                                 };
175                                 pinctrl-gmii {
176                                         mux {
177                                                 function = "gmii";
178                                                 groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
179                                         };
180                                         /* Settings come from memory dump in PLATO */
181                                         conf0 {
182                                                 pins = "V8 GMAC0 RXDV";
183                                                 skew-delay = <0>;
184                                         };
185                                         conf1 {
186                                                 pins = "Y7 GMAC0 RXC";
187                                                 skew-delay = <15>;
188                                         };
189                                         conf2 {
190                                                 pins = "T8 GMAC0 TXEN";
191                                                 skew-delay = <7>;
192                                         };
193                                         conf3 {
194                                                 pins = "U8 GMAC0 TXC";
195                                                 skew-delay = <10>;
196                                         };
197                                         conf4 {
198                                                 pins = "T10 GMAC1 RXDV";
199                                                 skew-delay = <7>;
200                                         };
201                                         conf5 {
202                                                 pins = "Y11 GMAC1 RXC";
203                                                 skew-delay = <8>;
204                                         };
205                                         conf6 {
206                                                 pins = "W11 GMAC1 TXEN";
207                                                 skew-delay = <7>;
208                                         };
209                                         conf7 {
210                                                 pins = "V11 GMAC1 TXC";
211                                                 skew-delay = <5>;
212                                         };
213                                         conf8 {
214                                                 /* The data lines all have default skew */
215                                                 pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
216                                                        "Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
217                                                        "T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
218                                                        "V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
219                                                        "Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
220                                                        "T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
221                                                        "U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
222                                                        "W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
223                                                 skew-delay = <7>;
224                                         };
225                                         /* Set up drive strength on GMAC0 and GMAC1 to 16 mA */
226                                         conf9 {
227                                                 groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
228                                                 drive-strength = <16>;
229                                         };
230                                 };
231                         };
232                 };
233
234                 sata: sata@46000000 {
235                         cortina,gemini-ata-muxmode = <0>;
236                         cortina,gemini-enable-sata-bridge;
237                         status = "okay";
238                 };
239
240                 gpio0: gpio@4d000000 {
241                         pinctrl-names = "default";
242                         pinctrl-0 = <&gpio0_default_pins>;
243                 };
244
245                 gpio1: gpio@4e000000 {
246                         pinctrl-names = "default";
247                         pinctrl-0 = <&gpio1_default_pins>;
248                 };
249
250                 pci@50000000 {
251                         status = "okay";
252                         interrupt-map-mask = <0xf800 0 0 7>;
253                         interrupt-map =
254                                 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
255                                 <0x4800 0 0 2 &pci_intc 1>,
256                                 <0x4800 0 0 3 &pci_intc 2>,
257                                 <0x4800 0 0 4 &pci_intc 3>,
258                                 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
259                                 <0x5000 0 0 2 &pci_intc 2>,
260                                 <0x5000 0 0 3 &pci_intc 3>,
261                                 <0x5000 0 0 4 &pci_intc 0>,
262                                 <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
263                                 <0x5800 0 0 2 &pci_intc 3>,
264                                 <0x5800 0 0 3 &pci_intc 0>,
265                                 <0x5800 0 0 4 &pci_intc 1>,
266                                 <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
267                                 <0x6000 0 0 2 &pci_intc 0>,
268                                 <0x6000 0 0 3 &pci_intc 1>,
269                                 <0x6000 0 0 4 &pci_intc 2>;
270                 };
271
272                 ethernet@60000000 {
273                         status = "okay";
274
275                         ethernet-port@0 {
276                                 phy-mode = "rgmii";
277                                 phy-handle = <&phy0>;
278                         };
279                         ethernet-port@1 {
280                                 phy-mode = "rgmii";
281                                 fixed-link {
282                                         speed = <1000>;
283                                         full-duplex;
284                                         pause;
285                                 };
286                         };
287                 };
288
289                 ata@63000000 {
290                         status = "okay";
291                 };
292         };
293 };