GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / hip04.dtsi
1 /*
2  * Hisilicon Ltd. HiP04 SoC
3  *
4  * Copyright (C) 2013-2014 Hisilicon Ltd.
5  * Copyright (C) 2013-2014 Linaro Ltd.
6  *
7  * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13
14 / {
15         /* memory bus is 64-bit */
16         #address-cells = <2>;
17         #size-cells = <2>;
18
19         aliases {
20                 serial0 = &uart0;
21         };
22
23         bootwrapper {
24                 compatible = "hisilicon,hip04-bootwrapper";
25                 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26         };
27
28         cpus {
29                 #address-cells = <1>;
30                 #size-cells = <0>;
31
32                 cpu-map {
33                         cluster0 {
34                                 core0 {
35                                         cpu = <&CPU0>;
36                                 };
37                                 core1 {
38                                         cpu = <&CPU1>;
39                                 };
40                                 core2 {
41                                         cpu = <&CPU2>;
42                                 };
43                                 core3 {
44                                         cpu = <&CPU3>;
45                                 };
46                         };
47                         cluster1 {
48                                 core0 {
49                                         cpu = <&CPU4>;
50                                 };
51                                 core1 {
52                                         cpu = <&CPU5>;
53                                 };
54                                 core2 {
55                                         cpu = <&CPU6>;
56                                 };
57                                 core3 {
58                                         cpu = <&CPU7>;
59                                 };
60                         };
61                         cluster2 {
62                                 core0 {
63                                         cpu = <&CPU8>;
64                                 };
65                                 core1 {
66                                         cpu = <&CPU9>;
67                                 };
68                                 core2 {
69                                         cpu = <&CPU10>;
70                                 };
71                                 core3 {
72                                         cpu = <&CPU11>;
73                                 };
74                         };
75                         cluster3 {
76                                 core0 {
77                                         cpu = <&CPU12>;
78                                 };
79                                 core1 {
80                                         cpu = <&CPU13>;
81                                 };
82                                 core2 {
83                                         cpu = <&CPU14>;
84                                 };
85                                 core3 {
86                                         cpu = <&CPU15>;
87                                 };
88                         };
89                 };
90                 CPU0: cpu@0 {
91                         device_type = "cpu";
92                         compatible = "arm,cortex-a15";
93                         reg = <0>;
94                 };
95                 CPU1: cpu@1 {
96                         device_type = "cpu";
97                         compatible = "arm,cortex-a15";
98                         reg = <1>;
99                 };
100                 CPU2: cpu@2 {
101                         device_type = "cpu";
102                         compatible = "arm,cortex-a15";
103                         reg = <2>;
104                 };
105                 CPU3: cpu@3 {
106                         device_type = "cpu";
107                         compatible = "arm,cortex-a15";
108                         reg = <3>;
109                 };
110                 CPU4: cpu@100 {
111                         device_type = "cpu";
112                         compatible = "arm,cortex-a15";
113                         reg = <0x100>;
114                 };
115                 CPU5: cpu@101 {
116                         device_type = "cpu";
117                         compatible = "arm,cortex-a15";
118                         reg = <0x101>;
119                 };
120                 CPU6: cpu@102 {
121                         device_type = "cpu";
122                         compatible = "arm,cortex-a15";
123                         reg = <0x102>;
124                 };
125                 CPU7: cpu@103 {
126                         device_type = "cpu";
127                         compatible = "arm,cortex-a15";
128                         reg = <0x103>;
129                 };
130                 CPU8: cpu@200 {
131                         device_type = "cpu";
132                         compatible = "arm,cortex-a15";
133                         reg = <0x200>;
134                 };
135                 CPU9: cpu@201 {
136                         device_type = "cpu";
137                         compatible = "arm,cortex-a15";
138                         reg = <0x201>;
139                 };
140                 CPU10: cpu@202 {
141                         device_type = "cpu";
142                         compatible = "arm,cortex-a15";
143                         reg = <0x202>;
144                 };
145                 CPU11: cpu@203 {
146                         device_type = "cpu";
147                         compatible = "arm,cortex-a15";
148                         reg = <0x203>;
149                 };
150                 CPU12: cpu@300 {
151                         device_type = "cpu";
152                         compatible = "arm,cortex-a15";
153                         reg = <0x300>;
154                 };
155                 CPU13: cpu@301 {
156                         device_type = "cpu";
157                         compatible = "arm,cortex-a15";
158                         reg = <0x301>;
159                 };
160                 CPU14: cpu@302 {
161                         device_type = "cpu";
162                         compatible = "arm,cortex-a15";
163                         reg = <0x302>;
164                 };
165                 CPU15: cpu@303 {
166                         device_type = "cpu";
167                         compatible = "arm,cortex-a15";
168                         reg = <0x303>;
169                 };
170         };
171
172         timer {
173                 compatible = "arm,armv7-timer";
174                 interrupt-parent = <&gic>;
175                 interrupts = <1 13 0xf08>,
176                              <1 14 0xf08>,
177                              <1 11 0xf08>,
178                              <1 10 0xf08>;
179         };
180
181         clk_50m: clk_50m {
182                 #clock-cells = <0>;
183                 compatible = "fixed-clock";
184                 clock-frequency = <50000000>;
185         };
186
187         clk_168m: clk_168m {
188                 #clock-cells = <0>;
189                 compatible = "fixed-clock";
190                 clock-frequency = <168000000>;
191         };
192
193         clk_375m: clk_375m {
194                 #clock-cells = <0>;
195                 compatible = "fixed-clock";
196                 clock-frequency = <375000000>;
197         };
198
199         soc {
200                 /* It's a 32-bit SoC. */
201                 #address-cells = <1>;
202                 #size-cells = <1>;
203                 compatible = "simple-bus";
204                 interrupt-parent = <&gic>;
205                 ranges = <0 0 0xe0000000 0x10000000>;
206
207                 gic: interrupt-controller@c01000 {
208                         compatible = "hisilicon,hip04-intc";
209                         #interrupt-cells = <3>;
210                         #address-cells = <0>;
211                         interrupt-controller;
212                         interrupts = <1 9 0xf04>;
213
214                         reg = <0xc01000 0x1000>, <0xc02000 0x1000>,
215                               <0xc04000 0x2000>, <0xc06000 0x2000>;
216                 };
217
218                 sysctrl: sysctrl {
219                         compatible = "hisilicon,sysctrl";
220                         reg = <0x3e00000 0x00100000>;
221                 };
222
223                 fabric: fabric {
224                         compatible = "hisilicon,hip04-fabric";
225                         reg = <0x302a000 0x1000>;
226                 };
227
228                 dual_timer0: dual_timer@3000000 {
229                         compatible = "arm,sp804", "arm,primecell";
230                         reg = <0x3000000 0x1000>;
231                         interrupts = <0 224 4>;
232                         clocks = <&clk_50m>, <&clk_50m>;
233                         clock-names = "apb_pclk";
234                 };
235
236                 arm-pmu {
237                         compatible = "arm,cortex-a15-pmu";
238                         interrupts = <0 64 4>,
239                                      <0 65 4>,
240                                      <0 66 4>,
241                                      <0 67 4>,
242                                      <0 68 4>,
243                                      <0 69 4>,
244                                      <0 70 4>,
245                                      <0 71 4>,
246                                      <0 72 4>,
247                                      <0 73 4>,
248                                      <0 74 4>,
249                                      <0 75 4>,
250                                      <0 76 4>,
251                                      <0 77 4>,
252                                      <0 78 4>,
253                                      <0 79 4>;
254                 };
255
256                 uart0: uart@4007000 {
257                         compatible = "snps,dw-apb-uart";
258                         reg = <0x4007000 0x1000>;
259                         interrupts = <0 381 4>;
260                         clocks = <&clk_168m>;
261                         clock-names = "uartclk";
262                         reg-shift = <2>;
263                         status = "disabled";
264                 };
265
266                 sata0: sata@a000000 {
267                         compatible = "hisilicon,hisi-ahci";
268                         reg = <0xa000000 0x1000000>;
269                         interrupts = <0 372 4>;
270                 };
271
272         };
273
274         etb@0,e3c42000 {
275                 compatible = "arm,coresight-etb10", "arm,primecell";
276                 reg = <0 0xe3c42000 0 0x1000>;
277
278                 clocks = <&clk_375m>;
279                 clock-names = "apb_pclk";
280                 port {
281                         etb0_in_port: endpoint@0 {
282                                 slave-mode;
283                                 remote-endpoint = <&replicator0_out_port0>;
284                         };
285                 };
286         };
287
288         etb@0,e3c82000 {
289                 compatible = "arm,coresight-etb10", "arm,primecell";
290                 reg = <0 0xe3c82000 0 0x1000>;
291
292                 clocks = <&clk_375m>;
293                 clock-names = "apb_pclk";
294                 port {
295                         etb1_in_port: endpoint@0 {
296                                 slave-mode;
297                                 remote-endpoint = <&replicator1_out_port0>;
298                         };
299                 };
300         };
301
302         etb@0,e3cc2000 {
303                 compatible = "arm,coresight-etb10", "arm,primecell";
304                 reg = <0 0xe3cc2000 0 0x1000>;
305
306                 clocks = <&clk_375m>;
307                 clock-names = "apb_pclk";
308                 port {
309                         etb2_in_port: endpoint@0 {
310                                 slave-mode;
311                                 remote-endpoint = <&replicator2_out_port0>;
312                         };
313                 };
314         };
315
316         etb@0,e3d02000 {
317                 compatible = "arm,coresight-etb10", "arm,primecell";
318                 reg = <0 0xe3d02000 0 0x1000>;
319
320                 clocks = <&clk_375m>;
321                 clock-names = "apb_pclk";
322                 port {
323                         etb3_in_port: endpoint@0 {
324                                 slave-mode;
325                                 remote-endpoint = <&replicator3_out_port0>;
326                         };
327                 };
328         };
329
330         tpiu@0,e3c05000 {
331                 compatible = "arm,coresight-tpiu", "arm,primecell";
332                 reg = <0 0xe3c05000 0 0x1000>;
333
334                 clocks = <&clk_375m>;
335                 clock-names = "apb_pclk";
336                 port {
337                         tpiu_in_port: endpoint@0 {
338                                 slave-mode;
339                                 remote-endpoint = <&funnel4_out_port0>;
340                         };
341                 };
342         };
343
344         replicator0 {
345                 /* non-configurable replicators don't show up on the
346                  * AMBA bus.  As such no need to add "arm,primecell".
347                  */
348                 compatible = "arm,coresight-replicator";
349
350                 ports {
351                         #address-cells = <1>;
352                         #size-cells = <0>;
353
354                         /* replicator output ports */
355                         port@0 {
356                                 reg = <0>;
357                                 replicator0_out_port0: endpoint {
358                                         remote-endpoint = <&etb0_in_port>;
359                                 };
360                         };
361
362                         port@1 {
363                                 reg = <1>;
364                                 replicator0_out_port1: endpoint {
365                                         remote-endpoint = <&funnel4_in_port0>;
366                                 };
367                         };
368
369                         /* replicator input port */
370                         port@2 {
371                                 reg = <0>;
372                                 replicator0_in_port0: endpoint {
373                                         slave-mode;
374                                         remote-endpoint = <&funnel0_out_port0>;
375                                 };
376                         };
377                 };
378         };
379
380         replicator1 {
381                 /* non-configurable replicators don't show up on the
382                  * AMBA bus.  As such no need to add "arm,primecell".
383                  */
384                 compatible = "arm,coresight-replicator";
385
386                 ports {
387                         #address-cells = <1>;
388                         #size-cells = <0>;
389
390                         /* replicator output ports */
391                         port@0 {
392                                 reg = <0>;
393                                 replicator1_out_port0: endpoint {
394                                         remote-endpoint = <&etb1_in_port>;
395                                 };
396                         };
397
398                         port@1 {
399                                 reg = <1>;
400                                 replicator1_out_port1: endpoint {
401                                         remote-endpoint = <&funnel4_in_port1>;
402                                 };
403                         };
404
405                         /* replicator input port */
406                         port@2 {
407                                 reg = <0>;
408                                 replicator1_in_port0: endpoint {
409                                         slave-mode;
410                                         remote-endpoint = <&funnel1_out_port0>;
411                                 };
412                         };
413                 };
414         };
415
416         replicator2 {
417                 /* non-configurable replicators don't show up on the
418                  * AMBA bus.  As such no need to add "arm,primecell".
419                  */
420                 compatible = "arm,coresight-replicator";
421
422                 ports {
423                         #address-cells = <1>;
424                         #size-cells = <0>;
425
426                         /* replicator output ports */
427                         port@0 {
428                                 reg = <0>;
429                                 replicator2_out_port0: endpoint {
430                                         remote-endpoint = <&etb2_in_port>;
431                                 };
432                         };
433
434                         port@1 {
435                                 reg = <1>;
436                                         replicator2_out_port1: endpoint {
437                                         remote-endpoint = <&funnel4_in_port2>;
438                                 };
439                         };
440
441                         /* replicator input port */
442                         port@2 {
443                                 reg = <0>;
444                                 replicator2_in_port0: endpoint {
445                                         slave-mode;
446                                         remote-endpoint = <&funnel2_out_port0>;
447                                 };
448                         };
449                 };
450         };
451
452         replicator3 {
453                 /* non-configurable replicators don't show up on the
454                  * AMBA bus.  As such no need to add "arm,primecell".
455                  */
456                 compatible = "arm,coresight-replicator";
457
458                 ports {
459                         #address-cells = <1>;
460                         #size-cells = <0>;
461
462                         /* replicator output ports */
463                         port@0 {
464                                 reg = <0>;
465                                 replicator3_out_port0: endpoint {
466                                         remote-endpoint = <&etb3_in_port>;
467                                 };
468                         };
469
470                         port@1 {
471                                 reg = <1>;
472                                 replicator3_out_port1: endpoint {
473                                         remote-endpoint = <&funnel4_in_port3>;
474                                 };
475                         };
476
477                         /* replicator input port */
478                         port@2 {
479                                 reg = <0>;
480                                 replicator3_in_port0: endpoint {
481                                         slave-mode;
482                                         remote-endpoint = <&funnel3_out_port0>;
483                                 };
484                         };
485                 };
486         };
487
488         funnel@0,e3c41000 {
489                 compatible = "arm,coresight-funnel", "arm,primecell";
490                 reg = <0 0xe3c41000 0 0x1000>;
491
492                 clocks = <&clk_375m>;
493                 clock-names = "apb_pclk";
494                 ports {
495                         #address-cells = <1>;
496                         #size-cells = <0>;
497
498                         /* funnel output port */
499                         port@0 {
500                                 reg = <0>;
501                                 funnel0_out_port0: endpoint {
502                                         remote-endpoint =
503                                                 <&replicator0_in_port0>;
504                                 };
505                         };
506
507                         /* funnel input ports */
508                         port@1 {
509                                 reg = <0>;
510                                 funnel0_in_port0: endpoint {
511                                         slave-mode;
512                                         remote-endpoint = <&ptm0_out_port>;
513                                 };
514                         };
515
516                         port@2 {
517                                 reg = <1>;
518                                 funnel0_in_port1: endpoint {
519                                         slave-mode;
520                                         remote-endpoint = <&ptm1_out_port>;
521                                 };
522                         };
523
524                         port@3 {
525                                 reg = <2>;
526                                 funnel0_in_port2: endpoint {
527                                         slave-mode;
528                                         remote-endpoint = <&ptm2_out_port>;
529                                 };
530                         };
531
532                         port@4 {
533                                 reg = <3>;
534                                 funnel0_in_port3: endpoint {
535                                         slave-mode;
536                                         remote-endpoint = <&ptm3_out_port>;
537                                 };
538                         };
539                 };
540         };
541
542         funnel@0,e3c81000 {
543                 compatible = "arm,coresight-funnel", "arm,primecell";
544                 reg = <0 0xe3c81000 0 0x1000>;
545
546                 clocks = <&clk_375m>;
547                 clock-names = "apb_pclk";
548                 ports {
549                         #address-cells = <1>;
550                         #size-cells = <0>;
551
552                         /* funnel output port */
553                         port@0 {
554                                 reg = <0>;
555                                 funnel1_out_port0: endpoint {
556                                         remote-endpoint =
557                                                 <&replicator1_in_port0>;
558                                 };
559                         };
560
561                         /* funnel input ports */
562                         port@1 {
563                                 reg = <0>;
564                                 funnel1_in_port0: endpoint {
565                                         slave-mode;
566                                         remote-endpoint = <&ptm4_out_port>;
567                                 };
568                         };
569
570                         port@2 {
571                                 reg = <1>;
572                                 funnel1_in_port1: endpoint {
573                                         slave-mode;
574                                         remote-endpoint = <&ptm5_out_port>;
575                                 };
576                         };
577
578                         port@3 {
579                                 reg = <2>;
580                                 funnel1_in_port2: endpoint {
581                                         slave-mode;
582                                         remote-endpoint = <&ptm6_out_port>;
583                                 };
584                         };
585
586                         port@4 {
587                                 reg = <3>;
588                                 funnel1_in_port3: endpoint {
589                                         slave-mode;
590                                         remote-endpoint = <&ptm7_out_port>;
591                                 };
592                         };
593                 };
594         };
595
596         funnel@0,e3cc1000 {
597                 compatible = "arm,coresight-funnel", "arm,primecell";
598                 reg = <0 0xe3cc1000 0 0x1000>;
599
600                 clocks = <&clk_375m>;
601                 clock-names = "apb_pclk";
602                 ports {
603                         #address-cells = <1>;
604                         #size-cells = <0>;
605
606                         /* funnel output port */
607                         port@0 {
608                                 reg = <0>;
609                                 funnel2_out_port0: endpoint {
610                                         remote-endpoint =
611                                                 <&replicator2_in_port0>;
612                                 };
613                         };
614
615                         /* funnel input ports */
616                         port@1 {
617                                 reg = <0>;
618                                 funnel2_in_port0: endpoint {
619                                         slave-mode;
620                                         remote-endpoint = <&ptm8_out_port>;
621                                 };
622                         };
623
624                         port@2 {
625                                 reg = <1>;
626                                 funnel2_in_port1: endpoint {
627                                         slave-mode;
628                                         remote-endpoint = <&ptm9_out_port>;
629                                 };
630                         };
631
632                         port@3 {
633                                 reg = <2>;
634                                 funnel2_in_port2: endpoint {
635                                         slave-mode;
636                                         remote-endpoint = <&ptm10_out_port>;
637                                 };
638                         };
639
640                         port@4 {
641                                 reg = <3>;
642                                 funnel2_in_port3: endpoint {
643                                         slave-mode;
644                                         remote-endpoint = <&ptm11_out_port>;
645                                 };
646                         };
647                 };
648         };
649
650         funnel@0,e3d01000 {
651                 compatible = "arm,coresight-funnel", "arm,primecell";
652                 reg = <0 0xe3d01000 0 0x1000>;
653
654                 clocks = <&clk_375m>;
655                 clock-names = "apb_pclk";
656                 ports {
657                         #address-cells = <1>;
658                         #size-cells = <0>;
659
660                         /* funnel output port */
661                         port@0 {
662                                 reg = <0>;
663                                 funnel3_out_port0: endpoint {
664                                         remote-endpoint =
665                                                 <&replicator3_in_port0>;
666                                 };
667                         };
668
669                         /* funnel input ports */
670                         port@1 {
671                                 reg = <0>;
672                                 funnel3_in_port0: endpoint {
673                                         slave-mode;
674                                         remote-endpoint = <&ptm12_out_port>;
675                                 };
676                         };
677
678                         port@2 {
679                                 reg = <1>;
680                                 funnel3_in_port1: endpoint {
681                                         slave-mode;
682                                         remote-endpoint = <&ptm13_out_port>;
683                                 };
684                         };
685
686                         port@3 {
687                                 reg = <2>;
688                                 funnel3_in_port2: endpoint {
689                                         slave-mode;
690                                         remote-endpoint = <&ptm14_out_port>;
691                                 };
692                         };
693
694                         port@4 {
695                                 reg = <3>;
696                                 funnel3_in_port3: endpoint {
697                                         slave-mode;
698                                         remote-endpoint = <&ptm15_out_port>;
699                                 };
700                         };
701                 };
702         };
703
704         funnel@0,e3c04000 {
705                 compatible = "arm,coresight-funnel", "arm,primecell";
706                 reg = <0 0xe3c04000 0 0x1000>;
707
708                 clocks = <&clk_375m>;
709                 clock-names = "apb_pclk";
710                 ports {
711                         #address-cells = <1>;
712                         #size-cells = <0>;
713
714                         /* funnel output port */
715                         port@0 {
716                                 reg = <0>;
717                                 funnel4_out_port0: endpoint {
718                                         remote-endpoint = <&tpiu_in_port>;
719                                 };
720                         };
721
722                         /* funnel input ports */
723                         port@1 {
724                                 reg = <0>;
725                                 funnel4_in_port0: endpoint {
726                                         slave-mode;
727                                         remote-endpoint =
728                                                 <&replicator0_out_port1>;
729                                 };
730                         };
731
732                         port@2 {
733                                 reg = <1>;
734                                 funnel4_in_port1: endpoint {
735                                         slave-mode;
736                                         remote-endpoint =
737                                                 <&replicator1_out_port1>;
738                                 };
739                         };
740
741                         port@3 {
742                                 reg = <2>;
743                                 funnel4_in_port2: endpoint {
744                                         slave-mode;
745                                         remote-endpoint =
746                                                 <&replicator2_out_port1>;
747                                 };
748                         };
749
750                         port@4 {
751                                 reg = <3>;
752                                 funnel4_in_port3: endpoint {
753                                         slave-mode;
754                                         remote-endpoint =
755                                                 <&replicator3_out_port1>;
756                                 };
757                         };
758                 };
759         };
760
761         ptm@0,e3c7c000 {
762                 compatible = "arm,coresight-etm3x", "arm,primecell";
763                 reg = <0 0xe3c7c000 0 0x1000>;
764
765                 clocks = <&clk_375m>;
766                 clock-names = "apb_pclk";
767                 cpu = <&CPU0>;
768                 port {
769                         ptm0_out_port: endpoint {
770                                 remote-endpoint = <&funnel0_in_port0>;
771                         };
772                 };
773         };
774
775         ptm@0,e3c7d000 {
776                 compatible = "arm,coresight-etm3x", "arm,primecell";
777                 reg = <0 0xe3c7d000 0 0x1000>;
778
779                 clocks = <&clk_375m>;
780                 clock-names = "apb_pclk";
781                 cpu = <&CPU1>;
782                 port {
783                         ptm1_out_port: endpoint {
784                                 remote-endpoint = <&funnel0_in_port1>;
785                         };
786                 };
787         };
788
789         ptm@0,e3c7e000 {
790                 compatible = "arm,coresight-etm3x", "arm,primecell";
791                 reg = <0 0xe3c7e000 0 0x1000>;
792
793                 clocks = <&clk_375m>;
794                 clock-names = "apb_pclk";
795                 cpu = <&CPU2>;
796                 port {
797                         ptm2_out_port: endpoint {
798                                 remote-endpoint = <&funnel0_in_port2>;
799                         };
800                 };
801         };
802
803         ptm@0,e3c7f000 {
804                 compatible = "arm,coresight-etm3x", "arm,primecell";
805                 reg = <0 0xe3c7f000 0 0x1000>;
806
807                 clocks = <&clk_375m>;
808                 clock-names = "apb_pclk";
809                 cpu = <&CPU3>;
810                 port {
811                         ptm3_out_port: endpoint {
812                                 remote-endpoint = <&funnel0_in_port3>;
813                         };
814                 };
815         };
816
817         ptm@0,e3cbc000 {
818                 compatible = "arm,coresight-etm3x", "arm,primecell";
819                 reg = <0 0xe3cbc000 0 0x1000>;
820
821                 clocks = <&clk_375m>;
822                 clock-names = "apb_pclk";
823                 cpu = <&CPU4>;
824                 port {
825                         ptm4_out_port: endpoint {
826                                 remote-endpoint = <&funnel1_in_port0>;
827                         };
828                 };
829         };
830
831         ptm@0,e3cbd000 {
832                 compatible = "arm,coresight-etm3x", "arm,primecell";
833                 reg = <0 0xe3cbd000 0 0x1000>;
834
835                 clocks = <&clk_375m>;
836                 clock-names = "apb_pclk";
837                 cpu = <&CPU5>;
838                 port {
839                         ptm5_out_port: endpoint {
840                                 remote-endpoint = <&funnel1_in_port1>;
841                         };
842                 };
843         };
844
845         ptm@0,e3cbe000 {
846                 compatible = "arm,coresight-etm3x", "arm,primecell";
847                 reg = <0 0xe3cbe000 0 0x1000>;
848
849                 clocks = <&clk_375m>;
850                 clock-names = "apb_pclk";
851                 cpu = <&CPU6>;
852                 port {
853                         ptm6_out_port: endpoint {
854                                 remote-endpoint = <&funnel1_in_port2>;
855                         };
856                 };
857         };
858
859         ptm@0,e3cbf000 {
860                 compatible = "arm,coresight-etm3x", "arm,primecell";
861                 reg = <0 0xe3cbf000 0 0x1000>;
862
863                 clocks = <&clk_375m>;
864                 clock-names = "apb_pclk";
865                 cpu = <&CPU7>;
866                 port {
867                         ptm7_out_port: endpoint {
868                                 remote-endpoint = <&funnel1_in_port3>;
869                         };
870                 };
871         };
872
873         ptm@0,e3cfc000 {
874                 compatible = "arm,coresight-etm3x", "arm,primecell";
875                 reg = <0 0xe3cfc000 0 0x1000>;
876
877                 clocks = <&clk_375m>;
878                 clock-names = "apb_pclk";
879                 cpu = <&CPU8>;
880                 port {
881                         ptm8_out_port: endpoint {
882                                 remote-endpoint = <&funnel2_in_port0>;
883                         };
884                 };
885         };
886
887         ptm@0,e3cfd000 {
888                 compatible = "arm,coresight-etm3x", "arm,primecell";
889                 reg = <0 0xe3cfd000 0 0x1000>;
890                 clocks = <&clk_375m>;
891                 clock-names = "apb_pclk";
892                 cpu = <&CPU9>;
893                 port {
894                         ptm9_out_port: endpoint {
895                                 remote-endpoint = <&funnel2_in_port1>;
896                         };
897                 };
898         };
899
900         ptm@0,e3cfe000 {
901                 compatible = "arm,coresight-etm3x", "arm,primecell";
902                 reg = <0 0xe3cfe000 0 0x1000>;
903
904                 clocks = <&clk_375m>;
905                 clock-names = "apb_pclk";
906                 cpu = <&CPU10>;
907                 port {
908                         ptm10_out_port: endpoint {
909                                 remote-endpoint = <&funnel2_in_port2>;
910                         };
911                 };
912         };
913
914         ptm@0,e3cff000 {
915                 compatible = "arm,coresight-etm3x", "arm,primecell";
916                 reg = <0 0xe3cff000 0 0x1000>;
917
918                 clocks = <&clk_375m>;
919                 clock-names = "apb_pclk";
920                 cpu = <&CPU11>;
921                 port {
922                         ptm11_out_port: endpoint {
923                                 remote-endpoint = <&funnel2_in_port3>;
924                         };
925                 };
926         };
927
928         ptm@0,e3d3c000 {
929                 compatible = "arm,coresight-etm3x", "arm,primecell";
930                 reg = <0 0xe3d3c000 0 0x1000>;
931
932                 clocks = <&clk_375m>;
933                 clock-names = "apb_pclk";
934                 cpu = <&CPU12>;
935                 port {
936                         ptm12_out_port: endpoint {
937                                 remote-endpoint = <&funnel3_in_port0>;
938                         };
939                 };
940         };
941
942         ptm@0,e3d3d000 {
943                 compatible = "arm,coresight-etm3x", "arm,primecell";
944                 reg = <0 0xe3d3d000 0 0x1000>;
945
946                 clocks = <&clk_375m>;
947                 clock-names = "apb_pclk";
948                 cpu = <&CPU13>;
949                 port {
950                         ptm13_out_port: endpoint {
951                                 remote-endpoint = <&funnel3_in_port1>;
952                         };
953                 };
954         };
955
956         ptm@0,e3d3e000 {
957                 compatible = "arm,coresight-etm3x", "arm,primecell";
958                 reg = <0 0xe3d3e000 0 0x1000>;
959
960                 clocks = <&clk_375m>;
961                 clock-names = "apb_pclk";
962                 cpu = <&CPU14>;
963                 port {
964                         ptm14_out_port: endpoint {
965                                 remote-endpoint = <&funnel3_in_port2>;
966                         };
967                 };
968         };
969
970         ptm@0,e3d3f000 {
971                 compatible = "arm,coresight-etm3x", "arm,primecell";
972                 reg = <0 0xe3d3f000 0 0x1000>;
973
974                 clocks = <&clk_375m>;
975                 clock-names = "apb_pclk";
976                 cpu = <&CPU15>;
977                 port {
978                         ptm15_out_port: endpoint {
979                                 remote-endpoint = <&funnel3_in_port3>;
980                         };
981                 };
982         };
983 };