GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / imx6qdl-apf6dev.dtsi
1 /*
2  * Copyright 2015 Armadeus Systems
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPL or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This file is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of
12  *     the License, or (at your option) any later version.
13  *
14  *     This file is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  *     You should have received a copy of the GNU General Public
20  *     License along with this file; if not, write to the Free
21  *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22  *     MA 02110-1301 USA
23  *
24  * Or, alternatively,
25  *
26  *  b) Permission is hereby granted, free of charge, to any person
27  *     obtaining a copy of this software and associated documentation
28  *     files (the "Software"), to deal in the Software without
29  *     restriction, including without limitation the rights to use,
30  *     copy, modify, merge, publish, distribute, sublicense, and/or
31  *     sell copies of the Software, and to permit persons to whom the
32  *     Software is furnished to do so, subject to the following
33  *     conditions:
34  *
35  *     The above copyright notice and this permission notice shall be
36  *     included in all copies or substantial portions of the Software.
37  *
38  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45  *     OTHER DEALINGS IN THE SOFTWARE.
46  */
47
48 #include <dt-bindings/gpio/gpio.h>
49 #include <dt-bindings/input/input.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51
52 / {
53         chosen {
54                 stdout-path = &uart4;
55         };
56
57         disp0 {
58                 compatible = "fsl,imx-parallel-display";
59                 interface-pix-fmt = "bgr666";
60                 pinctrl-names = "default";
61                 pinctrl-0 = <&pinctrl_ipu1_disp1>;
62
63                 display-timings {
64                         lw700 {
65                                 clock-frequency = <33000033>;
66                                 hactive = <800>;
67                                 vactive = <480>;
68                                 hback-porch = <96>;
69                                 hfront-porch = <96>;
70                                 vback-porch = <20>;
71                                 vfront-porch = <21>;
72                                 hsync-len = <64>;
73                                 vsync-len = <4>;
74                                 hsync-active = <1>;
75                                 vsync-active = <1>;
76                                 de-active = <1>;
77                                 pixelclk-active = <1>;
78                         };
79                 };
80
81                 port {
82                         display_in: endpoint {
83                                 remote-endpoint = <&ipu1_di0_disp0>;
84                         };
85                 };
86         };
87
88         gpio-keys {
89                 compatible = "gpio-keys";
90                 pinctrl-names = "default";
91                 pinctrl-0 = <&pinctrl_gpio_keys>;
92
93                 user-button {
94                         label = "User button";
95                         gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
96                         linux,code = <BTN_MISC>;
97                         wakeup-source;
98                 };
99         };
100
101         leds {
102                 compatible = "gpio-leds";
103                 pinctrl-names = "default";
104                 pinctrl-0 = <&pinctrl_gpio_leds>;
105
106                 user-led {
107                         label = "User LED";
108                         gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
109                         linux,default-trigger = "heartbeat";
110                         default-state = "on";
111                 };
112         };
113
114         reg_3p3v: regulator-3p3v {
115                 compatible = "regulator-fixed";
116                 regulator-name = "3P3V";
117                 regulator-min-microvolt = <3300000>;
118                 regulator-max-microvolt = <3300000>;
119                 regulator-always-on;
120         };
121
122         reg_usbh1_vbus: regulator-usb-h1-vbus {
123                 compatible = "regulator-fixed";
124                 regulator-name = "usb_h1_vbus";
125                 regulator-min-microvolt = <5000000>;
126                 regulator-max-microvolt = <5000000>;
127                 regulator-always-on;
128         };
129
130         reg_usb_otg_vbus: regulator-usb-otg-vbus {
131                 compatible = "regulator-fixed";
132                 regulator-name = "usb_otg_vbus";
133                 regulator-min-microvolt = <5000000>;
134                 regulator-max-microvolt = <5000000>;
135                 regulator-always-on;
136         };
137
138         sound {
139                 compatible = "fsl,imx6-armadeus-sgtl5000",
140                              "fsl,imx-audio-sgtl5000";
141                 model = "imx6-armadeus-sgtl5000";
142                 ssi-controller = <&ssi1>;
143                 audio-codec = <&codec>;
144                 audio-routing =
145                         "MIC_IN", "Mic Jack",
146                         "Mic Jack", "Mic Bias",
147                         "Headphone Jack", "HP_OUT";
148                 mux-int-port = <1>;
149                 mux-ext-port = <3>;
150         };
151
152         sound-spdif {
153                 compatible = "fsl,imx-audio-spdif";
154                 model = "imx-spdif";
155                 spdif-controller = <&spdif>;
156                 spdif-out;
157         };
158 };
159
160 &audmux {
161         pinctrl-names = "default";
162         pinctrl-0 = <&pinctrl_audmux>;
163         status = "okay";
164 };
165
166 &can2 {
167         pinctrl-names = "default";
168         pinctrl-0 = <&pinctrl_flexcan2>;
169         status = "okay";
170 };
171
172 &ecspi1 {
173         pinctrl-names = "default";
174         pinctrl-0 = <&pinctrl_ecspi1>;
175         cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
176                    <&gpio4 10 GPIO_ACTIVE_LOW>,
177                    <&gpio4 11 GPIO_ACTIVE_LOW>;
178         status = "okay";
179 };
180
181 &hdmi {
182         ddc-i2c-bus = <&i2c3>;
183         status = "okay";
184 };
185
186 &i2c1 {
187         clock-frequency = <400000>;
188         pinctrl-names = "default";
189         pinctrl-0 = <&pinctrl_i2c1>;
190         status = "okay";
191
192         touchscreen@48 {
193                 compatible = "semtech,sx8654";
194                 reg = <0x48>;
195                 pinctrl-names = "default";
196                 pinctrl-0 = <&pinctrl_touchscreen>;
197                 interrupt-parent = <&gpio6>;
198                 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
199         };
200 };
201
202 &i2c2 {
203         clock-frequency = <400000>;
204         pinctrl-names = "default";
205         pinctrl-0 = <&pinctrl_i2c2>;
206         status = "okay";
207
208         codec: sgtl5000@a {
209                 compatible = "fsl,sgtl5000";
210                 reg = <0x0a>;
211                 clocks = <&clks IMX6QDL_CLK_CKO>;
212                 VDDA-supply = <&reg_3p3v>;
213                 VDDIO-supply = <&reg_3p3v>;
214         };
215 };
216
217 &i2c3 {
218         clock-frequency = <400000>;
219         pinctrl-names = "default";
220         pinctrl-0 = <&pinctrl_i2c3>;
221         status = "okay";
222 };
223
224 &ipu1_di0_disp0 {
225         remote-endpoint = <&display_in>;
226 };
227
228 &pcie {
229         pinctrl-names = "default";
230         pinctrl-0 = <&pinctrl_pcie>;
231         reset-gpio = <&gpio6 2 GPIO_ACTIVE_LOW>;
232         status = "okay";
233 };
234
235 &pwm3 {
236         pinctrl-names = "default";
237         pinctrl-0 = <&pinctrl_pwm3>;
238         status = "okay";
239 };
240
241 /* GPS */
242 &uart1 {
243         pinctrl-names = "default";
244         pinctrl-0 = <&pinctrl_uart1>;
245         status = "okay";
246 };
247
248 /* GSM */
249 &uart3 {
250         pinctrl-names = "default";
251         pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>;
252         uart-has-rtscts;
253         status = "okay";
254 };
255
256 /* console */
257 &uart4 {
258         pinctrl-names = "default";
259         pinctrl-0 = <&pinctrl_uart4>;
260         status = "okay";
261 };
262
263 &usbh1 {
264         vbus-supply = <&reg_usbh1_vbus>;
265         phy_type = "utmi";
266         status = "okay";
267 };
268
269 &usbotg {
270         pinctrl-names = "default";
271         pinctrl-0 = <&pinctrl_usbotg>;
272         vbus-supply = <&reg_usb_otg_vbus>;
273         dr_mode = "otg";
274         status = "okay";
275 };
276
277 /* microSD */
278 &usdhc2 {
279         pinctrl-names = "default";
280         pinctrl-0 = <&pinctrl_usdhc2>;
281         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
282         no-1-8-v;
283         status = "okay";
284 };
285
286 &spdif {
287         pinctrl-names = "default";
288         pinctrl-0 = <&pinctrl_spdif>;
289         status = "okay";
290 };
291
292 &ssi1 {
293         status = "okay";
294 };
295
296 &iomuxc {
297         pinctrl-names = "default";
298         pinctrl-0 = <&pinctrl_gpios>;
299
300         apf6dev {
301                 pinctrl_audmux: audmuxgrp {
302                         fsl,pins = <
303                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x1b0b0
304                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x1b0b0
305                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
306                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x1b0b0
307                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x130b0
308                         >;
309                 };
310
311                 pinctrl_ecspi1: ecspi1grp {
312                         fsl,pins = <
313                                 MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
314                                 MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
315                                 MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
316                                 MX6QDL_PAD_KEY_ROW1__GPIO4_IO09  0x1b0b0
317                                 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
318                                 MX6QDL_PAD_KEY_COL2__GPIO4_IO10  0x1b0b0
319                         >;
320                 };
321
322                 pinctrl_flexcan2: flexcan2grp {
323                         fsl,pins = <
324                                 MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
325                                 MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
326                         >;
327                 };
328
329                 pinctrl_gpio_keys: gpiokeysgrp {
330                         fsl,pins = <
331                                 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
332                         >;
333                 };
334
335                 pinctrl_gpio_leds: gpioledsgrp {
336                         fsl,pins = <
337                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
338                         >;
339                 };
340
341                 pinctrl_gpios: gpiosgrp {
342                         fsl,pins = <
343                                 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20         0x100b1
344                                 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12      0x100b1
345                                 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13      0x100b1
346                                 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14      0x100b1
347                                 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15      0x100b1
348                                 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16      0x100b1
349                                 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17      0x100b1
350                                 MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18      0x100b1
351                                 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21       0x100b1
352                         >;
353                 };
354
355                 pinctrl_gsm: gsmgrp {
356                         fsl,pins = <
357                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04  0x130b0 /* GSM_POKIN */
358                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
359                         >;
360                 };
361
362                 pinctrl_i2c1: i2c1grp {
363                         fsl,pins = <
364                                 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
365                                 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
366                         >;
367                 };
368
369                 pinctrl_i2c2: i2c2grp {
370                         fsl,pins = <
371                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
372                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
373                         >;
374                 };
375
376                 pinctrl_i2c3: i2c3grp {
377                         fsl,pins = <
378                                 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
379                                 MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
380                         >;
381                 };
382
383                 pinctrl_ipu1_disp1: ipu1disp1grp {
384                         fsl,pins = <
385                                 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x100b1
386                                 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15            0x100b1
387                                 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x100b1
388                                 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x100b1
389                                 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x100b1
390                                 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x100b1
391                                 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x100b1
392                                 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x100b1
393                                 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x100b1
394                                 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x100b1
395                                 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x100b1
396                                 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x100b1
397                                 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x100b1
398                                 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x100b1
399                                 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x100b1
400                                 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x100b1
401                                 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x100b1
402                                 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x100b1
403                                 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x100b1
404                                 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x100b1
405                                 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x100b1
406                                 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x100b1
407                         >;
408                 };
409
410                 pinctrl_pcie: pciegrp {
411                         fsl,pins = <
412                                 MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
413                         >;
414                 };
415
416                 pinctrl_pwm3: pwm3grp {
417                         fsl,pins = <
418                                 MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
419                         >;
420                 };
421
422                 pinctrl_uart1: uart1grp {
423                         fsl,pins = <
424                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
425                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
426                         >;
427                 };
428
429                 pinctrl_uart3: uart3grp {
430                         fsl,pins = <
431                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b0
432                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
433                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
434                                 MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b0
435                         >;
436                 };
437
438                 pinctrl_uart4: uart4grp {
439                         fsl,pins = <
440                                 MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
441                                 MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
442                         >;
443                 };
444
445                 pinctrl_usbotg: usbotggrp {
446                         fsl,pins = <
447                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
448                         >;
449                 };
450
451                 pinctrl_usdhc2: usdhc2grp {
452                         fsl,pins = <
453                                 MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
454                                 MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
455                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
456                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
457                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
458                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
459                         >;
460                 };
461
462                 pinctrl_spdif: spdifgrp {
463                         fsl,pins = <
464                                 MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
465                         >;
466                 };
467
468                 pinctrl_touchscreen: touchscreengrp {
469                         fsl,pins = <
470                                 MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
471                         >;
472                 };
473         };
474 };