arch/arm/boot/dts/imx6qdl-udoo.dtsi

   1 /*
   2  * Copyright 2013 Freescale Semiconductor, Inc.
   3  *
   4  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13
  14 / {
  15         aliases {
  16                 backlight = &backlight;
  17                 panelchan = &panelchan;
  18                 panel7 = &panel7;
  19                 touchscreenp7 = &touchscreenp7;
  20         };
  21
  22         chosen {
  23                 stdout-path = &uart2;
  24         };
  25
  26         backlight: backlight {
  27                 compatible = "gpio-backlight";
  28                 gpios = <&gpio1 4 0>;
  29                 default-on;
  30                 status = "disabled";
  31         };
  32
  33         memory {
  34                 reg = <0x10000000 0x40000000>;
  35         };
  36
  37         panel7: panel7 {
  38                 /*
  39                  * in reality it is a -20t (parallel) model,
  40                  * but with LVDS bridge chip attached,
  41                  * so it is equivalent to -19t model in drive
  42                  * characteristics
  43                  */
  44                 compatible = "urt,umsh-8596md-19t";
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&pinctrl_panel>;
  47                 power-supply = <&reg_panel>;
  48                 backlight = <&backlight>;
  49                 status = "disabled";
  50
  51                 port {
  52                         panel_in: endpoint {
  53                                 remote-endpoint = <&lvds0_out>;
  54                         };
  55                 };
  56         };
  57
  58         regulators {
  59                 compatible = "simple-bus";
  60                 #address-cells = <1>;
  61                 #size-cells = <0>;
  62
  63                 reg_usb_h1_vbus: regulator@0 {
  64                         compatible = "regulator-fixed";
  65                         reg = <0>;
  66                         regulator-name = "usb_h1_vbus";
  67                         regulator-min-microvolt = <5000000>;
  68                         regulator-max-microvolt = <5000000>;
  69                         enable-active-high;
  70                         startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
  71                         gpio = <&gpio7 12 0>;
  72                 };
  73
  74                 reg_panel: regulator@1 {
  75                         compatible = "regulator-fixed";
  76                         reg = <1>;
  77                         regulator-name = "lcd_panel";
  78                         enable-active-high;
  79                         gpio = <&gpio1 2 0>;
  80                 };
  81         };
  82
  83         sound {
  84                 compatible = "fsl,imx6q-udoo-ac97",
  85                              "fsl,imx-audio-ac97";
  86                 model = "fsl,imx6q-udoo-ac97";
  87                 audio-cpu = <&ssi1>;
  88                 audio-routing =
  89                         "RX", "Mic Jack",
  90                         "Headphone Jack", "TX";
  91                 mux-int-port = <1>;
  92                 mux-ext-port = <6>;
  93         };
  94 };
  95
  96 &fec {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&pinctrl_enet>;
  99         phy-mode = "rgmii-id";
 100         status = "okay";
 101 };
 102
 103 &hdmi {
 104         ddc-i2c-bus = <&i2c2>;
 105         status = "okay";
 106 };
 107
 108 &i2c2 {
 109         clock-frequency = <100000>;
 110         pinctrl-names = "default";
 111         pinctrl-0 = <&pinctrl_i2c2>;
 112         status = "okay";
 113 };
 114
 115 &i2c3 {
 116         clock-frequency = <100000>;
 117         pinctrl-names = "default";
 118         pinctrl-0 = <&pinctrl_i2c3>;
 119         status = "okay";
 120
 121         touchscreenp7: touchscreenp7@55 {
 122                 compatible = "sitronix,st1232";
 123                 pinctrl-names = "default";
 124                 pinctrl-0 = <&pinctrl_touchscreenp7>;
 125                 reg = <0x55>;
 126                 interrupt-parent = <&gpio1>;
 127                 interrupts = <13 8>;
 128                 gpios = <&gpio1 15 0>;
 129                 status = "disabled";
 130         };
 131 };
 132
 133 &iomuxc {
 134         imx6q-udoo {
 135                 pinctrl_enet: enetgrp {
 136                         fsl,pins = <
 137                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 138                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 139                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 140                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 141                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 142                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 143                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 144                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 145                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 146                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 147                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 148                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 149                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 150                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 151                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 152                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 153                         >;
 154                 };
 155
 156                 pinctrl_i2c2: i2c2grp {
 157                         fsl,pins = <
 158                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 159                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 160                         >;
 161                 };
 162
 163                 pinctrl_i2c3: i2c3grp {
 164                         fsl,pins = <
 165                                 MX6QDL_PAD_GPIO_5__I2C3_SCL             0x4001f8b1
 166                                 MX6QDL_PAD_GPIO_6__I2C3_SDA             0x4001f8b1
 167                         >;
 168                 };
 169
 170                 pinctrl_panel: panelgrp {
 171                         fsl,pins = <
 172                                 MX6QDL_PAD_GPIO_2__GPIO1_IO02           0x70
 173                                 MX6QDL_PAD_GPIO_4__GPIO1_IO04           0x70
 174                         >;
 175                 };
 176
 177                 pinctrl_touchscreenp7: touchscreenp7grp {
 178                         fsl,pins = <
 179                                 MX6QDL_PAD_SD2_DAT0__GPIO1_IO15         0x70
 180                                 MX6QDL_PAD_SD2_DAT2__GPIO1_IO13         0x1b0b0
 181                         >;
 182                 };
 183
 184                 pinctrl_uart2: uart2grp {
 185                         fsl,pins = <
 186                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
 187                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
 188                         >;
 189                 };
 190
 191                 pinctrl_usbh: usbhgrp {
 192                         fsl,pins = <
 193                                 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
 194                                 MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
 195                         >;
 196                 };
 197
 198                 pinctrl_usdhc3: usdhc3grp {
 199                         fsl,pins = <
 200                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 201                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 202                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 203                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 204                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 205                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 206                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00         0x1b0b0
 207                         >;
 208                 };
 209
 210                 pinctrl_ac97_running: ac97running {
 211                         fsl,pins = <
 212                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
 213                                 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS          0x1b0b0
 214                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x1b0b0
 215                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x1b0b0
 216                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 217                         >;
 218                 };
 219
 220                 pinctrl_ac97_warm_reset: ac97warmreset {
 221                         fsl,pins = <
 222                                 MX6QDL_PAD_DI0_PIN2__AUD6_TXD           0x1b0b0
 223                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
 224                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x1b0b0
 225                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x1b0b0
 226                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 227                         >;
 228                 };
 229
 230                 pinctrl_ac97_reset: ac97reset {
 231                         fsl,pins = <
 232                                 MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x1b0b0
 233                                 MX6QDL_PAD_DI0_PIN3__GPIO4_IO19         0x1b0b0
 234                                 MX6QDL_PAD_DI0_PIN4__AUD6_RXD           0x1b0b0
 235                                 MX6QDL_PAD_DI0_PIN15__AUD6_TXC          0x1b0b0
 236                                 MX6QDL_PAD_EIM_EB2__GPIO2_IO30          0x1b0b0
 237                         >;
 238                 };
 239         };
 240 };
 241
 242 &ldb {
 243         status = "okay";
 244
 245         panelchan: lvds-channel@0 {
 246                 port@4 {
 247                         reg = <4>;
 248
 249                         lvds0_out: endpoint {
 250                                 remote-endpoint = <&panel_in>;
 251                         };
 252                 };
 253         };
 254 };
 255
 256 &uart2 {
 257         pinctrl-names = "default";
 258         pinctrl-0 = <&pinctrl_uart2>;
 259         status = "okay";
 260 };
 261
 262 &usbh1 {
 263         pinctrl-names = "default";
 264         pinctrl-0 = <&pinctrl_usbh>;
 265         vbus-supply = <&reg_usb_h1_vbus>;
 266         clocks = <&clks IMX6QDL_CLK_CKO>;
 267         status = "okay";
 268 };
 269
 270 &usdhc3 {
 271         pinctrl-names = "default";
 272         pinctrl-0 = <&pinctrl_usdhc3>;
 273         cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
 274         status = "okay";
 275 };
 276
 277 &audmux {
 278         status = "okay";
 279 };
 280
 281 &ssi1 {
 282         cell-index = <0>;
 283         fsl,mode = "ac97-slave";
 284         pinctrl-names = "ac97-running", "ac97-reset", "ac97-warm-reset";
 285         pinctrl-0 = <&pinctrl_ac97_running>;
 286         pinctrl-1 = <&pinctrl_ac97_reset>;
 287         pinctrl-2 = <&pinctrl_ac97_warm_reset>;
 288         ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
 289         status = "okay";
 290 };