arch/arm/boot/dts/omap3-n900.dts

   1 /*
   2  * Copyright (C) 2013 Pavel Machek <pavel@ucw.cz>
   3  * Copyright (C) 2013-2014 Aaro Koskinen <aaro.koskinen@iki.fi>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 (or later) as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "omap34xx.dtsi"
  13 #include <dt-bindings/input/input.h>
  14
  15 /*
  16  * Default secure signed bootloader (Nokia X-Loader) does not enable L3 firewall
  17  * for omap AES HW crypto support. When linux kernel try to access memory of AES
  18  * blocks then kernel receive "Unhandled fault: external abort on non-linefetch"
  19  * and crash. Until somebody fix omap-aes.c and omap_hwmod_3xxx_data.c code (no
  20  * crash anymore) omap AES support will be disabled for all Nokia N900 devices.
  21  * There is "unofficial" version of bootloader which enables AES in L3 firewall
  22  * but it is not widely used and to prevent kernel crash rather AES is disabled.
  23  * There is also no runtime detection code if AES is disabled in L3 firewall...
  24  */
  25 &aes {
  26         status = "disabled";
  27 };
  28
  29 / {
  30         model = "Nokia N900";
  31         compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
  32
  33         aliases {
  34                 i2c0;
  35                 i2c1 = &i2c1;
  36                 i2c2 = &i2c2;
  37                 i2c3 = &i2c3;
  38                 display0 = &lcd;
  39                 display1 = &tv;
  40         };
  41
  42         cpus {
  43                 cpu@0 {
  44                         cpu0-supply = <&vcc>;
  45                 };
  46         };
  47
  48         leds {
  49                 compatible = "gpio-leds";
  50                 heartbeat {
  51                         label = "debug::sleep";
  52                         gpios = <&gpio6 2 GPIO_ACTIVE_HIGH>;  /* 162 */
  53                         linux,default-trigger = "default-on";
  54                         pinctrl-names = "default";
  55                         pinctrl-0 = <&debug_leds>;
  56                 };
  57         };
  58
  59         memory@80000000 {
  60                 device_type = "memory";
  61                 reg = <0x80000000 0x10000000>; /* 256 MB */
  62         };
  63
  64         gpio_keys {
  65                 compatible = "gpio-keys";
  66
  67                 camera_lens_cover {
  68                         label = "Camera Lens Cover";
  69                         gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
  70                         linux,input-type = <EV_SW>;
  71                         linux,code = <SW_CAMERA_LENS_COVER>;
  72                         linux,can-disable;
  73                 };
  74
  75                 camera_focus {
  76                         label = "Camera Focus";
  77                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
  78                         linux,code = <KEY_CAMERA_FOCUS>;
  79                         linux,can-disable;
  80                 };
  81
  82                 camera_capture {
  83                         label = "Camera Capture";
  84                         gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
  85                         linux,code = <KEY_CAMERA>;
  86                         linux,can-disable;
  87                 };
  88
  89                 lock_button {
  90                         label = "Lock Button";
  91                         gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
  92                         linux,code = <KEY_SCREENLOCK>;
  93                         linux,can-disable;
  94                 };
  95
  96                 keypad_slide {
  97                         label = "Keypad Slide";
  98                         gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
  99                         linux,input-type = <EV_SW>;
 100                         linux,code = <SW_KEYPAD_SLIDE>;
 101                         linux,can-disable;
 102                 };
 103
 104                 proximity_sensor {
 105                         label = "Proximity Sensor";
 106                         gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
 107                         linux,input-type = <EV_SW>;
 108                         linux,code = <SW_FRONT_PROXIMITY>;
 109                         linux,can-disable;
 110                 };
 111         };
 112
 113         isp1707: isp1707 {
 114                 compatible = "nxp,isp1707";
 115                 nxp,enable-gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>;
 116                 usb-phy = <&usb2_phy>;
 117         };
 118
 119         tv: connector {
 120                 compatible = "composite-video-connector";
 121                 label = "tv";
 122
 123                 port {
 124                         tv_connector_in: endpoint {
 125                                 remote-endpoint = <&venc_out>;
 126                         };
 127                 };
 128         };
 129
 130         sound: n900-audio {
 131                 compatible = "nokia,n900-audio";
 132
 133                 nokia,cpu-dai = <&mcbsp2>;
 134                 nokia,audio-codec = <&tlv320aic3x>, <&tlv320aic3x_aux>;
 135                 nokia,headphone-amplifier = <&tpa6130a2>;
 136
 137                 tvout-selection-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; /* 40 */
 138                 jack-detection-gpios = <&gpio6 17 GPIO_ACTIVE_HIGH>; /* 177 */
 139                 eci-switch-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* 182 */
 140                 speaker-amplifier-gpios = <&twl_gpio 7 GPIO_ACTIVE_HIGH>;
 141         };
 142
 143         battery: n900-battery {
 144                 compatible = "nokia,n900-battery";
 145                 io-channels = <&twl_madc 0>, <&twl_madc 4>, <&twl_madc 12>;
 146                 io-channel-names = "temp", "bsi", "vbat";
 147         };
 148
 149         pwm9: dmtimer-pwm {
 150                 compatible = "ti,omap-dmtimer-pwm";
 151                 #pwm-cells = <3>;
 152                 ti,timers = <&timer9>;
 153                 ti,clock-source = <0x00>; /* timer_sys_ck */
 154         };
 155
 156         ir: n900-ir {
 157                 compatible = "nokia,n900-ir";
 158                 pwms = <&pwm9 0 26316 0>; /* 38000 Hz */
 159         };
 160
 161         rom_rng: rng {
 162                 compatible = "nokia,n900-rom-rng";
 163                 clocks = <&rng_ick>;
 164                 clock-names = "ick";
 165         };
 166
 167         /* controlled (enabled/disabled) directly by bcm2048 and wl1251 */
 168         vctcxo: vctcxo {
 169                 compatible = "fixed-clock";
 170                 #clock-cells = <0>;
 171                 clock-frequency = <38400000>;
 172         };
 173 };
 174
 175 &isp {
 176         vdds_csib-supply = <&vaux2>;
 177
 178         pinctrl-names = "default";
 179         pinctrl-0 = <&camera_pins>;
 180
 181         ports {
 182                 port@1 {
 183                         reg = <1>;
 184
 185                         csi_isp: endpoint {
 186                                 remote-endpoint = <&csi_cam1>;
 187                                 bus-type = <3>; /* CCP2 */
 188                                 clock-lanes = <1>;
 189                                 data-lanes = <0>;
 190                                 lane-polarity = <0 0>;
 191                                 /* Select strobe = <1> for back camera, <0> for front camera */
 192                                 strobe = <1>;
 193                         };
 194                 };
 195         };
 196 };
 197
 198 &omap3_pmx_core {
 199         pinctrl-names = "default";
 200
 201         uart2_pins: pinmux_uart2_pins {
 202                 pinctrl-single,pins = <
 203                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
 204                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)               /* uart2_rts */
 205                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
 206                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
 207                 >;
 208         };
 209
 210         uart3_pins: pinmux_uart3_pins {
 211                 pinctrl-single,pins = <
 212                         OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)                /* uart3_rx */
 213                         OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)               /* uart3_tx */
 214                 >;
 215         };
 216
 217         ethernet_pins: pinmux_ethernet_pins {
 218                 pinctrl-single,pins = <
 219                         OMAP3_CORE1_IOPAD(0x20b4, PIN_INPUT_PULLDOWN | MUX_MODE4)       /* gpmc_ncs3.gpio_54 */
 220                         OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE4)               /* dss_data16.gpio_86 */
 221                         OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE4)               /* uart3_rts_sd.gpio_164 */
 222                 >;
 223         };
 224
 225         gpmc_pins: pinmux_gpmc_pins {
 226                 pinctrl-single,pins = <
 227
 228                         /* address lines */
 229                         OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
 230                         OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
 231                         OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
 232
 233                         /* data lines, gpmc_d0..d7 not muxable according to TRM */
 234                         OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
 235                         OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
 236                         OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
 237                         OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
 238                         OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
 239                         OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
 240                         OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
 241                         OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
 242
 243                         /*
 244                          * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
 245                          * according to TRM. OneNAND seems to require PIN_INPUT on clock.
 246                          */
 247                         OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
 248                         OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
 249                 >;
 250         };
 251
 252         i2c1_pins: pinmux_i2c1_pins {
 253                 pinctrl-single,pins = <
 254                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)                /* i2c1_scl */
 255                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)                /* i2c1_sda */
 256                 >;
 257         };
 258
 259         i2c2_pins: pinmux_i2c2_pins {
 260                 pinctrl-single,pins = <
 261                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)                /* i2c2_scl */
 262                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)                /* i2c2_sda */
 263                 >;
 264         };
 265
 266         i2c3_pins: pinmux_i2c3_pins {
 267                 pinctrl-single,pins = <
 268                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)                /* i2c3_scl */
 269                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)                /* i2c3_sda */
 270                 >;
 271         };
 272
 273         debug_leds: pinmux_debug_led_pins {
 274                 pinctrl-single,pins = <
 275                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 276                 >;
 277         };
 278
 279         mcspi4_pins: pinmux_mcspi4_pins {
 280                 pinctrl-single,pins = <
 281                         OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
 282                         OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
 283                         OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
 284                         OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
 285                 >;
 286         };
 287
 288         mmc1_pins: pinmux_mmc1_pins {
 289                 pinctrl-single,pins = <
 290                         OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
 291                         OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
 292                         OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc1_dat0 */
 293                         OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
 294                         OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
 295                         OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
 296                 >;
 297         };
 298
 299         mmc2_pins: pinmux_mmc2_pins {
 300                 pinctrl-single,pins = <
 301                         OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
 302                         OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
 303                         OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)         /* sdmmc2_dat0 */
 304                         OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1 */
 305                         OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2 */
 306                         OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3 */
 307                         OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat4 */
 308                         OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat5 */
 309                         OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat6 */
 310                         OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat7 */
 311                 >;
 312         };
 313
 314         acx565akm_pins: pinmux_acx565akm_pins {
 315                 pinctrl-single,pins = <
 316                         OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE4)               /* RX51_LCD_RESET_GPIO */
 317                 >;
 318         };
 319
 320         dss_sdi_pins: pinmux_dss_sdi_pins {
 321                 pinctrl-single,pins = <
 322                         OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE1)   /* dss_data10.sdi_dat1n */
 323                         OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE1)   /* dss_data11.sdi_dat1p */
 324                         OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE1)   /* dss_data12.sdi_dat2n */
 325                         OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE1)   /* dss_data13.sdi_dat2p */
 326
 327                         OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE1)   /* dss_data22.sdi_clkp */
 328                         OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE1)   /* dss_data23.sdi_clkn */
 329                 >;
 330         };
 331
 332         wl1251_pins: pinmux_wl1251 {
 333                 pinctrl-single,pins = <
 334                         OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE4)               /* gpio 87 => wl1251 enable */
 335                         OMAP3_CORE1_IOPAD(0x208a, PIN_INPUT | MUX_MODE4)                /* gpio 42 => wl1251 irq */
 336                 >;
 337         };
 338
 339         ssi_pins: pinmux_ssi {
 340                 pinctrl-single,pins = <
 341                         OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP | MUX_MODE1) /* ssi1_rdy_tx */
 342                         OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE1)               /* ssi1_flag_tx */
 343                         OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE4)                /* ssi1_wake_tx (cawake) */
 344                         OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE1)               /* ssi1_dat_tx */
 345                         OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT | MUX_MODE1)                /* ssi1_dat_rx */
 346                         OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE1)                /* ssi1_flag_rx */
 347                         OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT | MUX_MODE1)               /* ssi1_rdy_rx */
 348                         OMAP3_CORE1_IOPAD(0x218a, PIN_OUTPUT | MUX_MODE1)               /* ssi1_wake */
 349                 >;
 350         };
 351
 352         modem_pins: pinmux_modem {
 353                 pinctrl-single,pins = <
 354                         OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE4)               /* gpio 70 => cmt_apeslpx */
 355                         OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT | MUX_MODE4)                /* gpio 72 => ape_rst_rq */
 356                         OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE4)               /* gpio 73 => cmt_rst_rq */
 357                         OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE4)               /* gpio 74 => cmt_en */
 358                         OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE4)               /* gpio 75 => cmt_rst */
 359                         OMAP3_CORE1_IOPAD(0x218e, PIN_OUTPUT | MUX_MODE4)               /* gpio 157 => cmt_bsi */
 360                 >;
 361         };
 362
 363         camera_pins: pinmux_camera {
 364                 pinctrl-single,pins = <
 365                         OMAP3_CORE1_IOPAD(0x210c, PIN_OUTPUT | MUX_MODE7)       /* cam_hs */
 366                         OMAP3_CORE1_IOPAD(0x210e, PIN_OUTPUT | MUX_MODE7)       /* cam_vs */
 367                         OMAP3_CORE1_IOPAD(0x2110, PIN_OUTPUT | MUX_MODE0)       /* cam_xclka */
 368                         OMAP3_CORE1_IOPAD(0x211e, PIN_OUTPUT | MUX_MODE7)       /* cam_d4 */
 369                         OMAP3_CORE1_IOPAD(0x2122, PIN_INPUT | MUX_MODE0)        /* cam_d6 */
 370                         OMAP3_CORE1_IOPAD(0x2124, PIN_INPUT | MUX_MODE0)        /* cam_d7 */
 371                         OMAP3_CORE1_IOPAD(0x2126, PIN_INPUT | MUX_MODE0)        /* cam_d8 */
 372                         OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE0)        /* cam_d9 */
 373                         OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE7)       /* cam_d10 */
 374                         OMAP3_CORE1_IOPAD(0x212e, PIN_OUTPUT | MUX_MODE7)       /* cam_xclkb */
 375                         OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE0)       /* cam_strobe */
 376                 >;
 377         };
 378 };
 379
 380 &i2c1 {
 381         pinctrl-names = "default";
 382         pinctrl-0 = <&i2c1_pins>;
 383
 384         clock-frequency = <2200000>;
 385
 386         twl: twl@48 {
 387                 reg = <0x48>;
 388                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
 389                 interrupt-parent = <&intc>;
 390         };
 391 };
 392
 393 #include "twl4030.dtsi"
 394 #include "twl4030_omap3.dtsi"
 395
 396 &vaux1 {
 397         regulator-name = "V28";
 398         regulator-min-microvolt = <2800000>;
 399         regulator-max-microvolt = <2800000>;
 400         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 401         regulator-always-on; /* due to battery cover sensor */
 402 };
 403
 404 &vaux2 {
 405         regulator-name = "VCSI";
 406         regulator-min-microvolt = <1800000>;
 407         regulator-max-microvolt = <1800000>;
 408         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 409 };
 410
 411 &vaux3 {
 412         regulator-name = "VMMC2_30";
 413         regulator-min-microvolt = <2800000>;
 414         regulator-max-microvolt = <3000000>;
 415         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 416 };
 417
 418 &vaux4 {
 419         regulator-name = "VCAM_ANA_28";
 420         regulator-min-microvolt = <2800000>;
 421         regulator-max-microvolt = <2800000>;
 422         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 423 };
 424
 425 &vmmc1 {
 426         regulator-name = "VMMC1";
 427         regulator-min-microvolt = <1850000>;
 428         regulator-max-microvolt = <3150000>;
 429         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 430 };
 431
 432 &vmmc2 {
 433         regulator-name = "V28_A";
 434         regulator-min-microvolt = <2800000>;
 435         regulator-max-microvolt = <3000000>;
 436         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 437         regulator-always-on; /* due VIO leak to AIC34 VDDs */
 438 };
 439
 440 &vpll1 {
 441         regulator-name = "VPLL";
 442         regulator-min-microvolt = <1800000>;
 443         regulator-max-microvolt = <1800000>;
 444         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 445         regulator-always-on;
 446 };
 447
 448 &vpll2 {
 449         regulator-name = "VSDI_CSI";
 450         regulator-min-microvolt = <1800000>;
 451         regulator-max-microvolt = <1800000>;
 452         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 453         regulator-always-on;
 454 };
 455
 456 &vsim {
 457         regulator-name = "VMMC2_IO_18";
 458         regulator-min-microvolt = <1800000>;
 459         regulator-max-microvolt = <1800000>;
 460         regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 461 };
 462
 463 &vio {
 464         regulator-name = "VIO";
 465         regulator-min-microvolt = <1800000>;
 466         regulator-max-microvolt = <1800000>;
 467 };
 468
 469 &vintana1 {
 470         regulator-name = "VINTANA1";
 471         /* fixed to 1500000 */
 472         regulator-always-on;
 473 };
 474
 475 &vintana2 {
 476         regulator-name = "VINTANA2";
 477         regulator-min-microvolt = <2750000>;
 478         regulator-max-microvolt = <2750000>;
 479         regulator-always-on;
 480 };
 481
 482 &vintdig {
 483         regulator-name = "VINTDIG";
 484         /* fixed to 1500000 */
 485         regulator-always-on;
 486 };
 487
 488 &twl {
 489         twl_audio: audio {
 490                 compatible = "ti,twl4030-audio";
 491                 ti,enable-vibra = <1>;
 492         };
 493
 494         twl_power: power {
 495                 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
 496                 ti,use_poweroff;
 497         };
 498 };
 499
 500 &twl_keypad {
 501         linux,keymap = < MATRIX_KEY(0x00, 0x00, KEY_Q)
 502                          MATRIX_KEY(0x00, 0x01, KEY_O)
 503                          MATRIX_KEY(0x00, 0x02, KEY_P)
 504                          MATRIX_KEY(0x00, 0x03, KEY_COMMA)
 505                          MATRIX_KEY(0x00, 0x04, KEY_BACKSPACE)
 506                          MATRIX_KEY(0x00, 0x06, KEY_A)
 507                          MATRIX_KEY(0x00, 0x07, KEY_S)
 508
 509                          MATRIX_KEY(0x01, 0x00, KEY_W)
 510                          MATRIX_KEY(0x01, 0x01, KEY_D)
 511                          MATRIX_KEY(0x01, 0x02, KEY_F)
 512                          MATRIX_KEY(0x01, 0x03, KEY_G)
 513                          MATRIX_KEY(0x01, 0x04, KEY_H)
 514                          MATRIX_KEY(0x01, 0x05, KEY_J)
 515                          MATRIX_KEY(0x01, 0x06, KEY_K)
 516                          MATRIX_KEY(0x01, 0x07, KEY_L)
 517
 518                          MATRIX_KEY(0x02, 0x00, KEY_E)
 519                          MATRIX_KEY(0x02, 0x01, KEY_DOT)
 520                          MATRIX_KEY(0x02, 0x02, KEY_UP)
 521                          MATRIX_KEY(0x02, 0x03, KEY_ENTER)
 522                          MATRIX_KEY(0x02, 0x05, KEY_Z)
 523                          MATRIX_KEY(0x02, 0x06, KEY_X)
 524                          MATRIX_KEY(0x02, 0x07, KEY_C)
 525                          MATRIX_KEY(0x02, 0x08, KEY_F9)
 526
 527                          MATRIX_KEY(0x03, 0x00, KEY_R)
 528                          MATRIX_KEY(0x03, 0x01, KEY_V)
 529                          MATRIX_KEY(0x03, 0x02, KEY_B)
 530                          MATRIX_KEY(0x03, 0x03, KEY_N)
 531                          MATRIX_KEY(0x03, 0x04, KEY_M)
 532                          MATRIX_KEY(0x03, 0x05, KEY_SPACE)
 533                          MATRIX_KEY(0x03, 0x06, KEY_SPACE)
 534                          MATRIX_KEY(0x03, 0x07, KEY_LEFT)
 535
 536                          MATRIX_KEY(0x04, 0x00, KEY_T)
 537                          MATRIX_KEY(0x04, 0x01, KEY_DOWN)
 538                          MATRIX_KEY(0x04, 0x02, KEY_RIGHT)
 539                          MATRIX_KEY(0x04, 0x04, KEY_LEFTCTRL)
 540                          MATRIX_KEY(0x04, 0x05, KEY_RIGHTALT)
 541                          MATRIX_KEY(0x04, 0x06, KEY_LEFTSHIFT)
 542                          MATRIX_KEY(0x04, 0x08, KEY_F10)
 543
 544                          MATRIX_KEY(0x05, 0x00, KEY_Y)
 545                          MATRIX_KEY(0x05, 0x08, KEY_F11)
 546
 547                          MATRIX_KEY(0x06, 0x00, KEY_U)
 548
 549                          MATRIX_KEY(0x07, 0x00, KEY_I)
 550                          MATRIX_KEY(0x07, 0x01, KEY_F7)
 551                          MATRIX_KEY(0x07, 0x02, KEY_F8)
 552                          >;
 553 };
 554
 555 &twl_gpio {
 556         ti,pullups      = <0x0>;
 557         ti,pulldowns    = <0x03ff3f>; /* BIT(0..5) | BIT(8..17) */
 558 };
 559
 560 &i2c2 {
 561         pinctrl-names = "default";
 562         pinctrl-0 = <&i2c2_pins>;
 563
 564         clock-frequency = <100000>;
 565
 566         tlv320aic3x: tlv320aic3x@18 {
 567                 compatible = "ti,tlv320aic3x";
 568                 reg = <0x18>;
 569                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 570                 ai3x-gpio-func = <
 571                         0 /* AIC3X_GPIO1_FUNC_DISABLED */
 572                         5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
 573                 >;
 574
 575                 AVDD-supply = <&vmmc2>;
 576                 DRVDD-supply = <&vmmc2>;
 577                 IOVDD-supply = <&vio>;
 578                 DVDD-supply = <&vio>;
 579
 580                 ai3x-micbias-vg = <1>;
 581         };
 582
 583         tlv320aic3x_aux: tlv320aic3x@19 {
 584                 compatible = "ti,tlv320aic3x";
 585                 reg = <0x19>;
 586                 reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* 60 */
 587
 588                 AVDD-supply = <&vmmc2>;
 589                 DRVDD-supply = <&vmmc2>;
 590                 IOVDD-supply = <&vio>;
 591                 DVDD-supply = <&vio>;
 592
 593                 ai3x-micbias-vg = <2>;
 594         };
 595
 596         tsl2563: tsl2563@29 {
 597                 compatible = "amstaos,tsl2563";
 598                 reg = <0x29>;
 599
 600                 amstaos,cover-comp-gain = <16>;
 601         };
 602
 603         adp1653: led-controller@30 {
 604                 compatible = "adi,adp1653";
 605                 reg = <0x30>;
 606                 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* 88 */
 607
 608                 flash {
 609                         flash-timeout-us = <500000>;
 610                         flash-max-microamp = <320000>;
 611                         led-max-microamp = <50000>;
 612                 };
 613                 indicator {
 614                         led-max-microamp = <17500>;
 615                 };
 616         };
 617
 618         lp5523: lp5523@32 {
 619                 compatible = "national,lp5523";
 620                 reg = <0x32>;
 621                 clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
 622                 enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
 623
 624                 chan0 {
 625                         chan-name = "lp5523:kb1";
 626                         led-cur = /bits/ 8 <50>;
 627                         max-cur = /bits/ 8 <100>;
 628                 };
 629
 630                 chan1 {
 631                         chan-name = "lp5523:kb2";
 632                         led-cur = /bits/ 8 <50>;
 633                         max-cur = /bits/ 8 <100>;
 634                 };
 635
 636                 chan2 {
 637                         chan-name = "lp5523:kb3";
 638                         led-cur = /bits/ 8 <50>;
 639                         max-cur = /bits/ 8 <100>;
 640                 };
 641
 642                 chan3 {
 643                         chan-name = "lp5523:kb4";
 644                         led-cur = /bits/ 8 <50>;
 645                         max-cur = /bits/ 8 <100>;
 646                 };
 647
 648                 chan4 {
 649                         chan-name = "lp5523:b";
 650                         led-cur = /bits/ 8 <50>;
 651                         max-cur = /bits/ 8 <100>;
 652                 };
 653
 654                 chan5 {
 655                         chan-name = "lp5523:g";
 656                         led-cur = /bits/ 8 <50>;
 657                         max-cur = /bits/ 8 <100>;
 658                 };
 659
 660                 chan6 {
 661                         chan-name = "lp5523:r";
 662                         led-cur = /bits/ 8 <50>;
 663                         max-cur = /bits/ 8 <100>;
 664                 };
 665
 666                 chan7 {
 667                         chan-name = "lp5523:kb5";
 668                         led-cur = /bits/ 8 <50>;
 669                         max-cur = /bits/ 8 <100>;
 670                 };
 671
 672                 chan8 {
 673                         chan-name = "lp5523:kb6";
 674                         led-cur = /bits/ 8 <50>;
 675                         max-cur = /bits/ 8 <100>;
 676                 };
 677         };
 678
 679         bq27200: bq27200@55 {
 680                 compatible = "ti,bq27200";
 681                 reg = <0x55>;
 682                 power-supplies = <&bq24150a>;
 683         };
 684
 685         /* Stereo headphone amplifier */
 686         tpa6130a2: tpa6130a2@60 {
 687                 compatible = "ti,tpa6130a2";
 688                 reg = <0x60>;
 689
 690                 Vdd-supply = <&vmmc2>;
 691
 692                 power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; /* 98 */
 693         };
 694
 695         si4713: si4713@63 {
 696                 compatible = "silabs,si4713";
 697                 reg = <0x63>;
 698
 699                 interrupts-extended = <&gpio2 21 IRQ_TYPE_EDGE_FALLING>; /* 53 */
 700                 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
 701                 vio-supply = <&vio>;
 702                 vdd-supply = <&vaux1>;
 703         };
 704
 705         bq24150a: bq24150a@6b {
 706                 compatible = "ti,bq24150a";
 707                 reg = <0x6b>;
 708
 709                 ti,current-limit = <100>;
 710                 ti,weak-battery-voltage = <3400>;
 711                 ti,battery-regulation-voltage = <4200>;
 712                 ti,charge-current = <650>;
 713                 ti,termination-current = <100>;
 714                 ti,resistor-sense = <68>;
 715
 716                 ti,usb-charger-detection = <&isp1707>;
 717         };
 718 };
 719
 720 &i2c3 {
 721         pinctrl-names = "default";
 722         pinctrl-0 = <&i2c3_pins>;
 723
 724         clock-frequency = <400000>;
 725
 726         lis302dl: lis3lv02d@1d {
 727                 compatible = "st,lis3lv02d";
 728                 reg = <0x1d>;
 729
 730                 Vdd-supply = <&vaux1>;
 731                 Vdd_IO-supply = <&vio>;
 732
 733                 interrupt-parent = <&gpio6>;
 734                 interrupts = <21 20>; /* 181 and 180 */
 735
 736                 /* click flags */
 737                 st,click-single-x;
 738                 st,click-single-y;
 739                 st,click-single-z;
 740
 741                 /* Limits are 0.5g * value */
 742                 st,click-threshold-x = <8>;
 743                 st,click-threshold-y = <8>;
 744                 st,click-threshold-z = <10>;
 745
 746                 /* Click must be longer than time limit */
 747                 st,click-time-limit = <9>;
 748
 749                 /* Kind of debounce filter */
 750                 st,click-latency = <50>;
 751
 752                 /* Interrupt line 2 for click detection */
 753                 st,irq2-click;
 754
 755                 st,wakeup-x-hi;
 756                 st,wakeup-y-hi;
 757                 st,wakeup-threshold = <(800/18)>; /* millig-value / 18 to get HW values */
 758
 759                 st,wakeup2-z-hi;
 760                 st,wakeup2-threshold = <(900/18)>; /* millig-value / 18 to get HW values */
 761
 762                 st,hipass1-disable;
 763                 st,hipass2-disable;
 764
 765                 st,axis-x = <1>;    /* LIS3_DEV_X */
 766                 st,axis-y = <(-2)>; /* LIS3_INV_DEV_Y */
 767                 st,axis-z = <(-3)>; /* LIS3_INV_DEV_Z */
 768
 769                 st,min-limit-x = <(-32)>;
 770                 st,min-limit-y = <3>;
 771                 st,min-limit-z = <3>;
 772
 773                 st,max-limit-x = <(-3)>;
 774                 st,max-limit-y = <32>;
 775                 st,max-limit-z = <32>;
 776         };
 777
 778         cam1: camera@3e {
 779                 compatible = "toshiba,et8ek8";
 780                 reg = <0x3e>;
 781
 782                 vana-supply = <&vaux4>;
 783
 784                 clocks = <&isp 0>;
 785                 clock-names = "extclk";
 786                 clock-frequency = <9600000>;
 787
 788                 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
 789
 790                 lens-focus = <&ad5820>;
 791
 792                 port {
 793                         csi_cam1: endpoint {
 794                                 bus-type = <3>; /* CCP2 */
 795                                 strobe = <1>;
 796                                 clock-inv = <0>;
 797                                 crc = <1>;
 798
 799                                 remote-endpoint = <&csi_isp>;
 800                         };
 801                 };
 802         };
 803
 804         /* D/A converter for auto-focus */
 805         ad5820: dac@c {
 806                 compatible = "adi,ad5820";
 807                 reg = <0x0c>;
 808
 809                 VANA-supply = <&vaux4>;
 810
 811                 #io-channel-cells = <0>;
 812         };
 813 };
 814
 815 &mmc1 {
 816         pinctrl-names = "default";
 817         pinctrl-0 = <&mmc1_pins>;
 818         vmmc-supply = <&vmmc1>;
 819         bus-width = <4>;
 820         /* For debugging, it is often good idea to remove this GPIO.
 821            It means you can remove back cover (to reboot by removing
 822            battery) and still use the MMC card. */
 823         cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
 824 };
 825
 826 /* most boards use vaux3, only some old versions use vmmc2 instead */
 827 &mmc2 {
 828         pinctrl-names = "default";
 829         pinctrl-0 = <&mmc2_pins>;
 830         vmmc-supply = <&vaux3>;
 831         vqmmc-supply = <&vsim>;
 832         bus-width = <8>;
 833         non-removable;
 834         no-sdio;
 835         no-sd;
 836 };
 837
 838 &mmc3 {
 839         status = "disabled";
 840 };
 841
 842 &gpmc {
 843         ranges = <0 0 0x01000000 0x01000000>,   /* 16 MB for OneNAND */
 844                  <1 0 0x02000000 0x01000000>;   /* 16 MB for smc91c96 */
 845         pinctrl-names = "default";
 846         pinctrl-0 = <&gpmc_pins>;
 847
 848         /* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 849         onenand@0,0 {
 850                 #address-cells = <1>;
 851                 #size-cells = <1>;
 852                 compatible = "ti,omap2-onenand";
 853                 reg = <0 0 0x20000>;    /* CS0, offset 0, IO size 128K */
 854
 855                 /*
 856                  * These timings are based on CONFIG_OMAP_GPMC_DEBUG=y reported
 857                  * bootloader set values when booted with v5.1
 858                  * (OneNAND Manufacturer: Samsung):
 859                  *
 860                  *   cs0 GPMC_CS_CONFIG1: 0xfb001202
 861                  *   cs0 GPMC_CS_CONFIG2: 0x00111100
 862                  *   cs0 GPMC_CS_CONFIG3: 0x00020200
 863                  *   cs0 GPMC_CS_CONFIG4: 0x11001102
 864                  *   cs0 GPMC_CS_CONFIG5: 0x03101616
 865                  *   cs0 GPMC_CS_CONFIG6: 0x90060000
 866                  */
 867                 gpmc,sync-read;
 868                 gpmc,sync-write;
 869                 gpmc,burst-length = <16>;
 870                 gpmc,burst-read;
 871                 gpmc,burst-wrap;
 872                 gpmc,burst-write;
 873                 gpmc,device-width = <2>;
 874                 gpmc,mux-add-data = <2>;
 875                 gpmc,cs-on-ns = <0>;
 876                 gpmc,cs-rd-off-ns = <102>;
 877                 gpmc,cs-wr-off-ns = <102>;
 878                 gpmc,adv-on-ns = <0>;
 879                 gpmc,adv-rd-off-ns = <12>;
 880                 gpmc,adv-wr-off-ns = <12>;
 881                 gpmc,oe-on-ns = <12>;
 882                 gpmc,oe-off-ns = <102>;
 883                 gpmc,we-on-ns = <0>;
 884                 gpmc,we-off-ns = <102>;
 885                 gpmc,rd-cycle-ns = <132>;
 886                 gpmc,wr-cycle-ns = <132>;
 887                 gpmc,access-ns = <96>;
 888                 gpmc,page-burst-access-ns = <18>;
 889                 gpmc,bus-turnaround-ns = <0>;
 890                 gpmc,cycle2cycle-delay-ns = <0>;
 891                 gpmc,wait-monitoring-ns = <0>;
 892                 gpmc,clk-activation-ns = <6>;
 893                 gpmc,wr-data-mux-bus-ns = <36>;
 894                 gpmc,wr-access-ns = <96>;
 895                 gpmc,sync-clk-ps = <15000>;
 896
 897                 /*
 898                  * MTD partition table corresponding to Nokia's
 899                  * Maemo 5 (Fremantle) release.
 900                  */
 901                 partition@0 {
 902                         label = "bootloader";
 903                         reg = <0x00000000 0x00020000>;
 904                         read-only;
 905                 };
 906                 partition@1 {
 907                         label = "config";
 908                         reg = <0x00020000 0x00060000>;
 909                 };
 910                 partition@2 {
 911                         label = "log";
 912                         reg = <0x00080000 0x00040000>;
 913                 };
 914                 partition@3 {
 915                         label = "kernel";
 916                         reg = <0x000c0000 0x00200000>;
 917                 };
 918                 partition@4 {
 919                         label = "initfs";
 920                         reg = <0x002c0000 0x00200000>;
 921                 };
 922                 partition@5 {
 923                         label = "rootfs";
 924                         reg = <0x004c0000 0x0fb40000>;
 925                 };
 926         };
 927
 928         /* Ethernet is on some early development boards and qemu */
 929         ethernet@gpmc {
 930                 compatible = "smsc,lan91c94";
 931                 interrupt-parent = <&gpio2>;
 932                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;  /* gpio54 */
 933                 reg = <1 0 0xf>;                /* 16 byte IO range */
 934                 bank-width = <2>;
 935                 pinctrl-names = "default";
 936                 pinctrl-0 = <&ethernet_pins>;
 937                 power-gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>;     /* gpio86 */
 938                 reset-gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;      /* gpio164 */
 939                 gpmc,device-width = <2>;
 940                 gpmc,sync-clk-ps = <0>;
 941                 gpmc,cs-on-ns = <0>;
 942                 gpmc,cs-rd-off-ns = <48>;
 943                 gpmc,cs-wr-off-ns = <24>;
 944                 gpmc,adv-on-ns = <0>;
 945                 gpmc,adv-rd-off-ns = <0>;
 946                 gpmc,adv-wr-off-ns = <0>;
 947                 gpmc,we-on-ns = <12>;
 948                 gpmc,we-off-ns = <18>;
 949                 gpmc,oe-on-ns = <12>;
 950                 gpmc,oe-off-ns = <48>;
 951                 gpmc,page-burst-access-ns = <0>;
 952                 gpmc,access-ns = <42>;
 953                 gpmc,rd-cycle-ns = <180>;
 954                 gpmc,wr-cycle-ns = <180>;
 955                 gpmc,bus-turnaround-ns = <0>;
 956                 gpmc,cycle2cycle-delay-ns = <0>;
 957                 gpmc,wait-monitoring-ns = <0>;
 958                 gpmc,clk-activation-ns = <0>;
 959                 gpmc,wr-access-ns = <0>;
 960                 gpmc,wr-data-mux-bus-ns = <12>;
 961         };
 962 };
 963
 964 &mcspi1 {
 965         /*
 966          * For some reason, touchscreen is necessary for screen to work at
 967          * all on real hw. It works well without it on emulator.
 968          *
 969          * Also... order in the device tree actually matters here.
 970          */
 971         tsc2005@0 {
 972                 compatible = "ti,tsc2005";
 973                 spi-max-frequency = <6000000>;
 974                 reg = <0>;
 975
 976                 vio-supply = <&vio>;
 977
 978                 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
 979                 interrupts-extended = <&gpio4 4 IRQ_TYPE_EDGE_RISING>; /* 100 */
 980
 981                 touchscreen-fuzz-x = <4>;
 982                 touchscreen-fuzz-y = <7>;
 983                 touchscreen-fuzz-pressure = <2>;
 984                 touchscreen-size-x = <4096>;
 985                 touchscreen-size-y = <4096>;
 986                 touchscreen-max-pressure = <2048>;
 987
 988                 ti,x-plate-ohms = <280>;
 989                 ti,esd-recovery-timeout-ms = <8000>;
 990         };
 991
 992         lcd: acx565akm@2 {
 993                 compatible = "sony,acx565akm";
 994                 spi-max-frequency = <6000000>;
 995                 reg = <2>;
 996
 997                 pinctrl-names = "default";
 998                 pinctrl-0 = <&acx565akm_pins>;
 999
1000                 label = "lcd";
1001                 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
1002
1003                 port {
1004                         lcd_in: endpoint {
1005                                 remote-endpoint = <&sdi_out>;
1006                         };
1007                 };
1008         };
1009 };
1010
1011 &mcspi4 {
1012         pinctrl-names = "default";
1013         pinctrl-0 = <&mcspi4_pins>;
1014
1015         wl1251@0 {
1016                 pinctrl-names = "default";
1017                 pinctrl-0 = <&wl1251_pins>;
1018
1019                 vio-supply = <&vio>;
1020
1021                 compatible = "ti,wl1251";
1022                 reg = <0>;
1023                 spi-max-frequency = <48000000>;
1024
1025                 spi-cpol;
1026                 spi-cpha;
1027
1028                 ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */
1029
1030                 interrupt-parent = <&gpio2>;
1031                 interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */
1032
1033                 clocks = <&vctcxo>;
1034         };
1035 };
1036
1037 &usb_otg_hs {
1038         interface-type = <0>;
1039         usb-phy = <&usb2_phy>;
1040         phys = <&usb2_phy>;
1041         phy-names = "usb2-phy";
1042         mode = <2>;
1043         power = <50>;
1044 };
1045
1046 &uart1 {
1047         status = "disabled";
1048 };
1049
1050 &uart2 {
1051         pinctrl-names = "default";
1052         pinctrl-0 = <&uart2_pins>;
1053
1054         bcm2048: bluetooth {
1055                 compatible = "brcm,bcm2048-nokia", "nokia,h4p-bluetooth";
1056                 reset-gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; /* 91 */
1057                 host-wakeup-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* 101 */
1058                 bluetooth-wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* 37 */
1059                 clocks = <&vctcxo>;
1060                 clock-names = "sysclk";
1061         };
1062 };
1063
1064 &uart3 {
1065         interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
1066         pinctrl-names = "default";
1067         pinctrl-0 = <&uart3_pins>;
1068 };
1069
1070 &dss {
1071         status = "ok";
1072
1073         pinctrl-names = "default";
1074         pinctrl-0 = <&dss_sdi_pins>;
1075
1076         vdds_sdi-supply = <&vaux1>;
1077
1078         ports {
1079                 #address-cells = <1>;
1080                 #size-cells = <0>;
1081
1082                 port@1 {
1083                         reg = <1>;
1084
1085                         sdi_out: endpoint {
1086                                 remote-endpoint = <&lcd_in>;
1087                                 datapairs = <2>;
1088                         };
1089                 };
1090         };
1091 };
1092
1093 &venc {
1094         status = "ok";
1095
1096         vdda-supply = <&vdac>;
1097
1098         port {
1099                 venc_out: endpoint {
1100                         remote-endpoint = <&tv_connector_in>;
1101                         ti,channels = <1>;
1102                 };
1103         };
1104 };
1105
1106 &mcbsp2 {
1107         status = "ok";
1108 };
1109
1110 &ssi_port1 {
1111         pinctrl-names = "default";
1112         pinctrl-0 = <&ssi_pins>;
1113
1114         ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
1115
1116         modem: hsi-client {
1117                 compatible = "nokia,n900-modem";
1118
1119                 pinctrl-names = "default";
1120                 pinctrl-0 = <&modem_pins>;
1121
1122                 hsi-channel-ids = <0>, <1>, <2>, <3>;
1123                 hsi-channel-names = "mcsaab-control",
1124                                     "speech-control",
1125                                     "speech-data",
1126                                     "mcsaab-data";
1127                 hsi-speed-kbps = <55000>;
1128                 hsi-mode = "frame";
1129                 hsi-flow = "synchronized";
1130                 hsi-arb-mode = "round-robin";
1131
1132                 interrupts-extended = <&gpio3 8 IRQ_TYPE_EDGE_FALLING>; /* 72 */
1133
1134                 gpios = <&gpio3  6 GPIO_ACTIVE_HIGH>, /* 70 */
1135                         <&gpio3  9 GPIO_ACTIVE_HIGH>, /* 73 */
1136                         <&gpio3 10 GPIO_ACTIVE_HIGH>, /* 74 */
1137                         <&gpio3 11 GPIO_ACTIVE_HIGH>, /* 75 */
1138                         <&gpio5 29 GPIO_ACTIVE_HIGH>; /* 157 */
1139                 gpio-names = "cmt_apeslpx",
1140                              "cmt_rst_rq",
1141                              "cmt_en",
1142                              "cmt_rst",
1143                              "cmt_bsi";
1144         };
1145 };
1146
1147 &ssi_port2 {
1148         status = "disabled";
1149 };