arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/pinctrl/omap.h>
  12
  13 / {
  14         compatible = "ti,omap4430", "ti,omap4";
  15         interrupt-parent = <&wakeupgen>;
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18         chosen { };
  19
  20         aliases {
  21                 i2c0 = &i2c1;
  22                 i2c1 = &i2c2;
  23                 i2c2 = &i2c3;
  24                 i2c3 = &i2c4;
  25                 mmc0 = &mmc1;
  26                 mmc1 = &mmc2;
  27                 mmc2 = &mmc3;
  28                 mmc3 = &mmc4;
  29                 mmc4 = &mmc5;
  30                 serial0 = &uart1;
  31                 serial1 = &uart2;
  32                 serial2 = &uart3;
  33                 serial3 = &uart4;
  34         };
  35
  36         cpus {
  37                 #address-cells = <1>;
  38                 #size-cells = <0>;
  39
  40                 cpu@0 {
  41                         compatible = "arm,cortex-a9";
  42                         device_type = "cpu";
  43                         next-level-cache = <&L2>;
  44                         reg = <0x0>;
  45
  46                         clocks = <&dpll_mpu_ck>;
  47                         clock-names = "cpu";
  48
  49                         clock-latency = <300000>; /* From omap-cpufreq driver */
  50                 };
  51                 cpu@1 {
  52                         compatible = "arm,cortex-a9";
  53                         device_type = "cpu";
  54                         next-level-cache = <&L2>;
  55                         reg = <0x1>;
  56                 };
  57         };
  58
  59         gic: interrupt-controller@48241000 {
  60                 compatible = "arm,cortex-a9-gic";
  61                 interrupt-controller;
  62                 #interrupt-cells = <3>;
  63                 reg = <0x48241000 0x1000>,
  64                       <0x48240100 0x0100>;
  65                 interrupt-parent = <&gic>;
  66         };
  67
  68         L2: l2-cache-controller@48242000 {
  69                 compatible = "arm,pl310-cache";
  70                 reg = <0x48242000 0x1000>;
  71                 cache-unified;
  72                 cache-level = <2>;
  73         };
  74
  75         local-timer@48240600 {
  76                 compatible = "arm,cortex-a9-twd-timer";
  77                 clocks = <&mpu_periphclk>;
  78                 reg = <0x48240600 0x20>;
  79                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_EDGE_RISING)>;
  80                 interrupt-parent = <&gic>;
  81         };
  82
  83         wakeupgen: interrupt-controller@48281000 {
  84                 compatible = "ti,omap4-wugen-mpu";
  85                 interrupt-controller;
  86                 #interrupt-cells = <3>;
  87                 reg = <0x48281000 0x1000>;
  88                 interrupt-parent = <&gic>;
  89         };
  90
  91         /*
  92          * The soc node represents the soc top level view. It is used for IPs
  93          * that are not memory mapped in the MPU view or for the MPU itself.
  94          */
  95         soc {
  96                 compatible = "ti,omap-infra";
  97                 mpu {
  98                         compatible = "ti,omap4-mpu";
  99                         ti,hwmods = "mpu";
 100                         sram = <&ocmcram>;
 101                 };
 102
 103                 dsp {
 104                         compatible = "ti,omap3-c64";
 105                         ti,hwmods = "dsp";
 106                 };
 107
 108                 iva {
 109                         compatible = "ti,ivahd";
 110                         ti,hwmods = "iva";
 111                 };
 112         };
 113
 114         /*
 115          * XXX: Use a flat representation of the OMAP4 interconnect.
 116          * The real OMAP interconnect network is quite complex.
 117          * Since it will not bring real advantage to represent that in DT for
 118          * the moment, just use a fake OCP bus entry to represent the whole bus
 119          * hierarchy.
 120          */
 121         ocp {
 122                 compatible = "ti,omap4-l3-noc", "simple-bus";
 123                 #address-cells = <1>;
 124                 #size-cells = <1>;
 125                 ranges;
 126                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 127                 reg = <0x44000000 0x1000>,
 128                       <0x44800000 0x2000>,
 129                       <0x45000000 0x1000>;
 130                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 131                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 132
 133                 l4_cfg: l4@4a000000 {
 134                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 135                         #address-cells = <1>;
 136                         #size-cells = <1>;
 137                         ranges = <0 0x4a000000 0x1000000>;
 138
 139                         cm1: cm1@4000 {
 140                                 compatible = "ti,omap4-cm1";
 141                                 reg = <0x4000 0x2000>;
 142
 143                                 cm1_clocks: clocks {
 144                                         #address-cells = <1>;
 145                                         #size-cells = <0>;
 146                                 };
 147
 148                                 cm1_clockdomains: clockdomains {
 149                                 };
 150                         };
 151
 152                         cm2: cm2@8000 {
 153                                 compatible = "ti,omap4-cm2";
 154                                 reg = <0x8000 0x3000>;
 155
 156                                 cm2_clocks: clocks {
 157                                         #address-cells = <1>;
 158                                         #size-cells = <0>;
 159                                 };
 160
 161                                 cm2_clockdomains: clockdomains {
 162                                 };
 163                         };
 164
 165                         omap4_scm_core: scm@2000 {
 166                                 compatible = "ti,omap4-scm-core", "simple-bus";
 167                                 reg = <0x2000 0x1000>;
 168                                 #address-cells = <1>;
 169                                 #size-cells = <1>;
 170                                 ranges = <0 0x2000 0x1000>;
 171
 172                                 scm_conf: scm_conf@0 {
 173                                         compatible = "syscon";
 174                                         reg = <0x0 0x800>;
 175                                         #address-cells = <1>;
 176                                         #size-cells = <1>;
 177                                 };
 178                         };
 179
 180                         omap4_padconf_core: scm@100000 {
 181                                 compatible = "ti,omap4-scm-padconf-core",
 182                                              "simple-bus";
 183                                 #address-cells = <1>;
 184                                 #size-cells = <1>;
 185                                 ranges = <0 0x100000 0x1000>;
 186
 187                                 omap4_pmx_core: pinmux@40 {
 188                                         compatible = "ti,omap4-padconf",
 189                                                      "pinctrl-single";
 190                                         reg = <0x40 0x0196>;
 191                                         #address-cells = <1>;
 192                                         #size-cells = <0>;
 193                                         #interrupt-cells = <1>;
 194                                         interrupt-controller;
 195                                         pinctrl-single,register-width = <16>;
 196                                         pinctrl-single,function-mask = <0x7fff>;
 197                                 };
 198
 199                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 200                                         compatible = "syscon",
 201                                                      "simple-bus";
 202                                         reg = <0x5a0 0x170>;
 203                                         #address-cells = <1>;
 204                                         #size-cells = <1>;
 205                                         ranges = <0 0x5a0 0x170>;
 206
 207                                         pbias_regulator: pbias_regulator@60 {
 208                                                 compatible = "ti,pbias-omap4", "ti,pbias-omap";
 209                                                 reg = <0x60 0x4>;
 210                                                 syscon = <&omap4_padconf_global>;
 211                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 212                                                         regulator-name = "pbias_mmc_omap4";
 213                                                         regulator-min-microvolt = <1800000>;
 214                                                         regulator-max-microvolt = <3000000>;
 215                                                 };
 216                                         };
 217                                 };
 218                         };
 219
 220                         l4_wkup: l4@300000 {
 221                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 222                                 #address-cells = <1>;
 223                                 #size-cells = <1>;
 224                                 ranges = <0 0x300000 0x40000>;
 225
 226                                 counter32k: counter@4000 {
 227                                         compatible = "ti,omap-counter32k";
 228                                         reg = <0x4000 0x20>;
 229                                         ti,hwmods = "counter_32k";
 230                                 };
 231
 232                                 prm: prm@6000 {
 233                                         compatible = "ti,omap4-prm";
 234                                         reg = <0x6000 0x3000>;
 235                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 236
 237                                         prm_clocks: clocks {
 238                                                 #address-cells = <1>;
 239                                                 #size-cells = <0>;
 240                                         };
 241
 242                                         prm_clockdomains: clockdomains {
 243                                         };
 244                                 };
 245
 246                                 scrm: scrm@a000 {
 247                                         compatible = "ti,omap4-scrm";
 248                                         reg = <0xa000 0x2000>;
 249
 250                                         scrm_clocks: clocks {
 251                                                 #address-cells = <1>;
 252                                                 #size-cells = <0>;
 253                                         };
 254
 255                                         scrm_clockdomains: clockdomains {
 256                                         };
 257                                 };
 258
 259                                 omap4_pmx_wkup: pinmux@1e040 {
 260                                         compatible = "ti,omap4-padconf",
 261                                                      "pinctrl-single";
 262                                         reg = <0x1e040 0x0038>;
 263                                         #address-cells = <1>;
 264                                         #size-cells = <0>;
 265                                         #interrupt-cells = <1>;
 266                                         interrupt-controller;
 267                                         pinctrl-single,register-width = <16>;
 268                                         pinctrl-single,function-mask = <0x7fff>;
 269                                 };
 270                         };
 271                 };
 272
 273                 ocmcram: ocmcram@40304000 {
 274                         compatible = "mmio-sram";
 275                         reg = <0x40304000 0xa000>; /* 40k */
 276                 };
 277
 278                 sdma: dma-controller@4a056000 {
 279                         compatible = "ti,omap4430-sdma";
 280                         reg = <0x4a056000 0x1000>;
 281                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 282                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 283                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 284                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 285                         #dma-cells = <1>;
 286                         dma-channels = <32>;
 287                         dma-requests = <127>;
 288                 };
 289
 290                 gpio1: gpio@4a310000 {
 291                         compatible = "ti,omap4-gpio";
 292                         reg = <0x4a310000 0x200>;
 293                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 294                         ti,hwmods = "gpio1";
 295                         ti,gpio-always-on;
 296                         gpio-controller;
 297                         #gpio-cells = <2>;
 298                         interrupt-controller;
 299                         #interrupt-cells = <2>;
 300                 };
 301
 302                 gpio2: gpio@48055000 {
 303                         compatible = "ti,omap4-gpio";
 304                         reg = <0x48055000 0x200>;
 305                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 306                         ti,hwmods = "gpio2";
 307                         gpio-controller;
 308                         #gpio-cells = <2>;
 309                         interrupt-controller;
 310                         #interrupt-cells = <2>;
 311                 };
 312
 313                 gpio3: gpio@48057000 {
 314                         compatible = "ti,omap4-gpio";
 315                         reg = <0x48057000 0x200>;
 316                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 317                         ti,hwmods = "gpio3";
 318                         gpio-controller;
 319                         #gpio-cells = <2>;
 320                         interrupt-controller;
 321                         #interrupt-cells = <2>;
 322                 };
 323
 324                 gpio4: gpio@48059000 {
 325                         compatible = "ti,omap4-gpio";
 326                         reg = <0x48059000 0x200>;
 327                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 328                         ti,hwmods = "gpio4";
 329                         gpio-controller;
 330                         #gpio-cells = <2>;
 331                         interrupt-controller;
 332                         #interrupt-cells = <2>;
 333                 };
 334
 335                 gpio5: gpio@4805b000 {
 336                         compatible = "ti,omap4-gpio";
 337                         reg = <0x4805b000 0x200>;
 338                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 339                         ti,hwmods = "gpio5";
 340                         gpio-controller;
 341                         #gpio-cells = <2>;
 342                         interrupt-controller;
 343                         #interrupt-cells = <2>;
 344                 };
 345
 346                 gpio6: gpio@4805d000 {
 347                         compatible = "ti,omap4-gpio";
 348                         reg = <0x4805d000 0x200>;
 349                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 350                         ti,hwmods = "gpio6";
 351                         gpio-controller;
 352                         #gpio-cells = <2>;
 353                         interrupt-controller;
 354                         #interrupt-cells = <2>;
 355                 };
 356
 357                 elm: elm@48078000 {
 358                         compatible = "ti,am3352-elm";
 359                         reg = <0x48078000 0x2000>;
 360                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 361                         ti,hwmods = "elm";
 362                         status = "disabled";
 363                 };
 364
 365                 gpmc: gpmc@50000000 {
 366                         compatible = "ti,omap4430-gpmc";
 367                         reg = <0x50000000 0x1000>;
 368                         #address-cells = <2>;
 369                         #size-cells = <1>;
 370                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 371                         dmas = <&sdma 4>;
 372                         dma-names = "rxtx";
 373                         gpmc,num-cs = <8>;
 374                         gpmc,num-waitpins = <4>;
 375                         ti,hwmods = "gpmc";
 376                         ti,no-idle-on-init;
 377                         clocks = <&l3_div_ck>;
 378                         clock-names = "fck";
 379                         interrupt-controller;
 380                         #interrupt-cells = <2>;
 381                         gpio-controller;
 382                         #gpio-cells = <2>;
 383                 };
 384
 385                 uart1: serial@4806a000 {
 386                         compatible = "ti,omap4-uart";
 387                         reg = <0x4806a000 0x100>;
 388                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 389                         ti,hwmods = "uart1";
 390                         clock-frequency = <48000000>;
 391                 };
 392
 393                 uart2: serial@4806c000 {
 394                         compatible = "ti,omap4-uart";
 395                         reg = <0x4806c000 0x100>;
 396                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 397                         ti,hwmods = "uart2";
 398                         clock-frequency = <48000000>;
 399                 };
 400
 401                 uart3: serial@48020000 {
 402                         compatible = "ti,omap4-uart";
 403                         reg = <0x48020000 0x100>;
 404                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 405                         ti,hwmods = "uart3";
 406                         clock-frequency = <48000000>;
 407                 };
 408
 409                 uart4: serial@4806e000 {
 410                         compatible = "ti,omap4-uart";
 411                         reg = <0x4806e000 0x100>;
 412                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 413                         ti,hwmods = "uart4";
 414                         clock-frequency = <48000000>;
 415                 };
 416
 417                 hwspinlock: spinlock@4a0f6000 {
 418                         compatible = "ti,omap4-hwspinlock";
 419                         reg = <0x4a0f6000 0x1000>;
 420                         ti,hwmods = "spinlock";
 421                         #hwlock-cells = <1>;
 422                 };
 423
 424                 i2c1: i2c@48070000 {
 425                         compatible = "ti,omap4-i2c";
 426                         reg = <0x48070000 0x100>;
 427                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 428                         #address-cells = <1>;
 429                         #size-cells = <0>;
 430                         ti,hwmods = "i2c1";
 431                 };
 432
 433                 i2c2: i2c@48072000 {
 434                         compatible = "ti,omap4-i2c";
 435                         reg = <0x48072000 0x100>;
 436                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 437                         #address-cells = <1>;
 438                         #size-cells = <0>;
 439                         ti,hwmods = "i2c2";
 440                 };
 441
 442                 i2c3: i2c@48060000 {
 443                         compatible = "ti,omap4-i2c";
 444                         reg = <0x48060000 0x100>;
 445                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 446                         #address-cells = <1>;
 447                         #size-cells = <0>;
 448                         ti,hwmods = "i2c3";
 449                 };
 450
 451                 i2c4: i2c@48350000 {
 452                         compatible = "ti,omap4-i2c";
 453                         reg = <0x48350000 0x100>;
 454                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 455                         #address-cells = <1>;
 456                         #size-cells = <0>;
 457                         ti,hwmods = "i2c4";
 458                 };
 459
 460                 mcspi1: spi@48098000 {
 461                         compatible = "ti,omap4-mcspi";
 462                         reg = <0x48098000 0x200>;
 463                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 464                         #address-cells = <1>;
 465                         #size-cells = <0>;
 466                         ti,hwmods = "mcspi1";
 467                         ti,spi-num-cs = <4>;
 468                         dmas = <&sdma 35>,
 469                                <&sdma 36>,
 470                                <&sdma 37>,
 471                                <&sdma 38>,
 472                                <&sdma 39>,
 473                                <&sdma 40>,
 474                                <&sdma 41>,
 475                                <&sdma 42>;
 476                         dma-names = "tx0", "rx0", "tx1", "rx1",
 477                                     "tx2", "rx2", "tx3", "rx3";
 478                 };
 479
 480                 mcspi2: spi@4809a000 {
 481                         compatible = "ti,omap4-mcspi";
 482                         reg = <0x4809a000 0x200>;
 483                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 484                         #address-cells = <1>;
 485                         #size-cells = <0>;
 486                         ti,hwmods = "mcspi2";
 487                         ti,spi-num-cs = <2>;
 488                         dmas = <&sdma 43>,
 489                                <&sdma 44>,
 490                                <&sdma 45>,
 491                                <&sdma 46>;
 492                         dma-names = "tx0", "rx0", "tx1", "rx1";
 493                 };
 494
 495                 mcspi3: spi@480b8000 {
 496                         compatible = "ti,omap4-mcspi";
 497                         reg = <0x480b8000 0x200>;
 498                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 499                         #address-cells = <1>;
 500                         #size-cells = <0>;
 501                         ti,hwmods = "mcspi3";
 502                         ti,spi-num-cs = <2>;
 503                         dmas = <&sdma 15>, <&sdma 16>;
 504                         dma-names = "tx0", "rx0";
 505                 };
 506
 507                 mcspi4: spi@480ba000 {
 508                         compatible = "ti,omap4-mcspi";
 509                         reg = <0x480ba000 0x200>;
 510                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 511                         #address-cells = <1>;
 512                         #size-cells = <0>;
 513                         ti,hwmods = "mcspi4";
 514                         ti,spi-num-cs = <1>;
 515                         dmas = <&sdma 70>, <&sdma 71>;
 516                         dma-names = "tx0", "rx0";
 517                 };
 518
 519                 mmc1: mmc@4809c000 {
 520                         compatible = "ti,omap4-hsmmc";
 521                         reg = <0x4809c000 0x400>;
 522                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 523                         ti,hwmods = "mmc1";
 524                         ti,dual-volt;
 525                         ti,needs-special-reset;
 526                         dmas = <&sdma 61>, <&sdma 62>;
 527                         dma-names = "tx", "rx";
 528                         pbias-supply = <&pbias_mmc_reg>;
 529                 };
 530
 531                 mmc2: mmc@480b4000 {
 532                         compatible = "ti,omap4-hsmmc";
 533                         reg = <0x480b4000 0x400>;
 534                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 535                         ti,hwmods = "mmc2";
 536                         ti,needs-special-reset;
 537                         dmas = <&sdma 47>, <&sdma 48>;
 538                         dma-names = "tx", "rx";
 539                 };
 540
 541                 mmc3: mmc@480ad000 {
 542                         compatible = "ti,omap4-hsmmc";
 543                         reg = <0x480ad000 0x400>;
 544                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 545                         ti,hwmods = "mmc3";
 546                         ti,needs-special-reset;
 547                         dmas = <&sdma 77>, <&sdma 78>;
 548                         dma-names = "tx", "rx";
 549                 };
 550
 551                 mmc4: mmc@480d1000 {
 552                         compatible = "ti,omap4-hsmmc";
 553                         reg = <0x480d1000 0x400>;
 554                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 555                         ti,hwmods = "mmc4";
 556                         ti,needs-special-reset;
 557                         dmas = <&sdma 57>, <&sdma 58>;
 558                         dma-names = "tx", "rx";
 559                 };
 560
 561                 mmc5: mmc@480d5000 {
 562                         compatible = "ti,omap4-hsmmc";
 563                         reg = <0x480d5000 0x400>;
 564                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 565                         ti,hwmods = "mmc5";
 566                         ti,needs-special-reset;
 567                         dmas = <&sdma 59>, <&sdma 60>;
 568                         dma-names = "tx", "rx";
 569                 };
 570
 571                 mmu_dsp: mmu@4a066000 {
 572                         compatible = "ti,omap4-iommu";
 573                         reg = <0x4a066000 0x100>;
 574                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 575                         ti,hwmods = "mmu_dsp";
 576                         #iommu-cells = <0>;
 577                 };
 578
 579                 mmu_ipu: mmu@55082000 {
 580                         compatible = "ti,omap4-iommu";
 581                         reg = <0x55082000 0x100>;
 582                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 583                         ti,hwmods = "mmu_ipu";
 584                         #iommu-cells = <0>;
 585                         ti,iommu-bus-err-back;
 586                 };
 587
 588                 wdt2: wdt@4a314000 {
 589                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 590                         reg = <0x4a314000 0x80>;
 591                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 592                         ti,hwmods = "wd_timer2";
 593                 };
 594
 595                 mcpdm: mcpdm@40132000 {
 596                         compatible = "ti,omap4-mcpdm";
 597                         reg = <0x40132000 0x7f>, /* MPU private access */
 598                               <0x49032000 0x7f>; /* L3 Interconnect */
 599                         reg-names = "mpu", "dma";
 600                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 601                         ti,hwmods = "mcpdm";
 602                         dmas = <&sdma 65>,
 603                                <&sdma 66>;
 604                         dma-names = "up_link", "dn_link";
 605                         status = "disabled";
 606                 };
 607
 608                 dmic: dmic@4012e000 {
 609                         compatible = "ti,omap4-dmic";
 610                         reg = <0x4012e000 0x7f>, /* MPU private access */
 611                               <0x4902e000 0x7f>; /* L3 Interconnect */
 612                         reg-names = "mpu", "dma";
 613                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 614                         ti,hwmods = "dmic";
 615                         dmas = <&sdma 67>;
 616                         dma-names = "up_link";
 617                         status = "disabled";
 618                 };
 619
 620                 mcbsp1: mcbsp@40122000 {
 621                         compatible = "ti,omap4-mcbsp";
 622                         reg = <0x40122000 0xff>, /* MPU private access */
 623                               <0x49022000 0xff>; /* L3 Interconnect */
 624                         reg-names = "mpu", "dma";
 625                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 626                         interrupt-names = "common";
 627                         ti,buffer-size = <128>;
 628                         ti,hwmods = "mcbsp1";
 629                         dmas = <&sdma 33>,
 630                                <&sdma 34>;
 631                         dma-names = "tx", "rx";
 632                         status = "disabled";
 633                 };
 634
 635                 mcbsp2: mcbsp@40124000 {
 636                         compatible = "ti,omap4-mcbsp";
 637                         reg = <0x40124000 0xff>, /* MPU private access */
 638                               <0x49024000 0xff>; /* L3 Interconnect */
 639                         reg-names = "mpu", "dma";
 640                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 641                         interrupt-names = "common";
 642                         ti,buffer-size = <128>;
 643                         ti,hwmods = "mcbsp2";
 644                         dmas = <&sdma 17>,
 645                                <&sdma 18>;
 646                         dma-names = "tx", "rx";
 647                         status = "disabled";
 648                 };
 649
 650                 mcbsp3: mcbsp@40126000 {
 651                         compatible = "ti,omap4-mcbsp";
 652                         reg = <0x40126000 0xff>, /* MPU private access */
 653                               <0x49026000 0xff>; /* L3 Interconnect */
 654                         reg-names = "mpu", "dma";
 655                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 656                         interrupt-names = "common";
 657                         ti,buffer-size = <128>;
 658                         ti,hwmods = "mcbsp3";
 659                         dmas = <&sdma 19>,
 660                                <&sdma 20>;
 661                         dma-names = "tx", "rx";
 662                         status = "disabled";
 663                 };
 664
 665                 mcbsp4: mcbsp@48096000 {
 666                         compatible = "ti,omap4-mcbsp";
 667                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 668                         reg-names = "mpu";
 669                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 670                         interrupt-names = "common";
 671                         ti,buffer-size = <128>;
 672                         ti,hwmods = "mcbsp4";
 673                         dmas = <&sdma 31>,
 674                                <&sdma 32>;
 675                         dma-names = "tx", "rx";
 676                         status = "disabled";
 677                 };
 678
 679                 keypad: keypad@4a31c000 {
 680                         compatible = "ti,omap4-keypad";
 681                         reg = <0x4a31c000 0x80>;
 682                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 683                         reg-names = "mpu";
 684                         ti,hwmods = "kbd";
 685                 };
 686
 687                 dmm@4e000000 {
 688                         compatible = "ti,omap4-dmm";
 689                         reg = <0x4e000000 0x800>;
 690                         interrupts = <0 113 0x4>;
 691                         ti,hwmods = "dmm";
 692                 };
 693
 694                 emif1: emif@4c000000 {
 695                         compatible = "ti,emif-4d";
 696                         reg = <0x4c000000 0x100>;
 697                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 698                         ti,hwmods = "emif1";
 699                         ti,no-idle-on-init;
 700                         phy-type = <1>;
 701                         hw-caps-read-idle-ctrl;
 702                         hw-caps-ll-interface;
 703                         hw-caps-temp-alert;
 704                 };
 705
 706                 emif2: emif@4d000000 {
 707                         compatible = "ti,emif-4d";
 708                         reg = <0x4d000000 0x100>;
 709                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 710                         ti,hwmods = "emif2";
 711                         ti,no-idle-on-init;
 712                         phy-type = <1>;
 713                         hw-caps-read-idle-ctrl;
 714                         hw-caps-ll-interface;
 715                         hw-caps-temp-alert;
 716                 };
 717
 718                 ocp2scp@4a0ad000 {
 719                         compatible = "ti,omap-ocp2scp";
 720                         reg = <0x4a0ad000 0x1f>;
 721                         #address-cells = <1>;
 722                         #size-cells = <1>;
 723                         ranges;
 724                         ti,hwmods = "ocp2scp_usb_phy";
 725                         usb2_phy: usb2phy@4a0ad080 {
 726                                 compatible = "ti,omap-usb2";
 727                                 reg = <0x4a0ad080 0x58>;
 728                                 ctrl-module = <&omap_control_usb2phy>;
 729                                 clocks = <&usb_phy_cm_clk32k>;
 730                                 clock-names = "wkupclk";
 731                                 #phy-cells = <0>;
 732                         };
 733                 };
 734
 735                 mailbox: mailbox@4a0f4000 {
 736                         compatible = "ti,omap4-mailbox";
 737                         reg = <0x4a0f4000 0x200>;
 738                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 739                         ti,hwmods = "mailbox";
 740                         #mbox-cells = <1>;
 741                         ti,mbox-num-users = <3>;
 742                         ti,mbox-num-fifos = <8>;
 743                         mbox_ipu: mbox_ipu {
 744                                 ti,mbox-tx = <0 0 0>;
 745                                 ti,mbox-rx = <1 0 0>;
 746                         };
 747                         mbox_dsp: mbox_dsp {
 748                                 ti,mbox-tx = <3 0 0>;
 749                                 ti,mbox-rx = <2 0 0>;
 750                         };
 751                 };
 752
 753                 timer1: timer@4a318000 {
 754                         compatible = "ti,omap3430-timer";
 755                         reg = <0x4a318000 0x80>;
 756                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 757                         ti,hwmods = "timer1";
 758                         ti,timer-alwon;
 759                 };
 760
 761                 timer2: timer@48032000 {
 762                         compatible = "ti,omap3430-timer";
 763                         reg = <0x48032000 0x80>;
 764                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 765                         ti,hwmods = "timer2";
 766                 };
 767
 768                 timer3: timer@48034000 {
 769                         compatible = "ti,omap4430-timer";
 770                         reg = <0x48034000 0x80>;
 771                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 772                         ti,hwmods = "timer3";
 773                 };
 774
 775                 timer4: timer@48036000 {
 776                         compatible = "ti,omap4430-timer";
 777                         reg = <0x48036000 0x80>;
 778                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 779                         ti,hwmods = "timer4";
 780                 };
 781
 782                 timer5: timer@40138000 {
 783                         compatible = "ti,omap4430-timer";
 784                         reg = <0x40138000 0x80>,
 785                               <0x49038000 0x80>;
 786                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 787                         ti,hwmods = "timer5";
 788                         ti,timer-dsp;
 789                 };
 790
 791                 timer6: timer@4013a000 {
 792                         compatible = "ti,omap4430-timer";
 793                         reg = <0x4013a000 0x80>,
 794                               <0x4903a000 0x80>;
 795                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 796                         ti,hwmods = "timer6";
 797                         ti,timer-dsp;
 798                 };
 799
 800                 timer7: timer@4013c000 {
 801                         compatible = "ti,omap4430-timer";
 802                         reg = <0x4013c000 0x80>,
 803                               <0x4903c000 0x80>;
 804                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 805                         ti,hwmods = "timer7";
 806                         ti,timer-dsp;
 807                 };
 808
 809                 timer8: timer@4013e000 {
 810                         compatible = "ti,omap4430-timer";
 811                         reg = <0x4013e000 0x80>,
 812                               <0x4903e000 0x80>;
 813                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 814                         ti,hwmods = "timer8";
 815                         ti,timer-pwm;
 816                         ti,timer-dsp;
 817                 };
 818
 819                 timer9: timer@4803e000 {
 820                         compatible = "ti,omap4430-timer";
 821                         reg = <0x4803e000 0x80>;
 822                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 823                         ti,hwmods = "timer9";
 824                         ti,timer-pwm;
 825                 };
 826
 827                 timer10: timer@48086000 {
 828                         compatible = "ti,omap3430-timer";
 829                         reg = <0x48086000 0x80>;
 830                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 831                         ti,hwmods = "timer10";
 832                         ti,timer-pwm;
 833                 };
 834
 835                 timer11: timer@48088000 {
 836                         compatible = "ti,omap4430-timer";
 837                         reg = <0x48088000 0x80>;
 838                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 839                         ti,hwmods = "timer11";
 840                         ti,timer-pwm;
 841                 };
 842
 843                 usbhstll: usbhstll@4a062000 {
 844                         compatible = "ti,usbhs-tll";
 845                         reg = <0x4a062000 0x1000>;
 846                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 847                         ti,hwmods = "usb_tll_hs";
 848                 };
 849
 850                 usbhshost: usbhshost@4a064000 {
 851                         compatible = "ti,usbhs-host";
 852                         reg = <0x4a064000 0x800>;
 853                         ti,hwmods = "usb_host_hs";
 854                         #address-cells = <1>;
 855                         #size-cells = <1>;
 856                         ranges;
 857                         clocks = <&init_60m_fclk>,
 858                                  <&xclk60mhsp1_ck>,
 859                                  <&xclk60mhsp2_ck>;
 860                         clock-names = "refclk_60m_int",
 861                                       "refclk_60m_ext_p1",
 862                                       "refclk_60m_ext_p2";
 863
 864                         usbhsohci: ohci@4a064800 {
 865                                 compatible = "ti,ohci-omap3";
 866                                 reg = <0x4a064800 0x400>;
 867                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 868                         };
 869
 870                         usbhsehci: ehci@4a064c00 {
 871                                 compatible = "ti,ehci-omap";
 872                                 reg = <0x4a064c00 0x400>;
 873                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 874                         };
 875                 };
 876
 877                 omap_control_usb2phy: control-phy@4a002300 {
 878                         compatible = "ti,control-phy-usb2";
 879                         reg = <0x4a002300 0x4>;
 880                         reg-names = "power";
 881                 };
 882
 883                 omap_control_usbotg: control-phy@4a00233c {
 884                         compatible = "ti,control-phy-otghs";
 885                         reg = <0x4a00233c 0x4>;
 886                         reg-names = "otghs_control";
 887                 };
 888
 889                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 890                         compatible = "ti,omap4-musb";
 891                         reg = <0x4a0ab000 0x7ff>;
 892                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 893                         interrupt-names = "mc", "dma";
 894                         ti,hwmods = "usb_otg_hs";
 895                         usb-phy = <&usb2_phy>;
 896                         phys = <&usb2_phy>;
 897                         phy-names = "usb2-phy";
 898                         multipoint = <1>;
 899                         num-eps = <16>;
 900                         ram-bits = <12>;
 901                         ctrl-module = <&omap_control_usbotg>;
 902                 };
 903
 904                 aes: aes@4b501000 {
 905                         compatible = "ti,omap4-aes";
 906                         ti,hwmods = "aes";
 907                         reg = <0x4b501000 0xa0>;
 908                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 909                         dmas = <&sdma 111>, <&sdma 110>;
 910                         dma-names = "tx", "rx";
 911                 };
 912
 913                 des: des@480a5000 {
 914                         compatible = "ti,omap4-des";
 915                         ti,hwmods = "des";
 916                         reg = <0x480a5000 0xa0>;
 917                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 918                         dmas = <&sdma 117>, <&sdma 116>;
 919                         dma-names = "tx", "rx";
 920                 };
 921
 922                 abb_mpu: regulator-abb-mpu {
 923                         compatible = "ti,abb-v2";
 924                         regulator-name = "abb_mpu";
 925                         #address-cells = <0>;
 926                         #size-cells = <0>;
 927                         ti,tranxdone-status-mask = <0x80>;
 928                         clocks = <&sys_clkin_ck>;
 929                         ti,settling-time = <50>;
 930                         ti,clock-cycles = <16>;
 931
 932                         status = "disabled";
 933                 };
 934
 935                 abb_iva: regulator-abb-iva {
 936                         compatible = "ti,abb-v2";
 937                         regulator-name = "abb_iva";
 938                         #address-cells = <0>;
 939                         #size-cells = <0>;
 940                         ti,tranxdone-status-mask = <0x80000000>;
 941                         clocks = <&sys_clkin_ck>;
 942                         ti,settling-time = <50>;
 943                         ti,clock-cycles = <16>;
 944
 945                         status = "disabled";
 946                 };
 947
 948                 dss: dss@58000000 {
 949                         compatible = "ti,omap4-dss";
 950                         reg = <0x58000000 0x80>;
 951                         status = "disabled";
 952                         ti,hwmods = "dss_core";
 953                         clocks = <&dss_dss_clk>;
 954                         clock-names = "fck";
 955                         #address-cells = <1>;
 956                         #size-cells = <1>;
 957                         ranges;
 958
 959                         dispc@58001000 {
 960                                 compatible = "ti,omap4-dispc";
 961                                 reg = <0x58001000 0x1000>;
 962                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 963                                 ti,hwmods = "dss_dispc";
 964                                 clocks = <&dss_dss_clk>;
 965                                 clock-names = "fck";
 966                         };
 967
 968                         rfbi: encoder@58002000  {
 969                                 compatible = "ti,omap4-rfbi";
 970                                 reg = <0x58002000 0x1000>;
 971                                 status = "disabled";
 972                                 ti,hwmods = "dss_rfbi";
 973                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
 974                                 clock-names = "fck", "ick";
 975                         };
 976
 977                         venc: encoder@58003000 {
 978                                 compatible = "ti,omap4-venc";
 979                                 reg = <0x58003000 0x1000>;
 980                                 status = "disabled";
 981                                 ti,hwmods = "dss_venc";
 982                                 clocks = <&dss_tv_clk>;
 983                                 clock-names = "fck";
 984                         };
 985
 986                         dsi1: encoder@58004000 {
 987                                 compatible = "ti,omap4-dsi";
 988                                 reg = <0x58004000 0x200>,
 989                                       <0x58004200 0x40>,
 990                                       <0x58004300 0x20>;
 991                                 reg-names = "proto", "phy", "pll";
 992                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 993                                 status = "disabled";
 994                                 ti,hwmods = "dss_dsi1";
 995                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 996                                 clock-names = "fck", "sys_clk";
 997                         };
 998
 999                         dsi2: encoder@58005000 {
1000                                 compatible = "ti,omap4-dsi";
1001                                 reg = <0x58005000 0x200>,
1002                                       <0x58005200 0x40>,
1003                                       <0x58005300 0x20>;
1004                                 reg-names = "proto", "phy", "pll";
1005                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1006                                 status = "disabled";
1007                                 ti,hwmods = "dss_dsi2";
1008                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
1009                                 clock-names = "fck", "sys_clk";
1010                         };
1011
1012                         hdmi: encoder@58006000 {
1013                                 compatible = "ti,omap4-hdmi";
1014                                 reg = <0x58006000 0x200>,
1015                                       <0x58006200 0x100>,
1016                                       <0x58006300 0x100>,
1017                                       <0x58006400 0x1000>;
1018                                 reg-names = "wp", "pll", "phy", "core";
1019                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1020                                 status = "disabled";
1021                                 ti,hwmods = "dss_hdmi";
1022                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1023                                 clock-names = "fck", "sys_clk";
1024                                 dmas = <&sdma 76>;
1025                                 dma-names = "audio_tx";
1026                         };
1027                 };
1028         };
1029 };
1030
1031 /include/ "omap44xx-clocks.dtsi"