GNU Linux-libre 4.19.264-gnu1
[releases.git] / arch / arm / boot / dts / picoxcell-pc3x2.dtsi
1 /*
2  *  Copyright (C) 2011 Picochip, Jamie Iles
3  *
4  * This software is licensed under the terms of the GNU General Public
5  * License version 2, as published by the Free Software Foundation, and
6  * may be copied, distributed, and modified under those terms.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13 /include/ "skeleton.dtsi"
14 / {
15         model = "Picochip picoXcell PC3X2";
16         compatible = "picochip,pc3x2";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         cpus {
21                 #address-cells = <0>;
22                 #size-cells = <0>;
23
24                 cpu {
25                         compatible = "arm,arm1176jz-s";
26                         device_type = "cpu";
27                         clock-frequency = <400000000>;
28                         d-cache-line-size = <32>;
29                         d-cache-size = <32768>;
30                         i-cache-line-size = <32>;
31                         i-cache-size = <32768>;
32                 };
33         };
34
35         clocks {
36                 #address-cells = <1>;
37                 #size-cells = <1>;
38                 ranges;
39
40                 pclk: clock@0 {
41                         compatible = "fixed-clock";
42                         clock-outputs = "bus", "pclk";
43                         clock-frequency = <200000000>;
44                         ref-clock = <&ref_clk>, "ref";
45                 };
46         };
47
48         paxi {
49                 compatible = "simple-bus";
50                 #address-cells = <1>;
51                 #size-cells = <1>;
52                 ranges = <0 0x80000000 0x400000>;
53
54                 emac: gem@30000 {
55                         compatible = "cadence,gem";
56                         reg = <0x30000 0x10000>;
57                         interrupt-parent = <&vic0>;
58                         interrupts = <31>;
59                 };
60
61                 dmac1: dmac@40000 {
62                         compatible = "snps,dw-dmac";
63                         reg = <0x40000 0x10000>;
64                         interrupt-parent = <&vic0>;
65                         interrupts = <25>;
66                 };
67
68                 dmac2: dmac@50000 {
69                         compatible = "snps,dw-dmac";
70                         reg = <0x50000 0x10000>;
71                         interrupt-parent = <&vic0>;
72                         interrupts = <26>;
73                 };
74
75                 vic0: interrupt-controller@60000 {
76                         compatible = "arm,pl192-vic";
77                         interrupt-controller;
78                         reg = <0x60000 0x1000>;
79                         #interrupt-cells = <1>;
80                 };
81
82                 vic1: interrupt-controller@64000 {
83                         compatible = "arm,pl192-vic";
84                         interrupt-controller;
85                         reg = <0x64000 0x1000>;
86                         #interrupt-cells = <1>;
87                 };
88
89                 fuse: picoxcell-fuse@80000 {
90                         compatible = "picoxcell,fuse-pc3x2";
91                         reg = <0x80000 0x10000>;
92                 };
93
94                 ssi: picoxcell-spi@90000 {
95                         compatible = "picoxcell,spi";
96                         reg = <0x90000 0x10000>;
97                         interrupt-parent = <&vic0>;
98                         interrupts = <10>;
99                 };
100
101                 ipsec: spacc@100000 {
102                         compatible = "picochip,spacc-ipsec";
103                         reg = <0x100000 0x10000>;
104                         interrupt-parent = <&vic0>;
105                         interrupts = <24>;
106                         ref-clock = <&pclk>, "ref";
107                 };
108
109                 srtp: spacc@140000 {
110                         compatible = "picochip,spacc-srtp";
111                         reg = <0x140000 0x10000>;
112                         interrupt-parent = <&vic0>;
113                         interrupts = <23>;
114                 };
115
116                 l2_engine: spacc@180000 {
117                         compatible = "picochip,spacc-l2";
118                         reg = <0x180000 0x10000>;
119                         interrupt-parent = <&vic0>;
120                         interrupts = <22>;
121                         ref-clock = <&pclk>, "ref";
122                 };
123
124                 apb {
125                         compatible = "simple-bus";
126                         #address-cells = <1>;
127                         #size-cells = <1>;
128                         ranges = <0 0x200000 0x80000>;
129
130                         rtc0: rtc@0 {
131                                 compatible = "picochip,pc3x2-rtc";
132                                 clock-freq = <200000000>;
133                                 reg = <0x00000 0xf>;
134                                 interrupt-parent = <&vic1>;
135                                 interrupts = <8>;
136                         };
137
138                         timer0: timer@10000 {
139                                 compatible = "picochip,pc3x2-timer";
140                                 interrupt-parent = <&vic0>;
141                                 interrupts = <4>;
142                                 clock-freq = <200000000>;
143                                 reg = <0x10000 0x14>;
144                         };
145
146                         timer1: timer@10014 {
147                                 compatible = "picochip,pc3x2-timer";
148                                 interrupt-parent = <&vic0>;
149                                 interrupts = <5>;
150                                 clock-freq = <200000000>;
151                                 reg = <0x10014 0x14>;
152                         };
153
154                         timer2: timer@10028 {
155                                 compatible = "picochip,pc3x2-timer";
156                                 interrupt-parent = <&vic0>;
157                                 interrupts = <6>;
158                                 clock-freq = <200000000>;
159                                 reg = <0x10028 0x14>;
160                         };
161
162                         timer3: timer@1003c {
163                                 compatible = "picochip,pc3x2-timer";
164                                 interrupt-parent = <&vic0>;
165                                 interrupts = <7>;
166                                 clock-freq = <200000000>;
167                                 reg = <0x1003c 0x14>;
168                         };
169
170                         gpio: gpio@20000 {
171                                 compatible = "snps,dw-apb-gpio";
172                                 reg = <0x20000 0x1000>;
173                                 #address-cells = <1>;
174                                 #size-cells = <0>;
175                                 reg-io-width = <4>;
176
177                                 banka: gpio-controller@0 {
178                                         compatible = "snps,dw-apb-gpio-bank";
179                                         gpio-controller;
180                                         #gpio-cells = <2>;
181                                         gpio-generic,nr-gpio = <8>;
182
183                                         regoffset-dat = <0x50>;
184                                         regoffset-set = <0x00>;
185                                         regoffset-dirout = <0x04>;
186                                 };
187
188                                 bankb: gpio-controller@1 {
189                                         compatible = "snps,dw-apb-gpio-bank";
190                                         gpio-controller;
191                                         #gpio-cells = <2>;
192                                         gpio-generic,nr-gpio = <8>;
193
194                                         regoffset-dat = <0x54>;
195                                         regoffset-set = <0x0c>;
196                                         regoffset-dirout = <0x10>;
197                                 };
198                         };
199
200                         uart0: uart@30000 {
201                                 compatible = "snps,dw-apb-uart";
202                                 reg = <0x30000 0x1000>;
203                                 interrupt-parent = <&vic1>;
204                                 interrupts = <10>;
205                                 clock-frequency = <3686400>;
206                                 reg-shift = <2>;
207                                 reg-io-width = <4>;
208                         };
209
210                         uart1: uart@40000 {
211                                 compatible = "snps,dw-apb-uart";
212                                 reg = <0x40000 0x1000>;
213                                 interrupt-parent = <&vic1>;
214                                 interrupts = <9>;
215                                 clock-frequency = <3686400>;
216                                 reg-shift = <2>;
217                                 reg-io-width = <4>;
218                         };
219
220                         wdog: watchdog@50000 {
221                                 compatible = "snps,dw-apb-wdg";
222                                 reg = <0x50000 0x10000>;
223                                 interrupt-parent = <&vic0>;
224                                 interrupts = <11>;
225                                 bus-clock = <&pclk>, "bus";
226                         };
227                 };
228         };
229
230         rwid-axi {
231                 #address-cells = <1>;
232                 #size-cells = <1>;
233                 compatible = "simple-bus";
234                 ranges;
235
236                 ebi@50000000 {
237                         compatible = "simple-bus";
238                         #address-cells = <2>;
239                         #size-cells = <1>;
240                         ranges = <0 0 0x40000000 0x08000000
241                                   1 0 0x48000000 0x08000000
242                                   2 0 0x50000000 0x08000000
243                                   3 0 0x58000000 0x08000000>;
244                 };
245
246                 axi2pico@c0000000 {
247                         compatible = "picochip,axi2pico-pc3x2";
248                         reg = <0xc0000000 0x10000>;
249                         interrupt-parent = <&vic0>;
250                         interrupts = <13 14 15 16 17 18 19 20 21>;
251                 };
252         };
253 };