arch/arm/boot/dts/tegra30-cardhu.dtsi

   1 #include <dt-bindings/input/input.h>
   2 #include "tegra30.dtsi"
   3
   4 /**
   5  * This file contains common DT entry for all fab version of Cardhu.
   6  * There is multiple fab version of Cardhu starting from A01 to A07.
   7  * Cardhu fab version A01 and A03 are not supported. Cardhu fab version
   8  * A02 will have different sets of GPIOs for fixed regulator compare to
   9  * Cardhu fab version A04. The Cardhu fab version A05, A06, A07 are
  10  * compatible with fab version A04. Based on Cardhu fab version, the
  11  * related dts file need to be chosen like for Cardhu fab version A02,
  12  * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
  13  * tegra30-cardhu-a04.dts.
  14  * The identification of board is done in two ways, by looking the sticker
  15  * on PCB and by reading board id eeprom.
  16  * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
  17  * number is the fab version like here it is 002 and hence fab version A02.
  18  * The (downstream internal) U-Boot of Cardhu display the board-id as
  19  * follows:
  20  * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.00
  21  * In this Fab version is 02 i.e. A02.
  22  * The BoardID I2C eeprom is interfaced through i2c5 (pwr_i2c address 0x56).
  23  * The location 0x8 of this eeprom contains the Fab version. It is 1 byte
  24  * wide.
  25  */
  26
  27 / {
  28         model = "NVIDIA Tegra30 Cardhu evaluation board";
  29         compatible = "nvidia,cardhu", "nvidia,tegra30";
  30
  31         aliases {
  32                 rtc0 = "/i2c@7000d000/tps65911@2d";
  33                 rtc1 = "/rtc@7000e000";
  34                 serial0 = &uarta;
  35                 serial1 = &uartc;
  36         };
  37
  38         memory {
  39                 reg = <0x80000000 0x40000000>;
  40         };
  41
  42         pcie-controller@00003000 {
  43                 status = "okay";
  44
  45                 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
  46                 avdd-pexb-supply = <&ldo1_reg>;
  47                 vdd-pexb-supply = <&ldo1_reg>;
  48                 avdd-pex-pll-supply = <&ldo1_reg>;
  49                 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
  50                 vddio-pex-ctl-supply = <&sys_3v3_reg>;
  51                 avdd-plle-supply = <&ldo2_reg>;
  52
  53                 pci@1,0 {
  54                         nvidia,num-lanes = <4>;
  55                 };
  56
  57                 pci@2,0 {
  58                         nvidia,num-lanes = <1>;
  59                 };
  60
  61                 pci@3,0 {
  62                         status = "okay";
  63                         nvidia,num-lanes = <1>;
  64                 };
  65         };
  66
  67         host1x@50000000 {
  68                 dc@54200000 {
  69                         rgb {
  70                                 status = "okay";
  71
  72                                 nvidia,panel = <&panel>;
  73                         };
  74                 };
  75         };
  76
  77         pinmux@70000868 {
  78                 pinctrl-names = "default";
  79                 pinctrl-0 = <&state_default>;
  80
  81                 state_default: pinmux {
  82                         sdmmc1_clk_pz0 {
  83                                 nvidia,pins = "sdmmc1_clk_pz0";
  84                                 nvidia,function = "sdmmc1";
  85                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
  86                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  87                         };
  88                         sdmmc1_cmd_pz1 {
  89                                 nvidia,pins =   "sdmmc1_cmd_pz1",
  90                                                 "sdmmc1_dat0_py7",
  91                                                 "sdmmc1_dat1_py6",
  92                                                 "sdmmc1_dat2_py5",
  93                                                 "sdmmc1_dat3_py4";
  94                                 nvidia,function = "sdmmc1";
  95                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
  96                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
  97                         };
  98                         sdmmc3_clk_pa6 {
  99                                 nvidia,pins = "sdmmc3_clk_pa6";
 100                                 nvidia,function = "sdmmc3";
 101                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 102                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 103                         };
 104                         sdmmc3_cmd_pa7 {
 105                                 nvidia,pins =   "sdmmc3_cmd_pa7",
 106                                                 "sdmmc3_dat0_pb7",
 107                                                 "sdmmc3_dat1_pb6",
 108                                                 "sdmmc3_dat2_pb5",
 109                                                 "sdmmc3_dat3_pb4";
 110                                 nvidia,function = "sdmmc3";
 111                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 112                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 113                         };
 114                         sdmmc4_clk_pcc4 {
 115                                 nvidia,pins =   "sdmmc4_clk_pcc4",
 116                                                 "sdmmc4_rst_n_pcc3";
 117                                 nvidia,function = "sdmmc4";
 118                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 119                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 120                         };
 121                         sdmmc4_dat0_paa0 {
 122                                 nvidia,pins =   "sdmmc4_dat0_paa0",
 123                                                 "sdmmc4_dat1_paa1",
 124                                                 "sdmmc4_dat2_paa2",
 125                                                 "sdmmc4_dat3_paa3",
 126                                                 "sdmmc4_dat4_paa4",
 127                                                 "sdmmc4_dat5_paa5",
 128                                                 "sdmmc4_dat6_paa6",
 129                                                 "sdmmc4_dat7_paa7";
 130                                 nvidia,function = "sdmmc4";
 131                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 132                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 133                         };
 134                         dap2_fs_pa2 {
 135                                 nvidia,pins =   "dap2_fs_pa2",
 136                                                 "dap2_sclk_pa3",
 137                                                 "dap2_din_pa4",
 138                                                 "dap2_dout_pa5";
 139                                 nvidia,function = "i2s1";
 140                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 141                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 142                         };
 143                         sdio3 {
 144                                 nvidia,pins = "drive_sdio3";
 145                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 146                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 147                                 nvidia,pull-down-strength = <46>;
 148                                 nvidia,pull-up-strength = <42>;
 149                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
 150                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
 151                         };
 152                         uart3_txd_pw6 {
 153                                 nvidia,pins =   "uart3_txd_pw6",
 154                                                 "uart3_cts_n_pa1",
 155                                                 "uart3_rts_n_pc0",
 156                                                 "uart3_rxd_pw7";
 157                                 nvidia,function = "uartc";
 158                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 159                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 160                         };
 161                 };
 162         };
 163
 164         serial@70006000 {
 165                 status = "okay";
 166         };
 167
 168         serial@70006200 {
 169                 compatible = "nvidia,tegra30-hsuart";
 170                 status = "okay";
 171         };
 172
 173         pwm@7000a000 {
 174                 status = "okay";
 175         };
 176
 177         panelddc: i2c@7000c000 {
 178                 status = "okay";
 179                 clock-frequency = <100000>;
 180         };
 181
 182         i2c@7000c400 {
 183                 status = "okay";
 184                 clock-frequency = <100000>;
 185         };
 186
 187         i2c@7000c500 {
 188                 status = "okay";
 189                 clock-frequency = <100000>;
 190
 191                 /* ALS and Proximity sensor */
 192                 isl29028@44 {
 193                         compatible = "isil,isl29028";
 194                         reg = <0x44>;
 195                         interrupt-parent = <&gpio>;
 196                         interrupts = <TEGRA_GPIO(L, 0) IRQ_TYPE_LEVEL_HIGH>;
 197                 };
 198
 199                 i2cmux@70 {
 200                         compatible = "nxp,pca9546";
 201                         #address-cells = <1>;
 202                         #size-cells = <0>;
 203                         reg = <0x70>;
 204                         reset-gpio = <&gpio TEGRA_GPIO(BB, 0) GPIO_ACTIVE_LOW>;
 205                 };
 206         };
 207
 208         i2c@7000c700 {
 209                 status = "okay";
 210                 clock-frequency = <100000>;
 211         };
 212
 213         i2c@7000d000 {
 214                 status = "okay";
 215                 clock-frequency = <100000>;
 216
 217                 wm8903: wm8903@1a {
 218                         compatible = "wlf,wm8903";
 219                         reg = <0x1a>;
 220                         interrupt-parent = <&gpio>;
 221                         interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_LEVEL_HIGH>;
 222
 223                         gpio-controller;
 224                         #gpio-cells = <2>;
 225
 226                         micdet-cfg = <0>;
 227                         micdet-delay = <100>;
 228                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 229                 };
 230
 231                 pmic: tps65911@2d {
 232                         compatible = "ti,tps65911";
 233                         reg = <0x2d>;
 234
 235                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 236                         #interrupt-cells = <2>;
 237                         interrupt-controller;
 238
 239                         ti,system-power-controller;
 240
 241                         #gpio-cells = <2>;
 242                         gpio-controller;
 243
 244                         vcc1-supply = <&vdd_ac_bat_reg>;
 245                         vcc2-supply = <&vdd_ac_bat_reg>;
 246                         vcc3-supply = <&vio_reg>;
 247                         vcc4-supply = <&vdd_5v0_reg>;
 248                         vcc5-supply = <&vdd_ac_bat_reg>;
 249                         vcc6-supply = <&vdd2_reg>;
 250                         vcc7-supply = <&vdd_ac_bat_reg>;
 251                         vccio-supply = <&vdd_ac_bat_reg>;
 252
 253                         regulators {
 254                                 vdd1_reg: vdd1 {
 255                                         regulator-name = "vddio_ddr_1v2";
 256                                         regulator-min-microvolt = <1200000>;
 257                                         regulator-max-microvolt = <1200000>;
 258                                         regulator-always-on;
 259                                 };
 260
 261                                 vdd2_reg: vdd2 {
 262                                         regulator-name = "vdd_1v5_gen";
 263                                         regulator-min-microvolt = <1500000>;
 264                                         regulator-max-microvolt = <1500000>;
 265                                         regulator-always-on;
 266                                 };
 267
 268                                 vddctrl_reg: vddctrl {
 269                                         regulator-name = "vdd_cpu,vdd_sys";
 270                                         regulator-min-microvolt = <1000000>;
 271                                         regulator-max-microvolt = <1000000>;
 272                                         regulator-always-on;
 273                                 };
 274
 275                                 vio_reg: vio {
 276                                         regulator-name = "vdd_1v8_gen";
 277                                         regulator-min-microvolt = <1800000>;
 278                                         regulator-max-microvolt = <1800000>;
 279                                         regulator-always-on;
 280                                 };
 281
 282                                 ldo1_reg: ldo1 {
 283                                         regulator-name = "vdd_pexa,vdd_pexb";
 284                                         regulator-min-microvolt = <1050000>;
 285                                         regulator-max-microvolt = <1050000>;
 286                                 };
 287
 288                                 ldo2_reg: ldo2 {
 289                                         regulator-name = "vdd_sata,avdd_plle";
 290                                         regulator-min-microvolt = <1050000>;
 291                                         regulator-max-microvolt = <1050000>;
 292                                 };
 293
 294                                 /* LDO3 is not connected to anything */
 295
 296                                 ldo4_reg: ldo4 {
 297                                         regulator-name = "vdd_rtc";
 298                                         regulator-min-microvolt = <1200000>;
 299                                         regulator-max-microvolt = <1200000>;
 300                                         regulator-always-on;
 301                                 };
 302
 303                                 ldo5_reg: ldo5 {
 304                                         regulator-name = "vddio_sdmmc,avdd_vdac";
 305                                         regulator-min-microvolt = <3300000>;
 306                                         regulator-max-microvolt = <3300000>;
 307                                         regulator-always-on;
 308                                 };
 309
 310                                 ldo6_reg: ldo6 {
 311                                         regulator-name = "avdd_dsi_csi,pwrdet_mipi";
 312                                         regulator-min-microvolt = <1200000>;
 313                                         regulator-max-microvolt = <1200000>;
 314                                 };
 315
 316                                 ldo7_reg: ldo7 {
 317                                         regulator-name = "vdd_pllm,x,u,a_p_c_s";
 318                                         regulator-min-microvolt = <1200000>;
 319                                         regulator-max-microvolt = <1200000>;
 320                                         regulator-always-on;
 321                                 };
 322
 323                                 ldo8_reg: ldo8 {
 324                                         regulator-name = "vdd_ddr_hs";
 325                                         regulator-min-microvolt = <1000000>;
 326                                         regulator-max-microvolt = <1000000>;
 327                                         regulator-always-on;
 328                                 };
 329                         };
 330                 };
 331
 332                 temperature-sensor@4c {
 333                         compatible = "onnn,nct1008";
 334                         reg = <0x4c>;
 335                         vcc-supply = <&sys_3v3_reg>;
 336                         interrupt-parent = <&gpio>;
 337                         interrupts = <TEGRA_GPIO(CC, 2) IRQ_TYPE_LEVEL_LOW>;
 338                 };
 339
 340                 tps62361@60 {
 341                         compatible = "ti,tps62361";
 342                         reg = <0x60>;
 343
 344                         regulator-name = "tps62361-vout";
 345                         regulator-min-microvolt = <500000>;
 346                         regulator-max-microvolt = <1500000>;
 347                         regulator-boot-on;
 348                         regulator-always-on;
 349                         ti,vsel0-state-high;
 350                         ti,vsel1-state-high;
 351                 };
 352         };
 353
 354         spi@7000da00 {
 355                 status = "okay";
 356                 spi-max-frequency = <25000000>;
 357                 spi-flash@1 {
 358                         compatible = "winbond,w25q32";
 359                         reg = <1>;
 360                         spi-max-frequency = <20000000>;
 361                 };
 362         };
 363
 364         pmc@7000e400 {
 365                 status = "okay";
 366                 nvidia,invert-interrupt;
 367                 nvidia,suspend-mode = <1>;
 368                 nvidia,cpu-pwr-good-time = <2000>;
 369                 nvidia,cpu-pwr-off-time = <200>;
 370                 nvidia,core-pwr-good-time = <3845 3845>;
 371                 nvidia,core-pwr-off-time = <0>;
 372                 nvidia,core-power-req-active-high;
 373                 nvidia,sys-clock-req-active-high;
 374         };
 375
 376         ahub@70080000 {
 377                 i2s@70080400 {
 378                         status = "okay";
 379                 };
 380         };
 381
 382         sdhci@78000000 {
 383                 status = "okay";
 384                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 385                 wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
 386                 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
 387                 bus-width = <4>;
 388         };
 389
 390         sdhci@78000600 {
 391                 status = "okay";
 392                 bus-width = <8>;
 393                 non-removable;
 394         };
 395
 396         usb@7d008000 {
 397                 status = "okay";
 398         };
 399
 400         usb-phy@7d008000 {
 401                 vbus-supply = <&usb3_vbus_reg>;
 402                 status = "okay";
 403         };
 404
 405         backlight: backlight {
 406                 compatible = "pwm-backlight";
 407
 408                 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
 409                 power-supply = <&vdd_bl_reg>;
 410                 pwms = <&pwm 0 5000000>;
 411
 412                 brightness-levels = <0 4 8 16 32 64 128 255>;
 413                 default-brightness-level = <6>;
 414         };
 415
 416         clocks {
 417                 compatible = "simple-bus";
 418                 #address-cells = <1>;
 419                 #size-cells = <0>;
 420
 421                 clk32k_in: clock@0 {
 422                         compatible = "fixed-clock";
 423                         reg=<0>;
 424                         #clock-cells = <0>;
 425                         clock-frequency = <32768>;
 426                 };
 427         };
 428
 429         panel: panel {
 430                 compatible = "chunghwa,claa101wb01", "simple-panel";
 431                 ddc-i2c-bus = <&panelddc>;
 432
 433                 power-supply = <&vdd_pnl1_reg>;
 434                 enable-gpios = <&gpio TEGRA_GPIO(L, 2) GPIO_ACTIVE_HIGH>;
 435
 436                 backlight = <&backlight>;
 437         };
 438
 439         regulators {
 440                 compatible = "simple-bus";
 441                 #address-cells = <1>;
 442                 #size-cells = <0>;
 443
 444                 vdd_ac_bat_reg: regulator@0 {
 445                         compatible = "regulator-fixed";
 446                         reg = <0>;
 447                         regulator-name = "vdd_ac_bat";
 448                         regulator-min-microvolt = <5000000>;
 449                         regulator-max-microvolt = <5000000>;
 450                         regulator-always-on;
 451                 };
 452
 453                 cam_1v8_reg: regulator@1 {
 454                         compatible = "regulator-fixed";
 455                         reg = <1>;
 456                         regulator-name = "cam_1v8";
 457                         regulator-min-microvolt = <1800000>;
 458                         regulator-max-microvolt = <1800000>;
 459                         enable-active-high;
 460                         gpio = <&gpio TEGRA_GPIO(BB, 4) GPIO_ACTIVE_HIGH>;
 461                         vin-supply = <&vio_reg>;
 462                 };
 463
 464                 cp_5v_reg: regulator@2 {
 465                         compatible = "regulator-fixed";
 466                         reg = <2>;
 467                         regulator-name = "cp_5v";
 468                         regulator-min-microvolt = <5000000>;
 469                         regulator-max-microvolt = <5000000>;
 470                         regulator-boot-on;
 471                         regulator-always-on;
 472                         enable-active-high;
 473                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 474                 };
 475
 476                 emmc_3v3_reg: regulator@3 {
 477                         compatible = "regulator-fixed";
 478                         reg = <3>;
 479                         regulator-name = "emmc_3v3";
 480                         regulator-min-microvolt = <3300000>;
 481                         regulator-max-microvolt = <3300000>;
 482                         regulator-always-on;
 483                         regulator-boot-on;
 484                         enable-active-high;
 485                         gpio = <&gpio TEGRA_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
 486                         vin-supply = <&sys_3v3_reg>;
 487                 };
 488
 489                 modem_3v3_reg: regulator@4 {
 490                         compatible = "regulator-fixed";
 491                         reg = <4>;
 492                         regulator-name = "modem_3v3";
 493                         regulator-min-microvolt = <3300000>;
 494                         regulator-max-microvolt = <3300000>;
 495                         enable-active-high;
 496                         gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
 497                 };
 498
 499                 pex_hvdd_3v3_reg: regulator@5 {
 500                         compatible = "regulator-fixed";
 501                         reg = <5>;
 502                         regulator-name = "pex_hvdd_3v3";
 503                         regulator-min-microvolt = <3300000>;
 504                         regulator-max-microvolt = <3300000>;
 505                         enable-active-high;
 506                         gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
 507                         vin-supply = <&sys_3v3_reg>;
 508                 };
 509
 510                 vdd_cam1_ldo_reg: regulator@6 {
 511                         compatible = "regulator-fixed";
 512                         reg = <6>;
 513                         regulator-name = "vdd_cam1_ldo";
 514                         regulator-min-microvolt = <2800000>;
 515                         regulator-max-microvolt = <2800000>;
 516                         enable-active-high;
 517                         gpio = <&gpio TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
 518                         vin-supply = <&sys_3v3_reg>;
 519                 };
 520
 521                 vdd_cam2_ldo_reg: regulator@7 {
 522                         compatible = "regulator-fixed";
 523                         reg = <7>;
 524                         regulator-name = "vdd_cam2_ldo";
 525                         regulator-min-microvolt = <2800000>;
 526                         regulator-max-microvolt = <2800000>;
 527                         enable-active-high;
 528                         gpio = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>;
 529                         vin-supply = <&sys_3v3_reg>;
 530                 };
 531
 532                 vdd_cam3_ldo_reg: regulator@8 {
 533                         compatible = "regulator-fixed";
 534                         reg = <8>;
 535                         regulator-name = "vdd_cam3_ldo";
 536                         regulator-min-microvolt = <3300000>;
 537                         regulator-max-microvolt = <3300000>;
 538                         enable-active-high;
 539                         gpio = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_HIGH>;
 540                         vin-supply = <&sys_3v3_reg>;
 541                 };
 542
 543                 vdd_com_reg: regulator@9 {
 544                         compatible = "regulator-fixed";
 545                         reg = <9>;
 546                         regulator-name = "vdd_com";
 547                         regulator-min-microvolt = <3300000>;
 548                         regulator-max-microvolt = <3300000>;
 549                         regulator-always-on;
 550                         regulator-boot-on;
 551                         enable-active-high;
 552                         gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 553                         vin-supply = <&sys_3v3_reg>;
 554                 };
 555
 556                 vdd_fuse_3v3_reg: regulator@10 {
 557                         compatible = "regulator-fixed";
 558                         reg = <10>;
 559                         regulator-name = "vdd_fuse_3v3";
 560                         regulator-min-microvolt = <3300000>;
 561                         regulator-max-microvolt = <3300000>;
 562                         enable-active-high;
 563                         gpio = <&gpio TEGRA_GPIO(L, 6) GPIO_ACTIVE_HIGH>;
 564                         vin-supply = <&sys_3v3_reg>;
 565                 };
 566
 567                 vdd_pnl1_reg: regulator@11 {
 568                         compatible = "regulator-fixed";
 569                         reg = <11>;
 570                         regulator-name = "vdd_pnl1";
 571                         regulator-min-microvolt = <3300000>;
 572                         regulator-max-microvolt = <3300000>;
 573                         regulator-always-on;
 574                         regulator-boot-on;
 575                         enable-active-high;
 576                         gpio = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
 577                         vin-supply = <&sys_3v3_reg>;
 578                 };
 579
 580                 vdd_vid_reg: regulator@12 {
 581                         compatible = "regulator-fixed";
 582                         reg = <12>;
 583                         regulator-name = "vddio_vid";
 584                         regulator-min-microvolt = <5000000>;
 585                         regulator-max-microvolt = <5000000>;
 586                         enable-active-high;
 587                         gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>;
 588                         gpio-open-drain;
 589                         vin-supply = <&vdd_5v0_reg>;
 590                 };
 591         };
 592
 593         sound {
 594                 compatible = "nvidia,tegra-audio-wm8903-cardhu",
 595                              "nvidia,tegra-audio-wm8903";
 596                 nvidia,model = "NVIDIA Tegra Cardhu";
 597
 598                 nvidia,audio-routing =
 599                         "Headphone Jack", "HPOUTR",
 600                         "Headphone Jack", "HPOUTL",
 601                         "Int Spk", "ROP",
 602                         "Int Spk", "RON",
 603                         "Int Spk", "LOP",
 604                         "Int Spk", "LON",
 605                         "Mic Jack", "MICBIAS",
 606                         "IN1L", "Mic Jack";
 607
 608                 nvidia,i2s-controller = <&tegra_i2s1>;
 609                 nvidia,audio-codec = <&wm8903>;
 610
 611                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 612                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 613                         GPIO_ACTIVE_HIGH>;
 614
 615                 clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
 616                          <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
 617                          <&tegra_car TEGRA30_CLK_EXTERN1>;
 618                 clock-names = "pll_a", "pll_a_out0", "mclk";
 619         };
 620
 621         gpio-keys {
 622                 compatible = "gpio-keys";
 623
 624                 power {
 625                         label = "Power";
 626                         interrupt-parent = <&pmic>;
 627                         interrupts = <2 0>;
 628                         linux,code = <KEY_POWER>;
 629                         debounce-interval = <100>;
 630                         gpio-key,wakeup;
 631                 };
 632
 633                 volume-down {
 634                         label = "Volume Down";
 635                         gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_LOW>;
 636                         linux,code = <KEY_VOLUMEDOWN>;
 637                         debounce-interval = <10>;
 638                 };
 639
 640                 volume-up {
 641                         label = "Volume Up";
 642                         gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
 643                         linux,code = <KEY_VOLUMEUP>;
 644                         debounce-interval = <10>;
 645                 };
 646         };
 647 };