arch/arm/mach-ux500/cpu-db8500.c

   1 /*
   2  * Copyright (C) 2008-2009 ST-Ericsson SA
   3  *
   4  * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2, as
   8  * published by the Free Software Foundation.
   9  *
  10  */
  11 #include <linux/types.h>
  12 #include <linux/init.h>
  13 #include <linux/device.h>
  14 #include <linux/amba/bus.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/irq.h>
  18 #include <linux/irqchip.h>
  19 #include <linux/irqchip/arm-gic.h>
  20 #include <linux/mfd/dbx500-prcmu.h>
  21 #include <linux/platform_data/arm-ux500-pm.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/io.h>
  24 #include <linux/of.h>
  25 #include <linux/of_address.h>
  26 #include <linux/of_platform.h>
  27 #include <linux/perf/arm_pmu.h>
  28 #include <linux/regulator/machine.h>
  29
  30 #include <asm/outercache.h>
  31 #include <asm/hardware/cache-l2x0.h>
  32 #include <asm/mach/map.h>
  33 #include <asm/mach/arch.h>
  34
  35 #include "setup.h"
  36
  37 #include "board-mop500.h"
  38 #include "db8500-regs.h"
  39
  40 static int __init ux500_l2x0_unlock(void)
  41 {
  42         int i;
  43         struct device_node *np;
  44         void __iomem *l2x0_base;
  45
  46         np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
  47         l2x0_base = of_iomap(np, 0);
  48         of_node_put(np);
  49         if (!l2x0_base)
  50                 return -ENODEV;
  51
  52         /*
  53          * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
  54          * apparently locks both caches before jumping to the kernel. The
  55          * l2x0 core will not touch the unlock registers if the l2x0 is
  56          * already enabled, so we do it right here instead. The PL310 has
  57          * 8 sets of registers, one per possible CPU.
  58          */
  59         for (i = 0; i < 8; i++) {
  60                 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
  61                                i * L2X0_LOCKDOWN_STRIDE);
  62                 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
  63                                i * L2X0_LOCKDOWN_STRIDE);
  64         }
  65         iounmap(l2x0_base);
  66         return 0;
  67 }
  68
  69 static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
  70 {
  71         /*
  72          * We can't write to secure registers as we are in non-secure
  73          * mode, until we have some SMI service available.
  74          */
  75 }
  76
  77 /*
  78  * FIXME: Should we set up the GPIO domain here?
  79  *
  80  * The problem is that we cannot put the interrupt resources into the platform
  81  * device until the irqdomain has been added. Right now, we set the GIC interrupt
  82  * domain from init_irq(), then load the gpio driver from
  83  * core_initcall(nmk_gpio_init) and add the platform devices from
  84  * arch_initcall(customize_machine).
  85  *
  86  * This feels fragile because it depends on the gpio device getting probed
  87  * _before_ any device uses the gpio interrupts.
  88 */
  89 static void __init ux500_init_irq(void)
  90 {
  91         struct device_node *np;
  92         struct resource r;
  93
  94         irqchip_init();
  95         np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
  96         of_address_to_resource(np, 0, &r);
  97         of_node_put(np);
  98         if (!r.start) {
  99                 pr_err("could not find PRCMU base resource\n");
 100                 return;
 101         }
 102         prcmu_early_init(r.start, r.end-r.start);
 103         ux500_pm_init(r.start, r.end-r.start);
 104
 105         /* Unlock before init */
 106         ux500_l2x0_unlock();
 107         outer_cache.write_sec = ux500_l2c310_write_sec;
 108 }
 109
 110 static void ux500_restart(enum reboot_mode mode, const char *cmd)
 111 {
 112         local_irq_disable();
 113         local_fiq_disable();
 114
 115         prcmu_system_reset(0);
 116 }
 117
 118 /*
 119  * The PMU IRQ lines of two cores are wired together into a single interrupt.
 120  * Bounce the interrupt to the other core if it's not ours.
 121  */
 122 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
 123 {
 124         irqreturn_t ret = handler(irq, dev);
 125         int other = !smp_processor_id();
 126
 127         if (ret == IRQ_NONE && cpu_online(other))
 128                 irq_set_affinity(irq, cpumask_of(other));
 129
 130         /*
 131          * We should be able to get away with the amount of IRQ_NONEs we give,
 132          * while still having the spurious IRQ detection code kick in if the
 133          * interrupt really starts hitting spuriously.
 134          */
 135         return ret;
 136 }
 137
 138 static struct arm_pmu_platdata db8500_pmu_platdata = {
 139         .handle_irq             = db8500_pmu_handler,
 140 };
 141
 142 static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
 143         /* Requires call-back bindings. */
 144         OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
 145         /* Requires DMA bindings. */
 146         OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
 147                        "ux500-msp-i2s.0", &msp0_platform_data),
 148         OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
 149                        "ux500-msp-i2s.1", &msp1_platform_data),
 150         OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
 151                        "ux500-msp-i2s.2", &msp2_platform_data),
 152         OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
 153                        "ux500-msp-i2s.3", &msp3_platform_data),
 154         /* Requires non-DT:able platform data. */
 155         OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
 156         OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
 157         OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
 158         OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
 159                         NULL),
 160         {},
 161 };
 162
 163 static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
 164         OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", NULL),
 165         {},
 166 };
 167
 168 static const struct of_device_id u8500_local_bus_nodes[] = {
 169         /* only create devices below soc node */
 170         { .compatible = "stericsson,db8500", },
 171         { .compatible = "stericsson,db8500-prcmu", },
 172         { .compatible = "simple-bus"},
 173         { },
 174 };
 175
 176 static void __init u8500_init_machine(void)
 177 {
 178         /* automatically probe child nodes of dbx5x0 devices */
 179         if (of_machine_is_compatible("st-ericsson,u8540"))
 180                 of_platform_populate(NULL, u8500_local_bus_nodes,
 181                                      u8540_auxdata_lookup, NULL);
 182         else
 183                 of_platform_populate(NULL, u8500_local_bus_nodes,
 184                                      u8500_auxdata_lookup, NULL);
 185 }
 186
 187 static const char * stericsson_dt_platform_compat[] = {
 188         "st-ericsson,u8500",
 189         "st-ericsson,u8540",
 190         "st-ericsson,u9500",
 191         "st-ericsson,u9540",
 192         NULL,
 193 };
 194
 195 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
 196         .l2c_aux_val    = 0,
 197         .l2c_aux_mask   = ~0,
 198         .init_irq       = ux500_init_irq,
 199         .init_machine   = u8500_init_machine,
 200         .dt_compat      = stericsson_dt_platform_compat,
 201         .restart        = ux500_restart,
 202 MACHINE_END