GNU Linux-libre 4.19.286-gnu1
[releases.git] / arch / arm64 / boot / dts / amlogic / meson-gx.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (c) 2016 Andreas Färber
4  *
5  * Copyright (c) 2016 BayLibre, SAS.
6  * Author: Neil Armstrong <narmstrong@baylibre.com>
7  *
8  * Copyright (c) 2016 Endless Computers, Inc.
9  * Author: Carlo Caione <carlo@endlessm.com>
10  */
11
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15
16 / {
17         interrupt-parent = <&gic>;
18         #address-cells = <2>;
19         #size-cells = <2>;
20
21         reserved-memory {
22                 #address-cells = <2>;
23                 #size-cells = <2>;
24                 ranges;
25
26                 /* 16 MiB reserved for Hardware ROM Firmware */
27                 hwrom_reserved: hwrom@0 {
28                         reg = <0x0 0x0 0x0 0x1000000>;
29                         no-map;
30                 };
31
32                 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
33                 secmon_reserved: secmon@10000000 {
34                         reg = <0x0 0x10000000 0x0 0x200000>;
35                         no-map;
36                 };
37
38                 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
39                 secmon_reserved_alt: secmon@5000000 {
40                         reg = <0x0 0x05000000 0x0 0x300000>;
41                         no-map;
42                 };
43
44                 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
45                 secmon_reserved_bl32: secmon@5300000 {
46                         reg = <0x0 0x05300000 0x0 0x2000000>;
47                         no-map;
48                 };
49
50                 linux,cma {
51                         compatible = "shared-dma-pool";
52                         reusable;
53                         size = <0x0 0xbc00000>;
54                         alignment = <0x0 0x400000>;
55                         linux,cma-default;
56                 };
57         };
58
59         cpus {
60                 #address-cells = <0x2>;
61                 #size-cells = <0x0>;
62
63                 cpu0: cpu@0 {
64                         device_type = "cpu";
65                         compatible = "arm,cortex-a53", "arm,armv8";
66                         reg = <0x0 0x0>;
67                         enable-method = "psci";
68                         next-level-cache = <&l2>;
69                         clocks = <&scpi_dvfs 0>;
70                 };
71
72                 cpu1: cpu@1 {
73                         device_type = "cpu";
74                         compatible = "arm,cortex-a53", "arm,armv8";
75                         reg = <0x0 0x1>;
76                         enable-method = "psci";
77                         next-level-cache = <&l2>;
78                         clocks = <&scpi_dvfs 0>;
79                 };
80
81                 cpu2: cpu@2 {
82                         device_type = "cpu";
83                         compatible = "arm,cortex-a53", "arm,armv8";
84                         reg = <0x0 0x2>;
85                         enable-method = "psci";
86                         next-level-cache = <&l2>;
87                         clocks = <&scpi_dvfs 0>;
88                 };
89
90                 cpu3: cpu@3 {
91                         device_type = "cpu";
92                         compatible = "arm,cortex-a53", "arm,armv8";
93                         reg = <0x0 0x3>;
94                         enable-method = "psci";
95                         next-level-cache = <&l2>;
96                         clocks = <&scpi_dvfs 0>;
97                 };
98
99                 l2: l2-cache0 {
100                         compatible = "cache";
101                 };
102         };
103
104         arm-pmu {
105                 compatible = "arm,cortex-a53-pmu";
106                 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
107                              <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
108                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
109                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
110                 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
111         };
112
113         psci {
114                 compatible = "arm,psci-0.2";
115                 method = "smc";
116         };
117
118         timer {
119                 compatible = "arm,armv8-timer";
120                 interrupts = <GIC_PPI 13
121                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
122                              <GIC_PPI 14
123                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
124                              <GIC_PPI 11
125                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
126                              <GIC_PPI 10
127                         (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
128         };
129
130         xtal: xtal-clk {
131                 compatible = "fixed-clock";
132                 clock-frequency = <24000000>;
133                 clock-output-names = "xtal";
134                 #clock-cells = <0>;
135         };
136
137         firmware {
138                 sm: secure-monitor {
139                         compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
140                 };
141         };
142
143         efuse: efuse {
144                 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
145                 #address-cells = <1>;
146                 #size-cells = <1>;
147                 read-only;
148
149                 sn: sn@14 {
150                         reg = <0x14 0x10>;
151                 };
152
153                 eth_mac: eth-mac@34 {
154                         reg = <0x34 0x10>;
155                 };
156
157                 bid: bid@46 {
158                         reg = <0x46 0x30>;
159                 };
160         };
161
162         scpi {
163                 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
164                 mboxes = <&mailbox 1 &mailbox 2>;
165                 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
166
167                 scpi_clocks: clocks {
168                         compatible = "arm,scpi-clocks";
169
170                         scpi_dvfs: clocks-0 {
171                                 compatible = "arm,scpi-dvfs-clocks";
172                                 #clock-cells = <1>;
173                                 clock-indices = <0>;
174                                 clock-output-names = "vcpu";
175                         };
176                 };
177
178                 scpi_sensors: sensors {
179                         compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
180                         #thermal-sensor-cells = <1>;
181                 };
182         };
183
184         soc {
185                 compatible = "simple-bus";
186                 #address-cells = <2>;
187                 #size-cells = <2>;
188                 ranges;
189
190                 cbus: bus@c1100000 {
191                         compatible = "simple-bus";
192                         reg = <0x0 0xc1100000 0x0 0x100000>;
193                         #address-cells = <2>;
194                         #size-cells = <2>;
195                         ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
196
197                         gpio_intc: interrupt-controller@9880 {
198                                 compatible = "amlogic,meson-gpio-intc";
199                                 reg = <0x0 0x9880 0x0 0x10>;
200                                 interrupt-controller;
201                                 #interrupt-cells = <2>;
202                                 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
203                                 status = "disabled";
204                         };
205
206                         reset: reset-controller@4404 {
207                                 compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
208                                 reg = <0x0 0x04404 0x0 0x9c>;
209                                 #reset-cells = <1>;
210                         };
211
212                         uart_A: serial@84c0 {
213                                 compatible = "amlogic,meson-gx-uart";
214                                 reg = <0x0 0x84c0 0x0 0x18>;
215                                 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
216                                 status = "disabled";
217                         };
218
219                         uart_B: serial@84dc {
220                                 compatible = "amlogic,meson-gx-uart";
221                                 reg = <0x0 0x84dc 0x0 0x18>;
222                                 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
223                                 status = "disabled";
224                         };
225
226                         i2c_A: i2c@8500 {
227                                 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
228                                 reg = <0x0 0x08500 0x0 0x20>;
229                                 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
230                                 #address-cells = <1>;
231                                 #size-cells = <0>;
232                                 status = "disabled";
233                         };
234
235                         pwm_ab: pwm@8550 {
236                                 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
237                                 reg = <0x0 0x08550 0x0 0x10>;
238                                 #pwm-cells = <3>;
239                                 status = "disabled";
240                         };
241
242                         pwm_cd: pwm@8650 {
243                                 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
244                                 reg = <0x0 0x08650 0x0 0x10>;
245                                 #pwm-cells = <3>;
246                                 status = "disabled";
247                         };
248
249                         saradc: adc@8680 {
250                                 compatible = "amlogic,meson-saradc";
251                                 reg = <0x0 0x8680 0x0 0x34>;
252                                 #io-channel-cells = <1>;
253                                 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
254                                 status = "disabled";
255                         };
256
257                         pwm_ef: pwm@86c0 {
258                                 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
259                                 reg = <0x0 0x086c0 0x0 0x10>;
260                                 #pwm-cells = <3>;
261                                 status = "disabled";
262                         };
263
264                         uart_C: serial@8700 {
265                                 compatible = "amlogic,meson-gx-uart";
266                                 reg = <0x0 0x8700 0x0 0x18>;
267                                 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
268                                 status = "disabled";
269                         };
270
271                         i2c_B: i2c@87c0 {
272                                 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
273                                 reg = <0x0 0x087c0 0x0 0x20>;
274                                 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
275                                 #address-cells = <1>;
276                                 #size-cells = <0>;
277                                 status = "disabled";
278                         };
279
280                         i2c_C: i2c@87e0 {
281                                 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
282                                 reg = <0x0 0x087e0 0x0 0x20>;
283                                 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
284                                 #address-cells = <1>;
285                                 #size-cells = <0>;
286                                 status = "disabled";
287                         };
288
289                         spicc: spi@8d80 {
290                                 compatible = "amlogic,meson-gx-spicc";
291                                 reg = <0x0 0x08d80 0x0 0x80>;
292                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
293                                 #address-cells = <1>;
294                                 #size-cells = <0>;
295                                 status = "disabled";
296                         };
297
298                         spifc: spi@8c80 {
299                                 compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
300                                 reg = <0x0 0x08c80 0x0 0x80>;
301                                 #address-cells = <1>;
302                                 #size-cells = <0>;
303                                 status = "disabled";
304                         };
305
306                         watchdog@98d0 {
307                                 compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
308                                 reg = <0x0 0x098d0 0x0 0x10>;
309                                 clocks = <&xtal>;
310                         };
311                 };
312
313                 gic: interrupt-controller@c4301000 {
314                         compatible = "arm,gic-400";
315                         reg = <0x0 0xc4301000 0 0x1000>,
316                               <0x0 0xc4302000 0 0x2000>,
317                               <0x0 0xc4304000 0 0x2000>,
318                               <0x0 0xc4306000 0 0x2000>;
319                         interrupt-controller;
320                         interrupts = <GIC_PPI 9
321                                 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
322                         #interrupt-cells = <3>;
323                         #address-cells = <0>;
324                 };
325
326                 sram: sram@c8000000 {
327                         compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
328                         reg = <0x0 0xc8000000 0x0 0x14000>;
329
330                         #address-cells = <1>;
331                         #size-cells = <1>;
332                         ranges = <0 0x0 0xc8000000 0x14000>;
333
334                         cpu_scp_lpri: scp-shmem@0 {
335                                 compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
336                                 reg = <0x13000 0x400>;
337                         };
338
339                         cpu_scp_hpri: scp-shmem@200 {
340                                 compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
341                                 reg = <0x13400 0x400>;
342                         };
343                 };
344
345                 aobus: bus@c8100000 {
346                         compatible = "simple-bus";
347                         reg = <0x0 0xc8100000 0x0 0x100000>;
348                         #address-cells = <2>;
349                         #size-cells = <2>;
350                         ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
351
352                         sysctrl_AO: sys-ctrl@0 {
353                                 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
354                                 reg =  <0x0 0x0 0x0 0x100>;
355
356                                 pwrc_vpu: power-controller-vpu {
357                                         compatible = "amlogic,meson-gx-pwrc-vpu";
358                                         #power-domain-cells = <0>;
359                                         amlogic,hhi-sysctrl = <&sysctrl>;
360                                 };
361
362                                 clkc_AO: clock-controller {
363                                         compatible = "amlogic,meson-gx-aoclkc";
364                                         #clock-cells = <1>;
365                                         #reset-cells = <1>;
366                                 };
367                         };
368
369                         cec_AO: cec@100 {
370                                 compatible = "amlogic,meson-gx-ao-cec";
371                                 reg = <0x0 0x00100 0x0 0x14>;
372                                 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
373                         };
374
375                         sec_AO: ao-secure@140 {
376                                 compatible = "amlogic,meson-gx-ao-secure", "syscon";
377                                 reg = <0x0 0x140 0x0 0x140>;
378                                 amlogic,has-chip-id;
379                         };
380
381                         uart_AO: serial@4c0 {
382                                 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
383                                 reg = <0x0 0x004c0 0x0 0x18>;
384                                 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
385                                 status = "disabled";
386                         };
387
388                         uart_AO_B: serial@4e0 {
389                                 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
390                                 reg = <0x0 0x004e0 0x0 0x18>;
391                                 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
392                                 status = "disabled";
393                         };
394
395                         i2c_AO: i2c@500 {
396                                 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
397                                 reg = <0x0 0x500 0x0 0x20>;
398                                 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
399                                 #address-cells = <1>;
400                                 #size-cells = <0>;
401                                 status = "disabled";
402                         };
403
404                         pwm_AO_ab: pwm@550 {
405                                 compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
406                                 reg = <0x0 0x00550 0x0 0x10>;
407                                 #pwm-cells = <3>;
408                                 status = "disabled";
409                         };
410
411                         ir: ir@580 {
412                                 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
413                                 reg = <0x0 0x00580 0x0 0x40>;
414                                 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
415                                 status = "disabled";
416                         };
417                 };
418
419                 periphs: periphs@c8834000 {
420                         compatible = "simple-bus";
421                         reg = <0x0 0xc8834000 0x0 0x2000>;
422                         #address-cells = <2>;
423                         #size-cells = <2>;
424                         ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
425
426                         hwrng: rng@0 {
427                                 compatible = "amlogic,meson-rng";
428                                 reg = <0x0 0x0 0x0 0x4>;
429                         };
430                 };
431
432                 hiubus: bus@c883c000 {
433                         compatible = "simple-bus";
434                         reg = <0x0 0xc883c000 0x0 0x2000>;
435                         #address-cells = <2>;
436                         #size-cells = <2>;
437                         ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
438
439                         sysctrl: system-controller@0 {
440                                 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
441                                 reg = <0 0 0 0x400>;
442                         };
443
444                         mailbox: mailbox@404 {
445                                 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
446                                 reg = <0 0x404 0 0x4c>;
447                                 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
448                                              <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
449                                              <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
450                                 #mbox-cells = <1>;
451                         };
452                 };
453
454                 ethmac: ethernet@c9410000 {
455                         compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
456                         reg = <0x0 0xc9410000 0x0 0x10000
457                                0x0 0xc8834540 0x0 0x4>;
458                         interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
459                         interrupt-names = "macirq";
460                         status = "disabled";
461                 };
462
463                 apb: apb@d0000000 {
464                         compatible = "simple-bus";
465                         reg = <0x0 0xd0000000 0x0 0x200000>;
466                         #address-cells = <2>;
467                         #size-cells = <2>;
468                         ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
469
470                         sd_emmc_a: mmc@70000 {
471                                 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
472                                 reg = <0x0 0x70000 0x0 0x800>;
473                                 interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
474                                 status = "disabled";
475                         };
476
477                         sd_emmc_b: mmc@72000 {
478                                 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
479                                 reg = <0x0 0x72000 0x0 0x800>;
480                                 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
481                                 status = "disabled";
482                         };
483
484                         sd_emmc_c: mmc@74000 {
485                                 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
486                                 reg = <0x0 0x74000 0x0 0x800>;
487                                 interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
488                                 status = "disabled";
489                         };
490                 };
491
492                 vpu: vpu@d0100000 {
493                         compatible = "amlogic,meson-gx-vpu";
494                         reg = <0x0 0xd0100000 0x0 0x100000>,
495                               <0x0 0xc883c000 0x0 0x1000>,
496                               <0x0 0xc8838000 0x0 0x1000>;
497                         reg-names = "vpu", "hhi", "dmc";
498                         interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
499                         #address-cells = <1>;
500                         #size-cells = <0>;
501
502                         /* CVBS VDAC output port */
503                         cvbs_vdac_port: port@0 {
504                                 reg = <0>;
505                         };
506
507                         /* HDMI-TX output port */
508                         hdmi_tx_port: port@1 {
509                                 reg = <1>;
510
511                                 hdmi_tx_out: endpoint {
512                                         remote-endpoint = <&hdmi_tx_in>;
513                                 };
514                         };
515                 };
516
517                 hdmi_tx: hdmi-tx@c883a000 {
518                         compatible = "amlogic,meson-gx-dw-hdmi";
519                         reg = <0x0 0xc883a000 0x0 0x1c>;
520                         interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
521                         #address-cells = <1>;
522                         #size-cells = <0>;
523                         status = "disabled";
524
525                         /* VPU VENC Input */
526                         hdmi_tx_venc_port: port@0 {
527                                 reg = <0>;
528
529                                 hdmi_tx_in: endpoint {
530                                         remote-endpoint = <&hdmi_tx_out>;
531                                 };
532                         };
533
534                         /* TMDS Output */
535                         hdmi_tx_tmds_port: port@1 {
536                                 reg = <1>;
537                         };
538                 };
539         };
540 };