GNU Linux-libre 4.19.286-gnu1
[releases.git] / arch / arm64 / boot / dts / marvell / armada-3720-espressobin.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
4  * Copyright (C) 2016 Marvell
5  *
6  * Romain Perier <romain.perier@free-electrons.com>
7  *
8  */
9 /*
10  * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
11  */
12
13 /dts-v1/;
14
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-372x.dtsi"
17
18 / {
19         model = "Globalscale Marvell ESPRESSOBin Board";
20         compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
21
22         aliases {
23                 ethernet0 = &eth0;
24                 /* for dsa slave device */
25                 ethernet1 = &switch0port1;
26                 ethernet2 = &switch0port2;
27                 ethernet3 = &switch0port3;
28                 serial0 = &uart0;
29                 serial1 = &uart1;
30         };
31
32         chosen {
33                 stdout-path = "serial0:115200n8";
34         };
35
36         memory@0 {
37                 device_type = "memory";
38                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
39         };
40
41         vcc_sd_reg1: regulator {
42                 compatible = "regulator-gpio";
43                 regulator-name = "vcc_sd1";
44                 regulator-min-microvolt = <1800000>;
45                 regulator-max-microvolt = <3300000>;
46                 regulator-boot-on;
47
48                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
49                 gpios-states = <0>;
50                 states = <1800000 0x1
51                           3300000 0x0>;
52                 enable-active-high;
53         };
54 };
55
56 /* J9 */
57 &pcie0 {
58         pinctrl-names = "default";
59         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
60         reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>;
61         status = "okay";
62 };
63
64 /* J6 */
65 &sata {
66         status = "okay";
67 };
68
69 /* J1 */
70 &sdhci1 {
71         wp-inverted;
72         bus-width = <4>;
73         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
74         marvell,pad-type = "sd";
75         vqmmc-supply = <&vcc_sd_reg1>;
76         status = "okay";
77 };
78
79 &spi0 {
80         status = "okay";
81
82         flash@0 {
83                 reg = <0>;
84                 compatible = "winbond,w25q32dw", "jedec,spi-flash";
85                 spi-max-frequency = <104000000>;
86                 m25p,fast-read;
87
88                 partitions {
89                         compatible = "fixed-partitions";
90                         #address-cells = <1>;
91                         #size-cells = <1>;
92
93                         partition@0 {
94                                 label = "uboot";
95                                 reg = <0 0x180000>;
96                         };
97
98                         partition@180000 {
99                                 label = "ubootenv";
100                                 reg = <0x180000 0x10000>;
101                         };
102                 };
103         };
104 };
105
106 /* Exported on the micro USB connector J5 through an FTDI */
107 &uart0 {
108         pinctrl-names = "default";
109         pinctrl-0 = <&uart1_pins>;
110         status = "okay";
111 };
112
113 /*
114  * Connector J17 and J18 expose a number of different features. Some pins are
115  * multiplexed. This is the case for instance for the following features:
116  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
117  *   how to enable it. Beware that the signals are 1.8V TTL.
118  * - I2C
119  * - SPI
120  * - MMC
121  */
122
123 /* J7 */
124 &usb3 {
125         status = "okay";
126 };
127
128 /* J8 */
129 &usb2 {
130         status = "okay";
131 };
132
133 &mdio {
134         switch0: switch0@1 {
135                 compatible = "marvell,mv88e6085";
136                 #address-cells = <1>;
137                 #size-cells = <0>;
138                 reg = <1>;
139
140                 dsa,member = <0 0>;
141
142                 ports {
143                         #address-cells = <1>;
144                         #size-cells = <0>;
145
146                         switch0port0: port@0 {
147                                 reg = <0>;
148                                 label = "cpu";
149                                 ethernet = <&eth0>;
150                         };
151
152                         switch0port1: port@1 {
153                                 reg = <1>;
154                                 label = "wan";
155                                 phy-handle = <&switch0phy0>;
156                         };
157
158                         switch0port2: port@2 {
159                                 reg = <2>;
160                                 label = "lan0";
161                                 phy-handle = <&switch0phy1>;
162                         };
163
164                         switch0port3: port@3 {
165                                 reg = <3>;
166                                 label = "lan1";
167                                 phy-handle = <&switch0phy2>;
168                         };
169
170                 };
171
172                 mdio {
173                         #address-cells = <1>;
174                         #size-cells = <0>;
175
176                         switch0phy0: switch0phy0@11 {
177                                 reg = <0x11>;
178                         };
179                         switch0phy1: switch0phy1@12 {
180                                 reg = <0x12>;
181                         };
182                         switch0phy2: switch0phy2@13 {
183                                 reg = <0x13>;
184                         };
185                 };
186         };
187 };
188
189 &eth0 {
190         phy-mode = "rgmii-id";
191         status = "okay";
192
193         fixed-link {
194                 speed = <1000>;
195                 full-duplex;
196         };
197 };