arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
   4  */
   5
   6 /dts-v1/;
   7 #include "rk3399-sapphire.dtsi"
   8
   9 / {
  10         model = "Excavator-RK3399 Board";
  11         compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
  12
  13         adc-keys {
  14                 compatible = "adc-keys";
  15                 io-channels = <&saradc 1>;
  16                 io-channel-names = "buttons";
  17                 keyup-threshold-microvolt = <1800000>;
  18                 poll-interval = <100>;
  19
  20                 button-up {
  21                         label = "Volume Up";
  22                         linux,code = <KEY_VOLUMEUP>;
  23                         press-threshold-microvolt = <100000>;
  24                 };
  25
  26                 button-down {
  27                         label = "Volume Down";
  28                         linux,code = <KEY_VOLUMEDOWN>;
  29                         press-threshold-microvolt = <300000>;
  30                 };
  31
  32                 back {
  33                         label = "Back";
  34                         linux,code = <KEY_BACK>;
  35                         press-threshold-microvolt = <985000>;
  36                 };
  37
  38                 menu {
  39                         label = "Menu";
  40                         linux,code = <KEY_MENU>;
  41                         press-threshold-microvolt = <1314000>;
  42                 };
  43         };
  44
  45         edp_panel: edp-panel {
  46                 compatible ="lg,lp079qx1-sp0v", "simple-panel";
  47                 backlight = <&backlight>;
  48                 enable-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
  49                 pinctrl-names = "default";
  50                 pinctrl-0 = <&lcd_panel_reset>;
  51                 power-supply = <&vcc3v3_s0>;
  52
  53                 port {
  54                         panel_in_edp: endpoint {
  55                                 remote-endpoint = <&edp_out_panel>;
  56                         };
  57                 };
  58         };
  59
  60         rt5651-sound {
  61                 compatible = "simple-audio-card";
  62                 simple-audio-card,name = "realtek,rt5651-codec";
  63                 simple-audio-card,format = "i2s";
  64                 simple-audio-card,mclk-fs = <256>;
  65                 simple-audio-card,widgets =
  66                         "Microphone", "Mic Jack",
  67                         "Headphone", "Headphone Jack";
  68                 simple-audio-card,routing =
  69                         "Mic Jack", "MICBIAS1",
  70                         "IN1P", "Mic Jack",
  71                         "Headphone Jack", "HPOL",
  72                         "Headphone Jack", "HPOR";
  73                 simple-audio-card,cpu {
  74                         sound-dai = <&i2s0>;
  75                 };
  76                 simple-audio-card,codec {
  77                         sound-dai = <&rt5651>;
  78                 };
  79         };
  80
  81         sdio_pwrseq: sdio-pwrseq {
  82                 compatible = "mmc-pwrseq-simple";
  83                 clocks = <&rk808 1>;
  84                 clock-names = "ext_clock";
  85                 pinctrl-names = "default";
  86                 pinctrl-0 = <&wifi_enable_h>;
  87
  88                 /*
  89                  * On the module itself this is one of these (depending
  90                  * on the actual card populated):
  91                  * - SDIO_RESET_L_WL_REG_ON
  92                  * - PDN (power down when low)
  93                  */
  94                 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
  95         };
  96 };
  97
  98 &backlight {
  99         enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
 100         status = "okay";
 101 };
 102
 103 &edp {
 104         status = "okay";
 105
 106         ports {
 107                 edp_out: port@1 {
 108                         reg = <1>;
 109                         #address-cells = <1>;
 110                         #size-cells = <0>;
 111
 112                         edp_out_panel: endpoint@0 {
 113                                 reg = <0>;
 114                                 remote-endpoint = <&panel_in_edp>;
 115                         };
 116                 };
 117         };
 118 };
 119
 120 &i2c1 {
 121         i2c-scl-rising-time-ns = <300>;
 122         i2c-scl-falling-time-ns = <15>;
 123         status = "okay";
 124
 125         rt5651: rt5651@1a {
 126                 compatible = "rockchip,rt5651";
 127                 reg = <0x1a>;
 128                 clocks = <&cru SCLK_I2S_8CH_OUT>;
 129                 clock-names = "mclk";
 130                 hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
 131                 spk-con-gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
 132                 #sound-dai-cells = <0>;
 133         };
 134 };
 135
 136 &i2c4 {
 137         i2c-scl-rising-time-ns = <600>;
 138         i2c-scl-falling-time-ns = <20>;
 139         status = "okay";
 140
 141         accelerometer@68 {
 142                 compatible = "invensense,mpu6500";
 143                 reg = <0x68>;
 144                 interrupt-parent = <&gpio1>;
 145                 interrupts = <RK_PC6 IRQ_TYPE_EDGE_RISING>;
 146         };
 147 };
 148
 149 &i2s0 {
 150         rockchip,playback-channels = <8>;
 151         rockchip,capture-channels = <8>;
 152         status = "okay";
 153 };
 154
 155 &pcie_phy {
 156         status = "okay";
 157 };
 158
 159 &pcie0 {
 160         ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
 161         num-lanes = <4>;
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pcie_clkreqn_cpm>;
 164         status = "okay";
 165 };
 166
 167 &pinctrl {
 168         sdio-pwrseq {
 169                 wifi_enable_h: wifi-enable-h {
 170                         rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
 171                 };
 172         };
 173
 174         lcd-panel {
 175                 lcd_panel_reset: lcd-panel-reset {
 176                         rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
 177                 };
 178         };
 179 };
 180
 181 &sdio0 {
 182         bus-width = <4>;
 183         cap-sd-highspeed;
 184         cap-sdio-irq;
 185         clock-frequency = <50000000>;
 186         disable-wp;
 187         keep-power-in-suspend;
 188         max-frequency = <50000000>;
 189         mmc-pwrseq = <&sdio_pwrseq>;
 190         non-removable;
 191         pinctrl-names = "default";
 192         pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 193         sd-uhs-sdr104;
 194         status = "okay";
 195 };
 196
 197 &spdif {
 198         i2c-scl-rising-time-ns = <450>;
 199         i2c-scl-falling-time-ns = <15>;
 200         status = "okay";
 201 };