2 * Based on arch/arm/include/asm/barrier.h
4 * Copyright (C) 2012 ARM Ltd.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __ASM_BARRIER_H
19 #define __ASM_BARRIER_H
23 #define sev() asm volatile("sev" : : : "memory")
24 #define wfe() asm volatile("wfe" : : : "memory")
25 #define wfi() asm volatile("wfi" : : : "memory")
27 #define isb() asm volatile("isb" : : : "memory")
28 #define dmb(opt) asm volatile("dmb " #opt : : : "memory")
29 #define dsb(opt) asm volatile("dsb " #opt : : : "memory")
35 #define dma_rmb() dmb(oshld)
36 #define dma_wmb() dmb(oshst)
38 #define smp_mb() dmb(ish)
39 #define smp_rmb() dmb(ishld)
40 #define smp_wmb() dmb(ishst)
42 #define smp_store_release(p, v) \
44 union { typeof(*p) __val; char __c[1]; } __u = \
45 { .__val = (__force typeof(*p)) (v) }; \
46 compiletime_assert_atomic_type(*p); \
47 switch (sizeof(*p)) { \
49 asm volatile ("stlrb %w1, %0" \
51 : "r" (*(__u8 *)__u.__c) \
55 asm volatile ("stlrh %w1, %0" \
57 : "r" (*(__u16 *)__u.__c) \
61 asm volatile ("stlr %w1, %0" \
63 : "r" (*(__u32 *)__u.__c) \
67 asm volatile ("stlr %1, %0" \
69 : "r" (*(__u64 *)__u.__c) \
75 #define smp_load_acquire(p) \
77 union { typeof(*p) __val; char __c[1]; } __u; \
78 compiletime_assert_atomic_type(*p); \
79 switch (sizeof(*p)) { \
81 asm volatile ("ldarb %w0, %1" \
82 : "=r" (*(__u8 *)__u.__c) \
83 : "Q" (*p) : "memory"); \
86 asm volatile ("ldarh %w0, %1" \
87 : "=r" (*(__u16 *)__u.__c) \
88 : "Q" (*p) : "memory"); \
91 asm volatile ("ldar %w0, %1" \
92 : "=r" (*(__u32 *)__u.__c) \
93 : "Q" (*p) : "memory"); \
96 asm volatile ("ldar %0, %1" \
97 : "=r" (*(__u64 *)__u.__c) \
98 : "Q" (*p) : "memory"); \
104 #define read_barrier_depends() do { } while(0)
105 #define smp_read_barrier_depends() do { } while(0)
107 #define smp_store_mb(var, value) do { WRITE_ONCE(var, value); smp_mb(); } while (0)
108 #define nop() asm volatile("nop");
110 #define smp_mb__before_atomic() smp_mb()
111 #define smp_mb__after_atomic() smp_mb()
113 #endif /* __ASSEMBLY__ */
115 #endif /* __ASM_BARRIER_H */