arch/arm64/include/asm/cpufeature.h

   1 /*
   2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #ifndef __ASM_CPUFEATURE_H
  10 #define __ASM_CPUFEATURE_H
  11
  12 #include <asm/hwcap.h>
  13 #include <asm/sysreg.h>
  14
  15 /*
  16  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
  17  * in the kernel and for user space to keep track of which optional features
  18  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
  19  * Note that HWCAP_x constants are bit fields so we need to take the log.
  20  */
  21
  22 #define MAX_CPU_FEATURES        (8 * sizeof(elf_hwcap))
  23 #define cpu_feature(x)          ilog2(HWCAP_ ## x)
  24
  25 #define ARM64_WORKAROUND_CLEAN_CACHE            0
  26 #define ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE    1
  27 #define ARM64_WORKAROUND_845719                 2
  28 #define ARM64_HAS_SYSREG_GIC_CPUIF              3
  29 #define ARM64_HAS_PAN                           4
  30 #define ARM64_HAS_LSE_ATOMICS                   5
  31 #define ARM64_WORKAROUND_CAVIUM_23154           6
  32 #define ARM64_WORKAROUND_834220                 7
  33 #define ARM64_WORKAROUND_CAVIUM_27456           8
  34 #define ARM64_HAS_32BIT_EL0                     9
  35
  36 #define ARM64_NCAPS                             10
  37
  38 #ifndef __ASSEMBLY__
  39
  40 #include <linux/kernel.h>
  41
  42 /* CPU feature register tracking */
  43 enum ftr_type {
  44         FTR_EXACT,                      /* Use a predefined safe value */
  45         FTR_LOWER_SAFE,                 /* Smaller value is safe */
  46         FTR_HIGHER_SAFE,                /* Bigger value is safe */
  47         FTR_HIGHER_OR_ZERO_SAFE,        /* Bigger value is safe, but 0 is biggest */
  48 };
  49
  50 #define FTR_STRICT      true    /* SANITY check strict matching required */
  51 #define FTR_NONSTRICT   false   /* SANITY check ignored */
  52
  53 #define FTR_SIGNED      true    /* Value should be treated as signed */
  54 #define FTR_UNSIGNED    false   /* Value should be treated as unsigned */
  55
  56 struct arm64_ftr_bits {
  57         bool            sign;   /* Value is signed ? */
  58         bool            strict; /* CPU Sanity check: strict matching required ? */
  59         enum ftr_type   type;
  60         u8              shift;
  61         u8              width;
  62         s64             safe_val; /* safe value for discrete features */
  63 };
  64
  65 /*
  66  * @arm64_ftr_reg - Feature register
  67  * @strict_mask         Bits which should match across all CPUs for sanity.
  68  * @sys_val             Safe value across the CPUs (system view)
  69  */
  70 struct arm64_ftr_reg {
  71         u32                     sys_id;
  72         const char              *name;
  73         u64                     strict_mask;
  74         u64                     sys_val;
  75         struct arm64_ftr_bits   *ftr_bits;
  76 };
  77
  78 struct arm64_cpu_capabilities {
  79         const char *desc;
  80         u16 capability;
  81         bool (*matches)(const struct arm64_cpu_capabilities *);
  82         int (*enable)(void *);          /* Called on all active CPUs */
  83         union {
  84                 struct {        /* To be used for erratum handling only */
  85                         u32 midr_model;
  86                         u32 midr_range_min, midr_range_max;
  87                 };
  88
  89                 struct {        /* Feature register checking */
  90                         u32 sys_reg;
  91                         u8 field_pos;
  92                         u8 min_field_value;
  93                         u8 hwcap_type;
  94                         bool sign;
  95                         unsigned long hwcap;
  96                 };
  97         };
  98 };
  99
 100 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
 101
 102 static inline bool cpu_have_feature(unsigned int num)
 103 {
 104         return elf_hwcap & (1UL << num);
 105 }
 106
 107 static inline bool cpus_have_cap(unsigned int num)
 108 {
 109         if (num >= ARM64_NCAPS)
 110                 return false;
 111         return test_bit(num, cpu_hwcaps);
 112 }
 113
 114 static inline void cpus_set_cap(unsigned int num)
 115 {
 116         if (num >= ARM64_NCAPS)
 117                 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
 118                         num, ARM64_NCAPS);
 119         else
 120                 __set_bit(num, cpu_hwcaps);
 121 }
 122
 123 static inline int __attribute_const__
 124 cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
 125 {
 126         return (s64)(features << (64 - width - field)) >> (64 - width);
 127 }
 128
 129 static inline int __attribute_const__
 130 cpuid_feature_extract_signed_field(u64 features, int field)
 131 {
 132         return cpuid_feature_extract_signed_field_width(features, field, 4);
 133 }
 134
 135 static inline unsigned int __attribute_const__
 136 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
 137 {
 138         return (u64)(features << (64 - width - field)) >> (64 - width);
 139 }
 140
 141 static inline unsigned int __attribute_const__
 142 cpuid_feature_extract_unsigned_field(u64 features, int field)
 143 {
 144         return cpuid_feature_extract_unsigned_field_width(features, field, 4);
 145 }
 146
 147 static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp)
 148 {
 149         return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
 150 }
 151
 152 static inline int __attribute_const__
 153 cpuid_feature_extract_field(u64 features, int field, bool sign)
 154 {
 155         return (sign) ?
 156                 cpuid_feature_extract_signed_field(features, field) :
 157                 cpuid_feature_extract_unsigned_field(features, field);
 158 }
 159
 160 static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val)
 161 {
 162         return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
 163 }
 164
 165 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
 166 {
 167         return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
 168                 cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 169 }
 170
 171 void __init setup_cpu_features(void);
 172
 173 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
 174                             const char *info);
 175 void check_local_cpu_errata(void);
 176
 177 #ifdef CONFIG_HOTPLUG_CPU
 178 void verify_local_cpu_capabilities(void);
 179 #else
 180 static inline void verify_local_cpu_capabilities(void)
 181 {
 182 }
 183 #endif
 184
 185 u64 read_system_reg(u32 id);
 186
 187 static inline bool cpu_supports_mixed_endian_el0(void)
 188 {
 189         return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
 190 }
 191
 192 static inline bool system_supports_32bit_el0(void)
 193 {
 194         return cpus_have_cap(ARM64_HAS_32BIT_EL0);
 195 }
 196
 197 static inline bool system_supports_mixed_endian_el0(void)
 198 {
 199         return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
 200 }
 201
 202 #endif /* __ASSEMBLY__ */
 203
 204 #endif