arch/arm64/include/asm/futex.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_FUTEX_H
  17 #define __ASM_FUTEX_H
  18
  19 #ifdef __KERNEL__
  20
  21 #include <linux/futex.h>
  22 #include <linux/uaccess.h>
  23
  24 #include <asm/alternative.h>
  25 #include <asm/cpufeature.h>
  26 #include <asm/errno.h>
  27 #include <asm/sysreg.h>
  28
  29 #define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg)         \
  30         asm volatile(                                                   \
  31         ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN,            \
  32                     CONFIG_ARM64_PAN)                                   \
  33 "       prfm    pstl1strm, %2\n"                                        \
  34 "1:     ldxr    %w1, %2\n"                                              \
  35         insn "\n"                                                       \
  36 "2:     stlxr   %w0, %w3, %2\n"                                         \
  37 "       cbnz    %w0, 1b\n"                                              \
  38 "       dmb     ish\n"                                                  \
  39 "3:\n"                                                                  \
  40 "       .pushsection .fixup,\"ax\"\n"                                   \
  41 "       .align  2\n"                                                    \
  42 "4:     mov     %w0, %w5\n"                                             \
  43 "       b       3b\n"                                                   \
  44 "       .popsection\n"                                                  \
  45 "       .pushsection __ex_table,\"a\"\n"                                \
  46 "       .align  3\n"                                                    \
  47 "       .quad   1b, 4b, 2b, 4b\n"                                       \
  48 "       .popsection\n"                                                  \
  49         ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN,            \
  50                     CONFIG_ARM64_PAN)                                   \
  51         : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp)       \
  52         : "r" (oparg), "Ir" (-EFAULT)                                   \
  53         : "memory")
  54
  55 static inline int
  56 arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr)
  57 {
  58         int oldval = 0, ret, tmp;
  59
  60         pagefault_disable();
  61
  62         switch (op) {
  63         case FUTEX_OP_SET:
  64                 __futex_atomic_op("mov  %w3, %w4",
  65                                   ret, oldval, uaddr, tmp, oparg);
  66                 break;
  67         case FUTEX_OP_ADD:
  68                 __futex_atomic_op("add  %w3, %w1, %w4",
  69                                   ret, oldval, uaddr, tmp, oparg);
  70                 break;
  71         case FUTEX_OP_OR:
  72                 __futex_atomic_op("orr  %w3, %w1, %w4",
  73                                   ret, oldval, uaddr, tmp, oparg);
  74                 break;
  75         case FUTEX_OP_ANDN:
  76                 __futex_atomic_op("and  %w3, %w1, %w4",
  77                                   ret, oldval, uaddr, tmp, ~oparg);
  78                 break;
  79         case FUTEX_OP_XOR:
  80                 __futex_atomic_op("eor  %w3, %w1, %w4",
  81                                   ret, oldval, uaddr, tmp, oparg);
  82                 break;
  83         default:
  84                 ret = -ENOSYS;
  85         }
  86
  87         pagefault_enable();
  88
  89         if (!ret)
  90                 *oval = oldval;
  91
  92         return ret;
  93 }
  94
  95 static inline int
  96 futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
  97                               u32 oldval, u32 newval)
  98 {
  99         int ret = 0;
 100         u32 val, tmp;
 101
 102         if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
 103                 return -EFAULT;
 104
 105         asm volatile("// futex_atomic_cmpxchg_inatomic\n"
 106 ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
 107 "       prfm    pstl1strm, %2\n"
 108 "1:     ldxr    %w1, %2\n"
 109 "       sub     %w3, %w1, %w4\n"
 110 "       cbnz    %w3, 3f\n"
 111 "2:     stlxr   %w3, %w5, %2\n"
 112 "       cbnz    %w3, 1b\n"
 113 "       dmb     ish\n"
 114 "3:\n"
 115 "       .pushsection .fixup,\"ax\"\n"
 116 "4:     mov     %w0, %w6\n"
 117 "       b       3b\n"
 118 "       .popsection\n"
 119 "       .pushsection __ex_table,\"a\"\n"
 120 "       .align  3\n"
 121 "       .quad   1b, 4b, 2b, 4b\n"
 122 "       .popsection\n"
 123 ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
 124         : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp)
 125         : "r" (oldval), "r" (newval), "Ir" (-EFAULT)
 126         : "memory");
 127
 128         *uval = val;
 129         return ret;
 130 }
 131
 132 #endif /* __KERNEL__ */
 133 #endif /* __ASM_FUTEX_H */