2 * Copyright (C) 2012,2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
5 * Derived from arch/arm/include/kvm_emulate.h
6 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
7 * Author: Christoffer Dall <c.dall@virtualopensystems.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #ifndef __ARM64_KVM_EMULATE_H__
23 #define __ARM64_KVM_EMULATE_H__
25 #include <linux/kvm_host.h>
28 #include <asm/kvm_arm.h>
29 #include <asm/kvm_hyp.h>
30 #include <asm/kvm_mmio.h>
31 #include <asm/ptrace.h>
32 #include <asm/cputype.h>
35 unsigned long *vcpu_reg32(const struct kvm_vcpu *vcpu, u8 reg_num);
36 unsigned long vcpu_read_spsr32(const struct kvm_vcpu *vcpu);
37 void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v);
39 bool kvm_condition_valid32(const struct kvm_vcpu *vcpu);
40 void kvm_skip_instr32(struct kvm_vcpu *vcpu, bool is_wide_instr);
42 void kvm_inject_undefined(struct kvm_vcpu *vcpu);
43 void kvm_inject_vabt(struct kvm_vcpu *vcpu);
44 void kvm_inject_dabt(struct kvm_vcpu *vcpu, unsigned long addr);
45 void kvm_inject_pabt(struct kvm_vcpu *vcpu, unsigned long addr);
46 void kvm_inject_undef32(struct kvm_vcpu *vcpu);
47 void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr);
48 void kvm_inject_pabt32(struct kvm_vcpu *vcpu, unsigned long addr);
50 static inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu)
52 return !(vcpu->arch.hcr_el2 & HCR_RW);
55 static inline void vcpu_reset_hcr(struct kvm_vcpu *vcpu)
57 vcpu->arch.hcr_el2 = HCR_GUEST_FLAGS;
58 if (is_kernel_in_hyp_mode())
59 vcpu->arch.hcr_el2 |= HCR_E2H;
60 if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN)) {
61 /* route synchronous external abort exceptions to EL2 */
62 vcpu->arch.hcr_el2 |= HCR_TEA;
63 /* trap error record accesses */
64 vcpu->arch.hcr_el2 |= HCR_TERR;
66 if (cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
67 vcpu->arch.hcr_el2 |= HCR_FWB;
69 if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features))
70 vcpu->arch.hcr_el2 &= ~HCR_RW;
73 * TID3: trap feature register accesses that we virtualise.
74 * For now this is conditional, since no AArch32 feature regs
75 * are currently virtualised.
77 if (!vcpu_el1_is_32bit(vcpu))
78 vcpu->arch.hcr_el2 |= HCR_TID3;
81 static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu)
83 return (unsigned long *)&vcpu->arch.hcr_el2;
86 static inline void vcpu_clear_wfe_traps(struct kvm_vcpu *vcpu)
88 vcpu->arch.hcr_el2 &= ~HCR_TWE;
91 static inline void vcpu_set_wfe_traps(struct kvm_vcpu *vcpu)
93 vcpu->arch.hcr_el2 |= HCR_TWE;
96 static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu)
98 return vcpu->arch.vsesr_el2;
101 static inline void vcpu_set_vsesr(struct kvm_vcpu *vcpu, u64 vsesr)
103 vcpu->arch.vsesr_el2 = vsesr;
106 static inline unsigned long *vcpu_pc(const struct kvm_vcpu *vcpu)
108 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pc;
111 static inline unsigned long *__vcpu_elr_el1(const struct kvm_vcpu *vcpu)
113 return (unsigned long *)&vcpu_gp_regs(vcpu)->elr_el1;
116 static inline unsigned long vcpu_read_elr_el1(const struct kvm_vcpu *vcpu)
118 if (vcpu->arch.sysregs_loaded_on_cpu)
119 return read_sysreg_el1(elr);
121 return *__vcpu_elr_el1(vcpu);
124 static inline void vcpu_write_elr_el1(const struct kvm_vcpu *vcpu, unsigned long v)
126 if (vcpu->arch.sysregs_loaded_on_cpu)
127 write_sysreg_el1(v, elr);
129 *__vcpu_elr_el1(vcpu) = v;
132 static inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu)
134 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pstate;
137 static inline bool vcpu_mode_is_32bit(const struct kvm_vcpu *vcpu)
139 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT);
142 static inline bool kvm_condition_valid(const struct kvm_vcpu *vcpu)
144 if (vcpu_mode_is_32bit(vcpu))
145 return kvm_condition_valid32(vcpu);
150 static inline void kvm_skip_instr(struct kvm_vcpu *vcpu, bool is_wide_instr)
152 if (vcpu_mode_is_32bit(vcpu))
153 kvm_skip_instr32(vcpu, is_wide_instr);
158 static inline void vcpu_set_thumb(struct kvm_vcpu *vcpu)
160 *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT;
164 * vcpu_get_reg and vcpu_set_reg should always be passed a register number
165 * coming from a read of ESR_EL2. Otherwise, it may give the wrong result on
166 * AArch32 with banked registers.
168 static inline unsigned long vcpu_get_reg(const struct kvm_vcpu *vcpu,
171 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs.regs[reg_num];
174 static inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num,
178 vcpu_gp_regs(vcpu)->regs.regs[reg_num] = val;
181 static inline unsigned long vcpu_read_spsr(const struct kvm_vcpu *vcpu)
183 if (vcpu_mode_is_32bit(vcpu))
184 return vcpu_read_spsr32(vcpu);
186 if (vcpu->arch.sysregs_loaded_on_cpu)
187 return read_sysreg_el1(spsr);
189 return vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1];
192 static inline void vcpu_write_spsr(struct kvm_vcpu *vcpu, unsigned long v)
194 if (vcpu_mode_is_32bit(vcpu)) {
195 vcpu_write_spsr32(vcpu, v);
199 if (vcpu->arch.sysregs_loaded_on_cpu)
200 write_sysreg_el1(v, spsr);
202 vcpu_gp_regs(vcpu)->spsr[KVM_SPSR_EL1] = v;
206 * The layout of SPSR for an AArch32 state is different when observed from an
207 * AArch64 SPSR_ELx or an AArch32 SPSR_*. This function generates the AArch32
208 * view given an AArch64 view.
210 * In ARM DDI 0487E.a see:
212 * - The AArch64 view (SPSR_EL2) in section C5.2.18, page C5-426
213 * - The AArch32 view (SPSR_abt) in section G8.2.126, page G8-6256
214 * - The AArch32 view (SPSR_und) in section G8.2.132, page G8-6280
216 * Which show the following differences:
218 * | Bit | AA64 | AA32 | Notes |
219 * +-----+------+------+-----------------------------|
220 * | 24 | DIT | J | J is RES0 in ARMv8 |
221 * | 21 | SS | DIT | SS doesn't exist in AArch32 |
223 * ... and all other bits are (currently) common.
225 static inline unsigned long host_spsr_to_spsr32(unsigned long spsr)
227 const unsigned long overlap = BIT(24) | BIT(21);
228 unsigned long dit = !!(spsr & PSR_AA32_DIT_BIT);
237 static inline bool vcpu_mode_priv(const struct kvm_vcpu *vcpu)
241 if (vcpu_mode_is_32bit(vcpu)) {
242 mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK;
243 return mode > PSR_AA32_MODE_USR;
246 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK;
248 return mode != PSR_MODE_EL0t;
251 static inline u32 kvm_vcpu_get_hsr(const struct kvm_vcpu *vcpu)
253 return vcpu->arch.fault.esr_el2;
256 static inline int kvm_vcpu_get_condition(const struct kvm_vcpu *vcpu)
258 u32 esr = kvm_vcpu_get_hsr(vcpu);
260 if (esr & ESR_ELx_CV)
261 return (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT;
266 static inline unsigned long kvm_vcpu_get_hfar(const struct kvm_vcpu *vcpu)
268 return vcpu->arch.fault.far_el2;
271 static inline phys_addr_t kvm_vcpu_get_fault_ipa(const struct kvm_vcpu *vcpu)
273 return ((phys_addr_t)vcpu->arch.fault.hpfar_el2 & HPFAR_MASK) << 8;
276 static inline u64 kvm_vcpu_get_disr(const struct kvm_vcpu *vcpu)
278 return vcpu->arch.fault.disr_el1;
281 static inline u32 kvm_vcpu_hvc_get_imm(const struct kvm_vcpu *vcpu)
283 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_xVC_IMM_MASK;
286 static inline bool kvm_vcpu_dabt_isvalid(const struct kvm_vcpu *vcpu)
288 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_ISV);
291 static inline bool kvm_vcpu_dabt_issext(const struct kvm_vcpu *vcpu)
293 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SSE);
296 static inline bool kvm_vcpu_dabt_issf(const struct kvm_vcpu *vcpu)
298 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SF);
301 static inline int kvm_vcpu_dabt_get_rd(const struct kvm_vcpu *vcpu)
303 return (kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SRT_MASK) >> ESR_ELx_SRT_SHIFT;
306 static inline bool kvm_vcpu_abt_iss1tw(const struct kvm_vcpu *vcpu)
308 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_S1PTW);
311 static inline bool kvm_vcpu_dabt_iswrite(const struct kvm_vcpu *vcpu)
313 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_WNR) ||
314 kvm_vcpu_abt_iss1tw(vcpu); /* AF/DBM update */
317 static inline bool kvm_vcpu_dabt_is_cm(const struct kvm_vcpu *vcpu)
319 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_CM);
322 static inline int kvm_vcpu_dabt_get_as(const struct kvm_vcpu *vcpu)
324 return 1 << ((kvm_vcpu_get_hsr(vcpu) & ESR_ELx_SAS) >> ESR_ELx_SAS_SHIFT);
327 /* This one is not specific to Data Abort */
328 static inline bool kvm_vcpu_trap_il_is32bit(const struct kvm_vcpu *vcpu)
330 return !!(kvm_vcpu_get_hsr(vcpu) & ESR_ELx_IL);
333 static inline u8 kvm_vcpu_trap_get_class(const struct kvm_vcpu *vcpu)
335 return ESR_ELx_EC(kvm_vcpu_get_hsr(vcpu));
338 static inline bool kvm_vcpu_trap_is_iabt(const struct kvm_vcpu *vcpu)
340 return kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_IABT_LOW;
343 static inline bool kvm_vcpu_trap_is_exec_fault(const struct kvm_vcpu *vcpu)
345 return kvm_vcpu_trap_is_iabt(vcpu) && !kvm_vcpu_abt_iss1tw(vcpu);
348 static inline u8 kvm_vcpu_trap_get_fault(const struct kvm_vcpu *vcpu)
350 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC;
353 static inline u8 kvm_vcpu_trap_get_fault_type(const struct kvm_vcpu *vcpu)
355 return kvm_vcpu_get_hsr(vcpu) & ESR_ELx_FSC_TYPE;
358 static inline bool kvm_vcpu_dabt_isextabt(const struct kvm_vcpu *vcpu)
360 switch (kvm_vcpu_trap_get_fault(vcpu)) {
377 static inline int kvm_vcpu_sys_get_rt(struct kvm_vcpu *vcpu)
379 u32 esr = kvm_vcpu_get_hsr(vcpu);
380 return (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
383 static inline unsigned long kvm_vcpu_get_mpidr_aff(struct kvm_vcpu *vcpu)
385 return vcpu_read_sys_reg(vcpu, MPIDR_EL1) & MPIDR_HWID_BITMASK;
388 static inline void kvm_vcpu_set_be(struct kvm_vcpu *vcpu)
390 if (vcpu_mode_is_32bit(vcpu)) {
391 *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT;
393 u64 sctlr = vcpu_read_sys_reg(vcpu, SCTLR_EL1);
395 vcpu_write_sys_reg(vcpu, sctlr, SCTLR_EL1);
399 static inline bool kvm_vcpu_is_be(struct kvm_vcpu *vcpu)
401 if (vcpu_mode_is_32bit(vcpu))
402 return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT);
404 return !!(vcpu_read_sys_reg(vcpu, SCTLR_EL1) & (1 << 25));
407 static inline unsigned long vcpu_data_guest_to_host(struct kvm_vcpu *vcpu,
411 if (kvm_vcpu_is_be(vcpu)) {
416 return be16_to_cpu(data & 0xffff);
418 return be32_to_cpu(data & 0xffffffff);
420 return be64_to_cpu(data);
427 return le16_to_cpu(data & 0xffff);
429 return le32_to_cpu(data & 0xffffffff);
431 return le64_to_cpu(data);
435 return data; /* Leave LE untouched */
438 static inline unsigned long vcpu_data_host_to_guest(struct kvm_vcpu *vcpu,
442 if (kvm_vcpu_is_be(vcpu)) {
447 return cpu_to_be16(data & 0xffff);
449 return cpu_to_be32(data & 0xffffffff);
451 return cpu_to_be64(data);
458 return cpu_to_le16(data & 0xffff);
460 return cpu_to_le32(data & 0xffffffff);
462 return cpu_to_le64(data);
466 return data; /* Leave LE untouched */
469 #endif /* __ARM64_KVM_EMULATE_H__ */