arch/arm64/mm/dma-mapping.c

   1 /*
   2  * SWIOTLB-based DMA API implementation
   3  *
   4  * Copyright (C) 2012 ARM Ltd.
   5  * Author: Catalin Marinas <catalin.marinas@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/gfp.h>
  21 #include <linux/acpi.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/cache.h>
  24 #include <linux/export.h>
  25 #include <linux/slab.h>
  26 #include <linux/genalloc.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/dma-contiguous.h>
  29 #include <linux/vmalloc.h>
  30 #include <linux/swiotlb.h>
  31
  32 #include <asm/cacheflush.h>
  33
  34 static int swiotlb __ro_after_init;
  35
  36 static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
  37                                  bool coherent)
  38 {
  39         if (!coherent || (attrs & DMA_ATTR_WRITE_COMBINE))
  40                 return pgprot_writecombine(prot);
  41         return prot;
  42 }
  43
  44 static struct gen_pool *atomic_pool;
  45
  46 #define DEFAULT_DMA_COHERENT_POOL_SIZE  SZ_256K
  47 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
  48
  49 static int __init early_coherent_pool(char *p)
  50 {
  51         atomic_pool_size = memparse(p, &p);
  52         return 0;
  53 }
  54 early_param("coherent_pool", early_coherent_pool);
  55
  56 static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
  57 {
  58         unsigned long val;
  59         void *ptr = NULL;
  60
  61         if (!atomic_pool) {
  62                 WARN(1, "coherent pool not initialised!\n");
  63                 return NULL;
  64         }
  65
  66         val = gen_pool_alloc(atomic_pool, size);
  67         if (val) {
  68                 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
  69
  70                 *ret_page = phys_to_page(phys);
  71                 ptr = (void *)val;
  72                 memset(ptr, 0, size);
  73         }
  74
  75         return ptr;
  76 }
  77
  78 static bool __in_atomic_pool(void *start, size_t size)
  79 {
  80         return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
  81 }
  82
  83 static int __free_from_pool(void *start, size_t size)
  84 {
  85         if (!__in_atomic_pool(start, size))
  86                 return 0;
  87
  88         gen_pool_free(atomic_pool, (unsigned long)start, size);
  89
  90         return 1;
  91 }
  92
  93 static void *__dma_alloc_coherent(struct device *dev, size_t size,
  94                                   dma_addr_t *dma_handle, gfp_t flags,
  95                                   unsigned long attrs)
  96 {
  97         if (dev == NULL) {
  98                 WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
  99                 return NULL;
 100         }
 101
 102         if (IS_ENABLED(CONFIG_ZONE_DMA) &&
 103             dev->coherent_dma_mask <= DMA_BIT_MASK(32))
 104                 flags |= GFP_DMA;
 105         if (dev_get_cma_area(dev) && gfpflags_allow_blocking(flags)) {
 106                 struct page *page;
 107                 void *addr;
 108
 109                 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
 110                                                         get_order(size));
 111                 if (!page)
 112                         return NULL;
 113
 114                 *dma_handle = phys_to_dma(dev, page_to_phys(page));
 115                 addr = page_address(page);
 116                 memset(addr, 0, size);
 117                 return addr;
 118         } else {
 119                 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
 120         }
 121 }
 122
 123 static void __dma_free_coherent(struct device *dev, size_t size,
 124                                 void *vaddr, dma_addr_t dma_handle,
 125                                 unsigned long attrs)
 126 {
 127         bool freed;
 128         phys_addr_t paddr = dma_to_phys(dev, dma_handle);
 129
 130         if (dev == NULL) {
 131                 WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
 132                 return;
 133         }
 134
 135         freed = dma_release_from_contiguous(dev,
 136                                         phys_to_page(paddr),
 137                                         size >> PAGE_SHIFT);
 138         if (!freed)
 139                 swiotlb_free_coherent(dev, size, vaddr, dma_handle);
 140 }
 141
 142 static void *__dma_alloc(struct device *dev, size_t size,
 143                          dma_addr_t *dma_handle, gfp_t flags,
 144                          unsigned long attrs)
 145 {
 146         struct page *page;
 147         void *ptr, *coherent_ptr;
 148         bool coherent = is_device_dma_coherent(dev);
 149         pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, false);
 150
 151         size = PAGE_ALIGN(size);
 152
 153         if (!coherent && !gfpflags_allow_blocking(flags)) {
 154                 struct page *page = NULL;
 155                 void *addr = __alloc_from_pool(size, &page, flags);
 156
 157                 if (addr)
 158                         *dma_handle = phys_to_dma(dev, page_to_phys(page));
 159
 160                 return addr;
 161         }
 162
 163         ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
 164         if (!ptr)
 165                 goto no_mem;
 166
 167         /* no need for non-cacheable mapping if coherent */
 168         if (coherent)
 169                 return ptr;
 170
 171         /* remove any dirty cache lines on the kernel alias */
 172         __dma_flush_area(ptr, size);
 173
 174         /* create a coherent mapping */
 175         page = virt_to_page(ptr);
 176         coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
 177                                                    prot, NULL);
 178         if (!coherent_ptr)
 179                 goto no_map;
 180
 181         return coherent_ptr;
 182
 183 no_map:
 184         __dma_free_coherent(dev, size, ptr, *dma_handle, attrs);
 185 no_mem:
 186         *dma_handle = DMA_ERROR_CODE;
 187         return NULL;
 188 }
 189
 190 static void __dma_free(struct device *dev, size_t size,
 191                        void *vaddr, dma_addr_t dma_handle,
 192                        unsigned long attrs)
 193 {
 194         void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
 195
 196         size = PAGE_ALIGN(size);
 197
 198         if (!is_device_dma_coherent(dev)) {
 199                 if (__free_from_pool(vaddr, size))
 200                         return;
 201                 vunmap(vaddr);
 202         }
 203         __dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
 204 }
 205
 206 static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
 207                                      unsigned long offset, size_t size,
 208                                      enum dma_data_direction dir,
 209                                      unsigned long attrs)
 210 {
 211         dma_addr_t dev_addr;
 212
 213         dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
 214         if (!is_device_dma_coherent(dev))
 215                 __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 216
 217         return dev_addr;
 218 }
 219
 220
 221 static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
 222                                  size_t size, enum dma_data_direction dir,
 223                                  unsigned long attrs)
 224 {
 225         if (!is_device_dma_coherent(dev))
 226                 __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 227         swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
 228 }
 229
 230 static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
 231                                   int nelems, enum dma_data_direction dir,
 232                                   unsigned long attrs)
 233 {
 234         struct scatterlist *sg;
 235         int i, ret;
 236
 237         ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
 238         if (!is_device_dma_coherent(dev))
 239                 for_each_sg(sgl, sg, ret, i)
 240                         __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 241                                        sg->length, dir);
 242
 243         return ret;
 244 }
 245
 246 static void __swiotlb_unmap_sg_attrs(struct device *dev,
 247                                      struct scatterlist *sgl, int nelems,
 248                                      enum dma_data_direction dir,
 249                                      unsigned long attrs)
 250 {
 251         struct scatterlist *sg;
 252         int i;
 253
 254         if (!is_device_dma_coherent(dev))
 255                 for_each_sg(sgl, sg, nelems, i)
 256                         __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 257                                          sg->length, dir);
 258         swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
 259 }
 260
 261 static void __swiotlb_sync_single_for_cpu(struct device *dev,
 262                                           dma_addr_t dev_addr, size_t size,
 263                                           enum dma_data_direction dir)
 264 {
 265         if (!is_device_dma_coherent(dev))
 266                 __dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 267         swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
 268 }
 269
 270 static void __swiotlb_sync_single_for_device(struct device *dev,
 271                                              dma_addr_t dev_addr, size_t size,
 272                                              enum dma_data_direction dir)
 273 {
 274         swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
 275         if (!is_device_dma_coherent(dev))
 276                 __dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
 277 }
 278
 279 static void __swiotlb_sync_sg_for_cpu(struct device *dev,
 280                                       struct scatterlist *sgl, int nelems,
 281                                       enum dma_data_direction dir)
 282 {
 283         struct scatterlist *sg;
 284         int i;
 285
 286         if (!is_device_dma_coherent(dev))
 287                 for_each_sg(sgl, sg, nelems, i)
 288                         __dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 289                                          sg->length, dir);
 290         swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
 291 }
 292
 293 static void __swiotlb_sync_sg_for_device(struct device *dev,
 294                                          struct scatterlist *sgl, int nelems,
 295                                          enum dma_data_direction dir)
 296 {
 297         struct scatterlist *sg;
 298         int i;
 299
 300         swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
 301         if (!is_device_dma_coherent(dev))
 302                 for_each_sg(sgl, sg, nelems, i)
 303                         __dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
 304                                        sg->length, dir);
 305 }
 306
 307 static int __swiotlb_mmap(struct device *dev,
 308                           struct vm_area_struct *vma,
 309                           void *cpu_addr, dma_addr_t dma_addr, size_t size,
 310                           unsigned long attrs)
 311 {
 312         int ret = -ENXIO;
 313         unsigned long nr_vma_pages = (vma->vm_end - vma->vm_start) >>
 314                                         PAGE_SHIFT;
 315         unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
 316         unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
 317         unsigned long off = vma->vm_pgoff;
 318
 319         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
 320                                              is_device_dma_coherent(dev));
 321
 322         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 323                 return ret;
 324
 325         if (off < nr_pages && nr_vma_pages <= (nr_pages - off)) {
 326                 ret = remap_pfn_range(vma, vma->vm_start,
 327                                       pfn + off,
 328                                       vma->vm_end - vma->vm_start,
 329                                       vma->vm_page_prot);
 330         }
 331
 332         return ret;
 333 }
 334
 335 static int __swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
 336                                  void *cpu_addr, dma_addr_t handle, size_t size,
 337                                  unsigned long attrs)
 338 {
 339         int ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 340
 341         if (!ret)
 342                 sg_set_page(sgt->sgl, phys_to_page(dma_to_phys(dev, handle)),
 343                             PAGE_ALIGN(size), 0);
 344
 345         return ret;
 346 }
 347
 348 static int __swiotlb_dma_supported(struct device *hwdev, u64 mask)
 349 {
 350         if (swiotlb)
 351                 return swiotlb_dma_supported(hwdev, mask);
 352         return 1;
 353 }
 354
 355 static int __swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t addr)
 356 {
 357         if (swiotlb)
 358                 return swiotlb_dma_mapping_error(hwdev, addr);
 359         return 0;
 360 }
 361
 362 static struct dma_map_ops swiotlb_dma_ops = {
 363         .alloc = __dma_alloc,
 364         .free = __dma_free,
 365         .mmap = __swiotlb_mmap,
 366         .get_sgtable = __swiotlb_get_sgtable,
 367         .map_page = __swiotlb_map_page,
 368         .unmap_page = __swiotlb_unmap_page,
 369         .map_sg = __swiotlb_map_sg_attrs,
 370         .unmap_sg = __swiotlb_unmap_sg_attrs,
 371         .sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
 372         .sync_single_for_device = __swiotlb_sync_single_for_device,
 373         .sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
 374         .sync_sg_for_device = __swiotlb_sync_sg_for_device,
 375         .dma_supported = __swiotlb_dma_supported,
 376         .mapping_error = __swiotlb_dma_mapping_error,
 377 };
 378
 379 static int __init atomic_pool_init(void)
 380 {
 381         pgprot_t prot = __pgprot(PROT_NORMAL_NC);
 382         unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
 383         struct page *page;
 384         void *addr;
 385         unsigned int pool_size_order = get_order(atomic_pool_size);
 386
 387         if (dev_get_cma_area(NULL))
 388                 page = dma_alloc_from_contiguous(NULL, nr_pages,
 389                                                         pool_size_order);
 390         else
 391                 page = alloc_pages(GFP_DMA, pool_size_order);
 392
 393         if (page) {
 394                 int ret;
 395                 void *page_addr = page_address(page);
 396
 397                 memset(page_addr, 0, atomic_pool_size);
 398                 __dma_flush_area(page_addr, atomic_pool_size);
 399
 400                 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
 401                 if (!atomic_pool)
 402                         goto free_page;
 403
 404                 addr = dma_common_contiguous_remap(page, atomic_pool_size,
 405                                         VM_USERMAP, prot, atomic_pool_init);
 406
 407                 if (!addr)
 408                         goto destroy_genpool;
 409
 410                 ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
 411                                         page_to_phys(page),
 412                                         atomic_pool_size, -1);
 413                 if (ret)
 414                         goto remove_mapping;
 415
 416                 gen_pool_set_algo(atomic_pool,
 417                                   gen_pool_first_fit_order_align,
 418                                   (void *)PAGE_SHIFT);
 419
 420                 pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
 421                         atomic_pool_size / 1024);
 422                 return 0;
 423         }
 424         goto out;
 425
 426 remove_mapping:
 427         dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
 428 destroy_genpool:
 429         gen_pool_destroy(atomic_pool);
 430         atomic_pool = NULL;
 431 free_page:
 432         if (!dma_release_from_contiguous(NULL, page, nr_pages))
 433                 __free_pages(page, pool_size_order);
 434 out:
 435         pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
 436                 atomic_pool_size / 1024);
 437         return -ENOMEM;
 438 }
 439
 440 /********************************************
 441  * The following APIs are for dummy DMA ops *
 442  ********************************************/
 443
 444 static void *__dummy_alloc(struct device *dev, size_t size,
 445                            dma_addr_t *dma_handle, gfp_t flags,
 446                            unsigned long attrs)
 447 {
 448         return NULL;
 449 }
 450
 451 static void __dummy_free(struct device *dev, size_t size,
 452                          void *vaddr, dma_addr_t dma_handle,
 453                          unsigned long attrs)
 454 {
 455 }
 456
 457 static int __dummy_mmap(struct device *dev,
 458                         struct vm_area_struct *vma,
 459                         void *cpu_addr, dma_addr_t dma_addr, size_t size,
 460                         unsigned long attrs)
 461 {
 462         return -ENXIO;
 463 }
 464
 465 static dma_addr_t __dummy_map_page(struct device *dev, struct page *page,
 466                                    unsigned long offset, size_t size,
 467                                    enum dma_data_direction dir,
 468                                    unsigned long attrs)
 469 {
 470         return DMA_ERROR_CODE;
 471 }
 472
 473 static void __dummy_unmap_page(struct device *dev, dma_addr_t dev_addr,
 474                                size_t size, enum dma_data_direction dir,
 475                                unsigned long attrs)
 476 {
 477 }
 478
 479 static int __dummy_map_sg(struct device *dev, struct scatterlist *sgl,
 480                           int nelems, enum dma_data_direction dir,
 481                           unsigned long attrs)
 482 {
 483         return 0;
 484 }
 485
 486 static void __dummy_unmap_sg(struct device *dev,
 487                              struct scatterlist *sgl, int nelems,
 488                              enum dma_data_direction dir,
 489                              unsigned long attrs)
 490 {
 491 }
 492
 493 static void __dummy_sync_single(struct device *dev,
 494                                 dma_addr_t dev_addr, size_t size,
 495                                 enum dma_data_direction dir)
 496 {
 497 }
 498
 499 static void __dummy_sync_sg(struct device *dev,
 500                             struct scatterlist *sgl, int nelems,
 501                             enum dma_data_direction dir)
 502 {
 503 }
 504
 505 static int __dummy_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
 506 {
 507         return 1;
 508 }
 509
 510 static int __dummy_dma_supported(struct device *hwdev, u64 mask)
 511 {
 512         return 0;
 513 }
 514
 515 struct dma_map_ops dummy_dma_ops = {
 516         .alloc                  = __dummy_alloc,
 517         .free                   = __dummy_free,
 518         .mmap                   = __dummy_mmap,
 519         .map_page               = __dummy_map_page,
 520         .unmap_page             = __dummy_unmap_page,
 521         .map_sg                 = __dummy_map_sg,
 522         .unmap_sg               = __dummy_unmap_sg,
 523         .sync_single_for_cpu    = __dummy_sync_single,
 524         .sync_single_for_device = __dummy_sync_single,
 525         .sync_sg_for_cpu        = __dummy_sync_sg,
 526         .sync_sg_for_device     = __dummy_sync_sg,
 527         .mapping_error          = __dummy_mapping_error,
 528         .dma_supported          = __dummy_dma_supported,
 529 };
 530 EXPORT_SYMBOL(dummy_dma_ops);
 531
 532 static int __init arm64_dma_init(void)
 533 {
 534         if (swiotlb_force == SWIOTLB_FORCE ||
 535             max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT))
 536                 swiotlb = 1;
 537
 538         return atomic_pool_init();
 539 }
 540 arch_initcall(arm64_dma_init);
 541
 542 #define PREALLOC_DMA_DEBUG_ENTRIES      4096
 543
 544 static int __init dma_debug_do_init(void)
 545 {
 546         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 547         return 0;
 548 }
 549 fs_initcall(dma_debug_do_init);
 550
 551
 552 #ifdef CONFIG_IOMMU_DMA
 553 #include <linux/dma-iommu.h>
 554 #include <linux/platform_device.h>
 555 #include <linux/amba/bus.h>
 556
 557 /* Thankfully, all cache ops are by VA so we can ignore phys here */
 558 static void flush_page(struct device *dev, const void *virt, phys_addr_t phys)
 559 {
 560         __dma_flush_area(virt, PAGE_SIZE);
 561 }
 562
 563 static void *__iommu_alloc_attrs(struct device *dev, size_t size,
 564                                  dma_addr_t *handle, gfp_t gfp,
 565                                  unsigned long attrs)
 566 {
 567         bool coherent = is_device_dma_coherent(dev);
 568         int ioprot = dma_direction_to_prot(DMA_BIDIRECTIONAL, coherent);
 569         size_t iosize = size;
 570         void *addr;
 571
 572         if (WARN(!dev, "cannot create IOMMU mapping for unknown device\n"))
 573                 return NULL;
 574
 575         size = PAGE_ALIGN(size);
 576
 577         /*
 578          * Some drivers rely on this, and we probably don't want the
 579          * possibility of stale kernel data being read by devices anyway.
 580          */
 581         gfp |= __GFP_ZERO;
 582
 583         if (gfpflags_allow_blocking(gfp)) {
 584                 struct page **pages;
 585                 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, coherent);
 586
 587                 pages = iommu_dma_alloc(dev, iosize, gfp, attrs, ioprot,
 588                                         handle, flush_page);
 589                 if (!pages)
 590                         return NULL;
 591
 592                 addr = dma_common_pages_remap(pages, size, VM_USERMAP, prot,
 593                                               __builtin_return_address(0));
 594                 if (!addr)
 595                         iommu_dma_free(dev, pages, iosize, handle);
 596         } else {
 597                 struct page *page;
 598                 /*
 599                  * In atomic context we can't remap anything, so we'll only
 600                  * get the virtually contiguous buffer we need by way of a
 601                  * physically contiguous allocation.
 602                  */
 603                 if (coherent) {
 604                         page = alloc_pages(gfp, get_order(size));
 605                         addr = page ? page_address(page) : NULL;
 606                 } else {
 607                         addr = __alloc_from_pool(size, &page, gfp);
 608                 }
 609                 if (!addr)
 610                         return NULL;
 611
 612                 *handle = iommu_dma_map_page(dev, page, 0, iosize, ioprot);
 613                 if (iommu_dma_mapping_error(dev, *handle)) {
 614                         if (coherent)
 615                                 __free_pages(page, get_order(size));
 616                         else
 617                                 __free_from_pool(addr, size);
 618                         addr = NULL;
 619                 }
 620         }
 621         return addr;
 622 }
 623
 624 static void __iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
 625                                dma_addr_t handle, unsigned long attrs)
 626 {
 627         size_t iosize = size;
 628
 629         size = PAGE_ALIGN(size);
 630         /*
 631          * @cpu_addr will be one of 3 things depending on how it was allocated:
 632          * - A remapped array of pages from iommu_dma_alloc(), for all
 633          *   non-atomic allocations.
 634          * - A non-cacheable alias from the atomic pool, for atomic
 635          *   allocations by non-coherent devices.
 636          * - A normal lowmem address, for atomic allocations by
 637          *   coherent devices.
 638          * Hence how dodgy the below logic looks...
 639          */
 640         if (__in_atomic_pool(cpu_addr, size)) {
 641                 iommu_dma_unmap_page(dev, handle, iosize, 0, 0);
 642                 __free_from_pool(cpu_addr, size);
 643         } else if (is_vmalloc_addr(cpu_addr)){
 644                 struct vm_struct *area = find_vm_area(cpu_addr);
 645
 646                 if (WARN_ON(!area || !area->pages))
 647                         return;
 648                 iommu_dma_free(dev, area->pages, iosize, &handle);
 649                 dma_common_free_remap(cpu_addr, size, VM_USERMAP);
 650         } else {
 651                 iommu_dma_unmap_page(dev, handle, iosize, 0, 0);
 652                 __free_pages(virt_to_page(cpu_addr), get_order(size));
 653         }
 654 }
 655
 656 static int __iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
 657                               void *cpu_addr, dma_addr_t dma_addr, size_t size,
 658                               unsigned long attrs)
 659 {
 660         struct vm_struct *area;
 661         int ret;
 662
 663         vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
 664                                              is_device_dma_coherent(dev));
 665
 666         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 667                 return ret;
 668
 669         area = find_vm_area(cpu_addr);
 670         if (WARN_ON(!area || !area->pages))
 671                 return -ENXIO;
 672
 673         return iommu_dma_mmap(area->pages, size, vma);
 674 }
 675
 676 static int __iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
 677                                void *cpu_addr, dma_addr_t dma_addr,
 678                                size_t size, unsigned long attrs)
 679 {
 680         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 681         struct vm_struct *area = find_vm_area(cpu_addr);
 682
 683         if (WARN_ON(!area || !area->pages))
 684                 return -ENXIO;
 685
 686         return sg_alloc_table_from_pages(sgt, area->pages, count, 0, size,
 687                                          GFP_KERNEL);
 688 }
 689
 690 static void __iommu_sync_single_for_cpu(struct device *dev,
 691                                         dma_addr_t dev_addr, size_t size,
 692                                         enum dma_data_direction dir)
 693 {
 694         phys_addr_t phys;
 695
 696         if (is_device_dma_coherent(dev))
 697                 return;
 698
 699         phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
 700         __dma_unmap_area(phys_to_virt(phys), size, dir);
 701 }
 702
 703 static void __iommu_sync_single_for_device(struct device *dev,
 704                                            dma_addr_t dev_addr, size_t size,
 705                                            enum dma_data_direction dir)
 706 {
 707         phys_addr_t phys;
 708
 709         if (is_device_dma_coherent(dev))
 710                 return;
 711
 712         phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
 713         __dma_map_area(phys_to_virt(phys), size, dir);
 714 }
 715
 716 static dma_addr_t __iommu_map_page(struct device *dev, struct page *page,
 717                                    unsigned long offset, size_t size,
 718                                    enum dma_data_direction dir,
 719                                    unsigned long attrs)
 720 {
 721         bool coherent = is_device_dma_coherent(dev);
 722         int prot = dma_direction_to_prot(dir, coherent);
 723         dma_addr_t dev_addr = iommu_dma_map_page(dev, page, offset, size, prot);
 724
 725         if (!iommu_dma_mapping_error(dev, dev_addr) &&
 726             (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 727                 __iommu_sync_single_for_device(dev, dev_addr, size, dir);
 728
 729         return dev_addr;
 730 }
 731
 732 static void __iommu_unmap_page(struct device *dev, dma_addr_t dev_addr,
 733                                size_t size, enum dma_data_direction dir,
 734                                unsigned long attrs)
 735 {
 736         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 737                 __iommu_sync_single_for_cpu(dev, dev_addr, size, dir);
 738
 739         iommu_dma_unmap_page(dev, dev_addr, size, dir, attrs);
 740 }
 741
 742 static void __iommu_sync_sg_for_cpu(struct device *dev,
 743                                     struct scatterlist *sgl, int nelems,
 744                                     enum dma_data_direction dir)
 745 {
 746         struct scatterlist *sg;
 747         int i;
 748
 749         if (is_device_dma_coherent(dev))
 750                 return;
 751
 752         for_each_sg(sgl, sg, nelems, i)
 753                 __dma_unmap_area(sg_virt(sg), sg->length, dir);
 754 }
 755
 756 static void __iommu_sync_sg_for_device(struct device *dev,
 757                                        struct scatterlist *sgl, int nelems,
 758                                        enum dma_data_direction dir)
 759 {
 760         struct scatterlist *sg;
 761         int i;
 762
 763         if (is_device_dma_coherent(dev))
 764                 return;
 765
 766         for_each_sg(sgl, sg, nelems, i)
 767                 __dma_map_area(sg_virt(sg), sg->length, dir);
 768 }
 769
 770 static int __iommu_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
 771                                 int nelems, enum dma_data_direction dir,
 772                                 unsigned long attrs)
 773 {
 774         bool coherent = is_device_dma_coherent(dev);
 775
 776         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 777                 __iommu_sync_sg_for_device(dev, sgl, nelems, dir);
 778
 779         return iommu_dma_map_sg(dev, sgl, nelems,
 780                         dma_direction_to_prot(dir, coherent));
 781 }
 782
 783 static void __iommu_unmap_sg_attrs(struct device *dev,
 784                                    struct scatterlist *sgl, int nelems,
 785                                    enum dma_data_direction dir,
 786                                    unsigned long attrs)
 787 {
 788         if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
 789                 __iommu_sync_sg_for_cpu(dev, sgl, nelems, dir);
 790
 791         iommu_dma_unmap_sg(dev, sgl, nelems, dir, attrs);
 792 }
 793
 794 static struct dma_map_ops iommu_dma_ops = {
 795         .alloc = __iommu_alloc_attrs,
 796         .free = __iommu_free_attrs,
 797         .mmap = __iommu_mmap_attrs,
 798         .get_sgtable = __iommu_get_sgtable,
 799         .map_page = __iommu_map_page,
 800         .unmap_page = __iommu_unmap_page,
 801         .map_sg = __iommu_map_sg_attrs,
 802         .unmap_sg = __iommu_unmap_sg_attrs,
 803         .sync_single_for_cpu = __iommu_sync_single_for_cpu,
 804         .sync_single_for_device = __iommu_sync_single_for_device,
 805         .sync_sg_for_cpu = __iommu_sync_sg_for_cpu,
 806         .sync_sg_for_device = __iommu_sync_sg_for_device,
 807         .dma_supported = iommu_dma_supported,
 808         .mapping_error = iommu_dma_mapping_error,
 809 };
 810
 811 /*
 812  * TODO: Right now __iommu_setup_dma_ops() gets called too early to do
 813  * everything it needs to - the device is only partially created and the
 814  * IOMMU driver hasn't seen it yet, so it can't have a group. Thus we
 815  * need this delayed attachment dance. Once IOMMU probe ordering is sorted
 816  * to move the arch_setup_dma_ops() call later, all the notifier bits below
 817  * become unnecessary, and will go away.
 818  */
 819 struct iommu_dma_notifier_data {
 820         struct list_head list;
 821         struct device *dev;
 822         const struct iommu_ops *ops;
 823         u64 dma_base;
 824         u64 size;
 825 };
 826 static LIST_HEAD(iommu_dma_masters);
 827 static DEFINE_MUTEX(iommu_dma_notifier_lock);
 828
 829 static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops,
 830                            u64 dma_base, u64 size)
 831 {
 832         struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
 833
 834         /*
 835          * If the IOMMU driver has the DMA domain support that we require,
 836          * then the IOMMU core will have already configured a group for this
 837          * device, and allocated the default domain for that group.
 838          */
 839         if (!domain)
 840                 goto out_err;
 841
 842         if (domain->type == IOMMU_DOMAIN_DMA) {
 843                 if (iommu_dma_init_domain(domain, dma_base, size, dev))
 844                         goto out_err;
 845
 846                 dev->archdata.dma_ops = &iommu_dma_ops;
 847         }
 848
 849         return true;
 850 out_err:
 851         pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n",
 852                  dev_name(dev));
 853         return false;
 854 }
 855
 856 static void queue_iommu_attach(struct device *dev, const struct iommu_ops *ops,
 857                               u64 dma_base, u64 size)
 858 {
 859         struct iommu_dma_notifier_data *iommudata;
 860
 861         iommudata = kzalloc(sizeof(*iommudata), GFP_KERNEL);
 862         if (!iommudata)
 863                 return;
 864
 865         iommudata->dev = dev;
 866         iommudata->ops = ops;
 867         iommudata->dma_base = dma_base;
 868         iommudata->size = size;
 869
 870         mutex_lock(&iommu_dma_notifier_lock);
 871         list_add(&iommudata->list, &iommu_dma_masters);
 872         mutex_unlock(&iommu_dma_notifier_lock);
 873 }
 874
 875 static int __iommu_attach_notifier(struct notifier_block *nb,
 876                                    unsigned long action, void *data)
 877 {
 878         struct iommu_dma_notifier_data *master, *tmp;
 879
 880         if (action != BUS_NOTIFY_BIND_DRIVER)
 881                 return 0;
 882
 883         mutex_lock(&iommu_dma_notifier_lock);
 884         list_for_each_entry_safe(master, tmp, &iommu_dma_masters, list) {
 885                 if (data == master->dev && do_iommu_attach(master->dev,
 886                                 master->ops, master->dma_base, master->size)) {
 887                         list_del(&master->list);
 888                         kfree(master);
 889                         break;
 890                 }
 891         }
 892         mutex_unlock(&iommu_dma_notifier_lock);
 893         return 0;
 894 }
 895
 896 static int __init register_iommu_dma_ops_notifier(struct bus_type *bus)
 897 {
 898         struct notifier_block *nb = kzalloc(sizeof(*nb), GFP_KERNEL);
 899         int ret;
 900
 901         if (!nb)
 902                 return -ENOMEM;
 903
 904         nb->notifier_call = __iommu_attach_notifier;
 905
 906         ret = bus_register_notifier(bus, nb);
 907         if (ret) {
 908                 pr_warn("Failed to register DMA domain notifier; IOMMU DMA ops unavailable on bus '%s'\n",
 909                         bus->name);
 910                 kfree(nb);
 911         }
 912         return ret;
 913 }
 914
 915 static int __init __iommu_dma_init(void)
 916 {
 917         int ret;
 918
 919         ret = iommu_dma_init();
 920         if (!ret)
 921                 ret = register_iommu_dma_ops_notifier(&platform_bus_type);
 922         if (!ret)
 923                 ret = register_iommu_dma_ops_notifier(&amba_bustype);
 924 #ifdef CONFIG_PCI
 925         if (!ret)
 926                 ret = register_iommu_dma_ops_notifier(&pci_bus_type);
 927 #endif
 928         return ret;
 929 }
 930 arch_initcall(__iommu_dma_init);
 931
 932 static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 933                                   const struct iommu_ops *ops)
 934 {
 935         struct iommu_group *group;
 936
 937         if (!ops)
 938                 return;
 939         /*
 940          * TODO: As a concession to the future, we're ready to handle being
 941          * called both early and late (i.e. after bus_add_device). Once all
 942          * the platform bus code is reworked to call us late and the notifier
 943          * junk above goes away, move the body of do_iommu_attach here.
 944          */
 945         group = iommu_group_get(dev);
 946         if (group) {
 947                 do_iommu_attach(dev, ops, dma_base, size);
 948                 iommu_group_put(group);
 949         } else {
 950                 queue_iommu_attach(dev, ops, dma_base, size);
 951         }
 952 }
 953
 954 void arch_teardown_dma_ops(struct device *dev)
 955 {
 956         struct iommu_domain *domain = iommu_get_domain_for_dev(dev);
 957
 958         if (WARN_ON(domain))
 959                 iommu_detach_device(domain, dev);
 960
 961         dev->archdata.dma_ops = NULL;
 962 }
 963
 964 #else
 965
 966 static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 967                                   const struct iommu_ops *iommu)
 968 { }
 969
 970 #endif  /* CONFIG_IOMMU_DMA */
 971
 972 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
 973                         const struct iommu_ops *iommu, bool coherent)
 974 {
 975         if (!dev->archdata.dma_ops)
 976                 dev->archdata.dma_ops = &swiotlb_dma_ops;
 977
 978         dev->archdata.dma_coherent = coherent;
 979         __iommu_setup_dma_ops(dev, dma_base, size, iommu);
 980 }