arch/ia64/include/uapi/asm/intel_intrin.h

   1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2 #ifndef _ASM_IA64_INTEL_INTRIN_H
   3 #define _ASM_IA64_INTEL_INTRIN_H
   4 /*
   5  * Intel Compiler Intrinsics
   6  *
   7  * Copyright (C) 2002,2003 Jun Nakajima <jun.nakajima@intel.com>
   8  * Copyright (C) 2002,2003 Suresh Siddha <suresh.b.siddha@intel.com>
   9  * Copyright (C) 2005,2006 Hongjiu Lu <hongjiu.lu@intel.com>
  10  *
  11  */
  12 #include <ia64intrin.h>
  13
  14 #define ia64_barrier()          __memory_barrier()
  15
  16 #define ia64_stop()     /* Nothing: As of now stop bit is generated for each
  17                          * intrinsic
  18                          */
  19
  20 #define ia64_native_getreg      __getReg
  21 #define ia64_native_setreg      __setReg
  22
  23 #define ia64_hint               __hint
  24 #define ia64_hint_pause         __hint_pause
  25
  26 #define ia64_mux1_brcst         _m64_mux1_brcst
  27 #define ia64_mux1_mix           _m64_mux1_mix
  28 #define ia64_mux1_shuf          _m64_mux1_shuf
  29 #define ia64_mux1_alt           _m64_mux1_alt
  30 #define ia64_mux1_rev           _m64_mux1_rev
  31
  32 #define ia64_mux1(x,v)          _m_to_int64(_m64_mux1(_m_from_int64(x), (v)))
  33 #define ia64_popcnt             _m64_popcnt
  34 #define ia64_getf_exp           __getf_exp
  35 #define ia64_shrp               _m64_shrp
  36
  37 #define ia64_tpa                __tpa
  38 #define ia64_invala             __invala
  39 #define ia64_invala_gr          __invala_gr
  40 #define ia64_invala_fr          __invala_fr
  41 #define ia64_nop                __nop
  42 #define ia64_sum                __sum
  43 #define ia64_native_ssm         __ssm
  44 #define ia64_rum                __rum
  45 #define ia64_native_rsm         __rsm
  46 #define ia64_native_fc          __fc
  47
  48 #define ia64_ldfs               __ldfs
  49 #define ia64_ldfd               __ldfd
  50 #define ia64_ldfe               __ldfe
  51 #define ia64_ldf8               __ldf8
  52 #define ia64_ldf_fill           __ldf_fill
  53
  54 #define ia64_stfs               __stfs
  55 #define ia64_stfd               __stfd
  56 #define ia64_stfe               __stfe
  57 #define ia64_stf8               __stf8
  58 #define ia64_stf_spill          __stf_spill
  59
  60 #define ia64_mf                 __mf
  61 #define ia64_mfa                __mfa
  62
  63 #define ia64_fetchadd4_acq      __fetchadd4_acq
  64 #define ia64_fetchadd4_rel      __fetchadd4_rel
  65 #define ia64_fetchadd8_acq      __fetchadd8_acq
  66 #define ia64_fetchadd8_rel      __fetchadd8_rel
  67
  68 #define ia64_xchg1              _InterlockedExchange8
  69 #define ia64_xchg2              _InterlockedExchange16
  70 #define ia64_xchg4              _InterlockedExchange
  71 #define ia64_xchg8              _InterlockedExchange64
  72
  73 #define ia64_cmpxchg1_rel       _InterlockedCompareExchange8_rel
  74 #define ia64_cmpxchg1_acq       _InterlockedCompareExchange8_acq
  75 #define ia64_cmpxchg2_rel       _InterlockedCompareExchange16_rel
  76 #define ia64_cmpxchg2_acq       _InterlockedCompareExchange16_acq
  77 #define ia64_cmpxchg4_rel       _InterlockedCompareExchange_rel
  78 #define ia64_cmpxchg4_acq       _InterlockedCompareExchange_acq
  79 #define ia64_cmpxchg8_rel       _InterlockedCompareExchange64_rel
  80 #define ia64_cmpxchg8_acq       _InterlockedCompareExchange64_acq
  81
  82 #define __ia64_set_dbr(index, val)      \
  83                 __setIndReg(_IA64_REG_INDR_DBR, index, val)
  84 #define ia64_set_ibr(index, val)        \
  85                 __setIndReg(_IA64_REG_INDR_IBR, index, val)
  86 #define ia64_set_pkr(index, val)        \
  87                 __setIndReg(_IA64_REG_INDR_PKR, index, val)
  88 #define ia64_set_pmc(index, val)        \
  89                 __setIndReg(_IA64_REG_INDR_PMC, index, val)
  90 #define ia64_set_pmd(index, val)        \
  91                 __setIndReg(_IA64_REG_INDR_PMD, index, val)
  92 #define ia64_native_set_rr(index, val)  \
  93                 __setIndReg(_IA64_REG_INDR_RR, index, val)
  94
  95 #define ia64_native_get_cpuid(index)    \
  96                 __getIndReg(_IA64_REG_INDR_CPUID, index)
  97 #define __ia64_get_dbr(index)           __getIndReg(_IA64_REG_INDR_DBR, index)
  98 #define ia64_get_ibr(index)             __getIndReg(_IA64_REG_INDR_IBR, index)
  99 #define ia64_get_pkr(index)             __getIndReg(_IA64_REG_INDR_PKR, index)
 100 #define ia64_get_pmc(index)             __getIndReg(_IA64_REG_INDR_PMC, index)
 101 #define ia64_native_get_pmd(index)      __getIndReg(_IA64_REG_INDR_PMD, index)
 102 #define ia64_native_get_rr(index)       __getIndReg(_IA64_REG_INDR_RR, index)
 103
 104 #define ia64_srlz_d             __dsrlz
 105 #define ia64_srlz_i             __isrlz
 106
 107 #define ia64_dv_serialize_data()
 108 #define ia64_dv_serialize_instruction()
 109
 110 #define ia64_st1_rel            __st1_rel
 111 #define ia64_st2_rel            __st2_rel
 112 #define ia64_st4_rel            __st4_rel
 113 #define ia64_st8_rel            __st8_rel
 114
 115 /* FIXME: need st4.rel.nta intrinsic */
 116 #define ia64_st4_rel_nta        __st4_rel
 117
 118 #define ia64_ld1_acq            __ld1_acq
 119 #define ia64_ld2_acq            __ld2_acq
 120 #define ia64_ld4_acq            __ld4_acq
 121 #define ia64_ld8_acq            __ld8_acq
 122
 123 #define ia64_sync_i             __synci
 124 #define ia64_native_thash       __thash
 125 #define ia64_native_ttag        __ttag
 126 #define ia64_itcd               __itcd
 127 #define ia64_itci               __itci
 128 #define ia64_itrd               __itrd
 129 #define ia64_itri               __itri
 130 #define ia64_ptce               __ptce
 131 #define ia64_ptcl               __ptcl
 132 #define ia64_native_ptcg        __ptcg
 133 #define ia64_native_ptcga       __ptcga
 134 #define ia64_ptri               __ptri
 135 #define ia64_ptrd               __ptrd
 136 #define ia64_dep_mi             _m64_dep_mi
 137
 138 /* Values for lfhint in __lfetch and __lfetch_fault */
 139
 140 #define ia64_lfhint_none        __lfhint_none
 141 #define ia64_lfhint_nt1         __lfhint_nt1
 142 #define ia64_lfhint_nt2         __lfhint_nt2
 143 #define ia64_lfhint_nta         __lfhint_nta
 144
 145 #define ia64_lfetch             __lfetch
 146 #define ia64_lfetch_excl        __lfetch_excl
 147 #define ia64_lfetch_fault       __lfetch_fault
 148 #define ia64_lfetch_fault_excl  __lfetch_fault_excl
 149
 150 #define ia64_native_intrin_local_irq_restore(x)         \
 151 do {                                                    \
 152         if ((x) != 0) {                                 \
 153                 ia64_native_ssm(IA64_PSR_I);            \
 154                 ia64_srlz_d();                          \
 155         } else {                                        \
 156                 ia64_native_rsm(IA64_PSR_I);            \
 157         }                                               \
 158 } while (0)
 159
 160 #define __builtin_trap()        __break(0);
 161
 162 #endif /* _ASM_IA64_INTEL_INTRIN_H */