arch/mips/boot/dts/brcm/bcm7346.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 / {
   3         #address-cells = <1>;
   4         #size-cells = <1>;
   5         compatible = "brcm,bcm7346";
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 mips-hpt-frequency = <163125000>;
  12
  13                 cpu@0 {
  14                         compatible = "brcm,bmips5000";
  15                         device_type = "cpu";
  16                         reg = <0>;
  17                 };
  18
  19                 cpu@1 {
  20                         compatible = "brcm,bmips5000";
  21                         device_type = "cpu";
  22                         reg = <1>;
  23                 };
  24         };
  25
  26         aliases {
  27                 uart0 = &uart0;
  28         };
  29
  30         cpu_intc: interrupt-controller {
  31                 #address-cells = <0>;
  32                 compatible = "mti,cpu-interrupt-controller";
  33
  34                 interrupt-controller;
  35                 #interrupt-cells = <1>;
  36         };
  37
  38         clocks {
  39                 uart_clk: uart_clk {
  40                         compatible = "fixed-clock";
  41                         #clock-cells = <0>;
  42                         clock-frequency = <81000000>;
  43                 };
  44
  45                 upg_clk: upg_clk {
  46                         compatible = "fixed-clock";
  47                         #clock-cells = <0>;
  48                         clock-frequency = <27000000>;
  49                 };
  50         };
  51
  52         rdb {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55
  56                 compatible = "simple-bus";
  57                 ranges = <0 0x10000000 0x01000000>;
  58
  59                 periph_intc: interrupt-controller@411400 {
  60                         compatible = "brcm,bcm7038-l1-intc";
  61                         reg = <0x411400 0x30>, <0x411600 0x30>;
  62
  63                         interrupt-controller;
  64                         #interrupt-cells = <1>;
  65
  66                         interrupt-parent = <&cpu_intc>;
  67                         interrupts = <2>, <3>;
  68                 };
  69
  70                 sun_l2_intc: interrupt-controller@403000 {
  71                         compatible = "brcm,l2-intc";
  72                         reg = <0x403000 0x30>;
  73                         interrupt-controller;
  74                         #interrupt-cells = <1>;
  75                         interrupt-parent = <&periph_intc>;
  76                         interrupts = <51>;
  77                 };
  78
  79                 gisb-arb@400000 {
  80                         compatible = "brcm,bcm7400-gisb-arb";
  81                         reg = <0x400000 0xdc>;
  82                         native-endian;
  83                         interrupt-parent = <&sun_l2_intc>;
  84                         interrupts = <0>, <2>;
  85                         brcm,gisb-arb-master-mask = <0x673>;
  86                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
  87                                                      "rdc_0", "raaga_0",
  88                                                      "jtag_0", "svd_0";
  89                 };
  90
  91                 upg_irq0_intc: interrupt-controller@406780 {
  92                         compatible = "brcm,bcm7120-l2-intc";
  93                         reg = <0x406780 0x8>;
  94
  95                         brcm,int-map-mask = <0x44>, <0xf000000>;
  96                         brcm,int-fwd-mask = <0x70000>;
  97
  98                         interrupt-controller;
  99                         #interrupt-cells = <1>;
 100
 101                         interrupt-parent = <&periph_intc>;
 102                         interrupts = <59>, <57>;
 103                         interrupt-names = "upg_main", "upg_bsc";
 104                 };
 105
 106                 upg_aon_irq0_intc: interrupt-controller@408b80 {
 107                         compatible = "brcm,bcm7120-l2-intc";
 108                         reg = <0x408b80 0x8>;
 109
 110                         brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
 111                         brcm,int-fwd-mask = <0>;
 112                         brcm,irq-can-wake;
 113
 114                         interrupt-controller;
 115                         #interrupt-cells = <1>;
 116
 117                         interrupt-parent = <&periph_intc>;
 118                         interrupts = <60>, <58>, <62>;
 119                         interrupt-names = "upg_main_aon", "upg_bsc_aon",
 120                                           "upg_spi";
 121                 };
 122
 123                 sun_top_ctrl: syscon@404000 {
 124                         compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
 125                         reg = <0x404000 0x51c>;
 126                         native-endian;
 127                 };
 128
 129                 reboot {
 130                         compatible = "brcm,brcmstb-reboot";
 131                         syscon = <&sun_top_ctrl 0x304 0x308>;
 132                 };
 133
 134                 uart0: serial@406900 {
 135                         compatible = "ns16550a";
 136                         reg = <0x406900 0x20>;
 137                         reg-io-width = <0x4>;
 138                         reg-shift = <0x2>;
 139                         native-endian;
 140                         interrupt-parent = <&periph_intc>;
 141                         interrupts = <64>;
 142                         clocks = <&uart_clk>;
 143                         status = "disabled";
 144                 };
 145
 146                 uart1: serial@406940 {
 147                         compatible = "ns16550a";
 148                         reg = <0x406940 0x20>;
 149                         reg-io-width = <0x4>;
 150                         reg-shift = <0x2>;
 151                         native-endian;
 152                         interrupt-parent = <&periph_intc>;
 153                         interrupts = <65>;
 154                         clocks = <&uart_clk>;
 155                         status = "disabled";
 156                 };
 157
 158                 uart2: serial@406980 {
 159                         compatible = "ns16550a";
 160                         reg = <0x406980 0x20>;
 161                         reg-io-width = <0x4>;
 162                         reg-shift = <0x2>;
 163                         native-endian;
 164                         interrupt-parent = <&periph_intc>;
 165                         interrupts = <66>;
 166                         clocks = <&uart_clk>;
 167                         status = "disabled";
 168                 };
 169
 170                 bsca: i2c@406200 {
 171                       clock-frequency = <390000>;
 172                       compatible = "brcm,brcmstb-i2c";
 173                       interrupt-parent = <&upg_irq0_intc>;
 174                       reg = <0x406200 0x58>;
 175                       interrupts = <24>;
 176                       interrupt-names = "upg_bsca";
 177                       status = "disabled";
 178                 };
 179
 180                 bscb: i2c@406280 {
 181                       clock-frequency = <390000>;
 182                       compatible = "brcm,brcmstb-i2c";
 183                       interrupt-parent = <&upg_irq0_intc>;
 184                       reg = <0x406280 0x58>;
 185                       interrupts = <25>;
 186                       interrupt-names = "upg_bscb";
 187                       status = "disabled";
 188                 };
 189
 190                 bscc: i2c@406300 {
 191                       clock-frequency = <390000>;
 192                       compatible = "brcm,brcmstb-i2c";
 193                       interrupt-parent = <&upg_irq0_intc>;
 194                       reg = <0x406300 0x58>;
 195                       interrupts = <26>;
 196                       interrupt-names = "upg_bscc";
 197                       status = "disabled";
 198                 };
 199
 200                 bscd: i2c@406380 {
 201                       clock-frequency = <390000>;
 202                       compatible = "brcm,brcmstb-i2c";
 203                       interrupt-parent = <&upg_irq0_intc>;
 204                       reg = <0x406380 0x58>;
 205                       interrupts = <27>;
 206                       interrupt-names = "upg_bscd";
 207                       status = "disabled";
 208                 };
 209
 210                 bsce: i2c@408980 {
 211                       clock-frequency = <390000>;
 212                       compatible = "brcm,brcmstb-i2c";
 213                       interrupt-parent = <&upg_aon_irq0_intc>;
 214                       reg = <0x408980 0x58>;
 215                       interrupts = <27>;
 216                       interrupt-names = "upg_bsce";
 217                       status = "disabled";
 218                 };
 219
 220                 pwma: pwm@406580 {
 221                         compatible = "brcm,bcm7038-pwm";
 222                         reg = <0x406580 0x28>;
 223                         #pwm-cells = <2>;
 224                         clocks = <&upg_clk>;
 225                         status = "disabled";
 226                 };
 227
 228                 pwmb: pwm@406800 {
 229                         compatible = "brcm,bcm7038-pwm";
 230                         reg = <0x406800 0x28>;
 231                         #pwm-cells = <2>;
 232                         clocks = <&upg_clk>;
 233                         status = "disabled";
 234                 };
 235
 236                 aon_pm_l2_intc: interrupt-controller@408440 {
 237                         compatible = "brcm,l2-intc";
 238                         reg = <0x408440 0x30>;
 239                         interrupt-controller;
 240                         #interrupt-cells = <1>;
 241                         interrupt-parent = <&periph_intc>;
 242                         interrupts = <53>;
 243                         brcm,irq-can-wake;
 244                 };
 245
 246                 upg_gio: gpio@406700 {
 247                         compatible = "brcm,brcmstb-gpio";
 248                         reg = <0x406700 0x60>;
 249                         #gpio-cells = <2>;
 250                         #interrupt-cells = <2>;
 251                         gpio-controller;
 252                         interrupt-controller;
 253                         interrupt-parent = <&upg_irq0_intc>;
 254                         interrupts = <6>;
 255                         brcm,gpio-bank-widths = <32 32 16>;
 256                 };
 257
 258                 upg_gio_aon: gpio@408c00 {
 259                         compatible = "brcm,brcmstb-gpio";
 260                         reg = <0x408c00 0x60>;
 261                         #gpio-cells = <2>;
 262                         #interrupt-cells = <2>;
 263                         gpio-controller;
 264                         interrupt-controller;
 265                         interrupt-parent = <&upg_aon_irq0_intc>;
 266                         interrupts = <6>;
 267                         interrupts-extended = <&upg_aon_irq0_intc 6>,
 268                                               <&aon_pm_l2_intc 5>;
 269                         wakeup-source;
 270                         brcm,gpio-bank-widths = <27 32 2>;
 271                 };
 272
 273                 enet0: ethernet@430000 {
 274                         phy-mode = "internal";
 275                         phy-handle = <&phy1>;
 276                         mac-address = [ 00 10 18 36 23 1a ];
 277                         compatible = "brcm,genet-v2";
 278                         #address-cells = <0x1>;
 279                         #size-cells = <0x1>;
 280                         reg = <0x430000 0x4c8c>;
 281                         interrupts = <24>, <25>;
 282                         interrupt-parent = <&periph_intc>;
 283                         status = "disabled";
 284
 285                         mdio@e14 {
 286                                 compatible = "brcm,genet-mdio-v2";
 287                                 #address-cells = <0x1>;
 288                                 #size-cells = <0x0>;
 289                                 reg = <0xe14 0x8>;
 290
 291                                 phy1: ethernet-phy@1 {
 292                                         max-speed = <100>;
 293                                         reg = <0x1>;
 294                                         compatible = "brcm,40nm-ephy",
 295                                                 "ethernet-phy-ieee802.3-c22";
 296                                 };
 297                         };
 298                 };
 299
 300                 ehci0: usb@480300 {
 301                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
 302                         reg = <0x480300 0x100>;
 303                         native-endian;
 304                         interrupt-parent = <&periph_intc>;
 305                         interrupts = <68>;
 306                         status = "disabled";
 307                 };
 308
 309                 ohci0: usb@480400 {
 310                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
 311                         reg = <0x480400 0x100>;
 312                         native-endian;
 313                         no-big-frame-no;
 314                         interrupt-parent = <&periph_intc>;
 315                         interrupts = <70>;
 316                         status = "disabled";
 317                 };
 318
 319                 ehci1: usb@480500 {
 320                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
 321                         reg = <0x480500 0x100>;
 322                         native-endian;
 323                         interrupt-parent = <&periph_intc>;
 324                         interrupts = <69>;
 325                         status = "disabled";
 326                 };
 327
 328                 ohci1: usb@480600 {
 329                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
 330                         reg = <0x480600 0x100>;
 331                         native-endian;
 332                         no-big-frame-no;
 333                         interrupt-parent = <&periph_intc>;
 334                         interrupts = <71>;
 335                         status = "disabled";
 336                 };
 337
 338                 ehci2: usb@490300 {
 339                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
 340                         reg = <0x490300 0x100>;
 341                         native-endian;
 342                         interrupt-parent = <&periph_intc>;
 343                         interrupts = <73>;
 344                         status = "disabled";
 345                 };
 346
 347                 ohci2: usb@490400 {
 348                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
 349                         reg = <0x490400 0x100>;
 350                         native-endian;
 351                         no-big-frame-no;
 352                         interrupt-parent = <&periph_intc>;
 353                         interrupts = <75>;
 354                         status = "disabled";
 355                 };
 356
 357                 ehci3: usb@490500 {
 358                         compatible = "brcm,bcm7346-ehci", "generic-ehci";
 359                         reg = <0x490500 0x100>;
 360                         native-endian;
 361                         interrupt-parent = <&periph_intc>;
 362                         interrupts = <74>;
 363                         status = "disabled";
 364                 };
 365
 366                 ohci3: usb@490600 {
 367                         compatible = "brcm,bcm7346-ohci", "generic-ohci";
 368                         reg = <0x490600 0x100>;
 369                         native-endian;
 370                         no-big-frame-no;
 371                         interrupt-parent = <&periph_intc>;
 372                         interrupts = <76>;
 373                         status = "disabled";
 374                 };
 375
 376                 hif_l2_intc: interrupt-controller@411000 {
 377                         compatible = "brcm,l2-intc";
 378                         reg = <0x411000 0x30>;
 379                         interrupt-controller;
 380                         #interrupt-cells = <1>;
 381                         interrupt-parent = <&periph_intc>;
 382                         interrupts = <30>;
 383                 };
 384
 385                 nand: nand@412800 {
 386                         compatible = "brcm,brcmnand-v5.0", "brcm,brcmnand";
 387                         #address-cells = <1>;
 388                         #size-cells = <0>;
 389                         reg-names = "nand";
 390                         reg = <0x412800 0x400>;
 391                         interrupt-parent = <&hif_l2_intc>;
 392                         interrupts = <24>;
 393                         status = "disabled";
 394                 };
 395
 396                 sata: sata@181000 {
 397                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
 398                         reg-names = "ahci", "top-ctrl";
 399                         reg = <0x181000 0xa9c>, <0x180020 0x1c>;
 400                         interrupt-parent = <&periph_intc>;
 401                         interrupts = <40>;
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         status = "disabled";
 405
 406                         sata0: sata-port@0 {
 407                                 reg = <0>;
 408                                 phys = <&sata_phy0>;
 409                         };
 410
 411                         sata1: sata-port@1 {
 412                                 reg = <1>;
 413                                 phys = <&sata_phy1>;
 414                         };
 415                 };
 416
 417                 sata_phy: sata-phy@180100 {
 418                         compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
 419                         reg = <0x180100 0x0eff>;
 420                         reg-names = "phy";
 421                         #address-cells = <1>;
 422                         #size-cells = <0>;
 423                         status = "disabled";
 424
 425                         sata_phy0: sata-phy@0 {
 426                                 reg = <0>;
 427                                 #phy-cells = <0>;
 428                         };
 429
 430                         sata_phy1: sata-phy@1 {
 431                                 reg = <1>;
 432                                 #phy-cells = <0>;
 433                         };
 434                 };
 435
 436                 sdhci0: sdhci@413500 {
 437                         compatible = "brcm,bcm7425-sdhci";
 438                         reg = <0x413500 0x100>;
 439                         interrupt-parent = <&periph_intc>;
 440                         interrupts = <85>;
 441                         status = "disabled";
 442                 };
 443
 444                 spi_l2_intc: interrupt-controller@411d00 {
 445                         compatible = "brcm,l2-intc";
 446                         reg = <0x411d00 0x30>;
 447                         interrupt-controller;
 448                         #interrupt-cells = <1>;
 449                         interrupt-parent = <&periph_intc>;
 450                         interrupts = <31>;
 451                 };
 452
 453                 qspi: spi@413000 {
 454                         #address-cells = <0x1>;
 455                         #size-cells = <0x0>;
 456                         compatible = "brcm,spi-bcm-qspi",
 457                                      "brcm,spi-brcmstb-qspi";
 458                         clocks = <&upg_clk>;
 459                         reg = <0x410920 0x4 0x413200 0x188 0x413000 0x50>;
 460                         reg-names = "cs_reg", "hif_mspi", "bspi";
 461                         interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
 462                         interrupt-parent = <&spi_l2_intc>;
 463                         interrupt-names = "spi_lr_fullness_reached",
 464                                           "spi_lr_session_aborted",
 465                                           "spi_lr_impatient",
 466                                           "spi_lr_session_done",
 467                                           "spi_lr_overread",
 468                                           "mspi_done",
 469                                           "mspi_halted";
 470                         status = "disabled";
 471                 };
 472
 473                 mspi: spi@408a00 {
 474                         #address-cells = <1>;
 475                         #size-cells = <0>;
 476                         compatible = "brcm,spi-bcm-qspi",
 477                                      "brcm,spi-brcmstb-mspi";
 478                         clocks = <&upg_clk>;
 479                         reg = <0x408a00 0x180>;
 480                         reg-names = "mspi";
 481                         interrupts = <0x14>;
 482                         interrupt-parent = <&upg_aon_irq0_intc>;
 483                         interrupt-names = "mspi_done";
 484                         status = "disabled";
 485                 };
 486         };
 487 };