arch/mips/boot/dts/brcm/bcm7435.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 / {
   3         #address-cells = <1>;
   4         #size-cells = <1>;
   5         compatible = "brcm,bcm7435";
   6
   7         cpus {
   8                 #address-cells = <1>;
   9                 #size-cells = <0>;
  10
  11                 mips-hpt-frequency = <175625000>;
  12
  13                 cpu@0 {
  14                         compatible = "brcm,bmips5200";
  15                         device_type = "cpu";
  16                         reg = <0>;
  17                 };
  18
  19                 cpu@1 {
  20                         compatible = "brcm,bmips5200";
  21                         device_type = "cpu";
  22                         reg = <1>;
  23                 };
  24
  25                 cpu@2 {
  26                         compatible = "brcm,bmips5200";
  27                         device_type = "cpu";
  28                         reg = <2>;
  29                 };
  30
  31                 cpu@3 {
  32                         compatible = "brcm,bmips5200";
  33                         device_type = "cpu";
  34                         reg = <3>;
  35                 };
  36         };
  37
  38         aliases {
  39                 uart0 = &uart0;
  40         };
  41
  42         cpu_intc: interrupt-controller {
  43                 #address-cells = <0>;
  44                 compatible = "mti,cpu-interrupt-controller";
  45
  46                 interrupt-controller;
  47                 #interrupt-cells = <1>;
  48         };
  49
  50         clocks {
  51                 uart_clk: uart_clk {
  52                         compatible = "fixed-clock";
  53                         #clock-cells = <0>;
  54                         clock-frequency = <81000000>;
  55                 };
  56
  57                 upg_clk: upg_clk {
  58                         compatible = "fixed-clock";
  59                         #clock-cells = <0>;
  60                         clock-frequency = <27000000>;
  61                 };
  62         };
  63
  64         rdb {
  65                 #address-cells = <1>;
  66                 #size-cells = <1>;
  67
  68                 compatible = "simple-bus";
  69                 ranges = <0 0x10000000 0x01000000>;
  70
  71                 periph_intc: interrupt-controller@41b500 {
  72                         compatible = "brcm,bcm7038-l1-intc";
  73                         reg = <0x41b500 0x40>, <0x41b600 0x40>,
  74                                 <0x41b700 0x40>, <0x41b800 0x40>;
  75
  76                         interrupt-controller;
  77                         #interrupt-cells = <1>;
  78
  79                         interrupt-parent = <&cpu_intc>;
  80                         interrupts = <2>, <3>, <2>, <3>;
  81                 };
  82
  83                 sun_l2_intc: interrupt-controller@403000 {
  84                         compatible = "brcm,l2-intc";
  85                         reg = <0x403000 0x30>;
  86                         interrupt-controller;
  87                         #interrupt-cells = <1>;
  88                         interrupt-parent = <&periph_intc>;
  89                         interrupts = <52>;
  90                 };
  91
  92                 gisb-arb@400000 {
  93                         compatible = "brcm,bcm7435-gisb-arb";
  94                         reg = <0x400000 0xdc>;
  95                         native-endian;
  96                         interrupt-parent = <&sun_l2_intc>;
  97                         interrupts = <0>, <2>;
  98                         brcm,gisb-arb-master-mask = <0xf77f>;
  99                         brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "webcpu_0",
 100                                                      "pcie_0", "bsp_0",
 101                                                      "rdc_0", "raaga_0",
 102                                                      "avd_1", "jtag_0",
 103                                                      "svd_0", "vice_0",
 104                                                      "vice_1", "raaga_1",
 105                                                      "scpu";
 106                 };
 107
 108                 upg_irq0_intc: interrupt-controller@406780 {
 109                         compatible = "brcm,bcm7120-l2-intc";
 110                         reg = <0x406780 0x8>;
 111
 112                         brcm,int-map-mask = <0x44>, <0x7000000>;
 113                         brcm,int-fwd-mask = <0x70000>;
 114
 115                         interrupt-controller;
 116                         #interrupt-cells = <1>;
 117
 118                         interrupt-parent = <&periph_intc>;
 119                         interrupts = <60>, <58>;
 120                         interrupt-names = "upg_main", "upg_bsc";
 121                 };
 122
 123                 upg_aon_irq0_intc: interrupt-controller@409480 {
 124                         compatible = "brcm,bcm7120-l2-intc";
 125                         reg = <0x409480 0x8>;
 126
 127                         brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
 128                         brcm,int-fwd-mask = <0>;
 129                         brcm,irq-can-wake;
 130
 131                         interrupt-controller;
 132                         #interrupt-cells = <1>;
 133
 134                         interrupt-parent = <&periph_intc>;
 135                         interrupts = <61>, <59>, <64>;
 136                         interrupt-names = "upg_main_aon", "upg_bsc_aon",
 137                                           "upg_spi";
 138                 };
 139
 140                 sun_top_ctrl: syscon@404000 {
 141                         compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
 142                         reg = <0x404000 0x51c>;
 143                         native-endian;
 144                 };
 145
 146                 reboot {
 147                         compatible = "brcm,brcmstb-reboot";
 148                         syscon = <&sun_top_ctrl 0x304 0x308>;
 149                 };
 150
 151                 uart0: serial@406b00 {
 152                         compatible = "ns16550a";
 153                         reg = <0x406b00 0x20>;
 154                         reg-io-width = <0x4>;
 155                         reg-shift = <0x2>;
 156                         interrupt-parent = <&periph_intc>;
 157                         interrupts = <66>;
 158                         clocks = <&uart_clk>;
 159                         status = "disabled";
 160                 };
 161
 162                 uart1: serial@406b40 {
 163                         compatible = "ns16550a";
 164                         reg = <0x406b40 0x20>;
 165                         reg-io-width = <0x4>;
 166                         reg-shift = <0x2>;
 167                         interrupt-parent = <&periph_intc>;
 168                         interrupts = <67>;
 169                         clocks = <&uart_clk>;
 170                         status = "disabled";
 171                 };
 172
 173                 uart2: serial@406b80 {
 174                         compatible = "ns16550a";
 175                         reg = <0x406b80 0x20>;
 176                         reg-io-width = <0x4>;
 177                         reg-shift = <0x2>;
 178                         interrupt-parent = <&periph_intc>;
 179                         interrupts = <68>;
 180                         clocks = <&uart_clk>;
 181                         status = "disabled";
 182                 };
 183
 184                 bsca: i2c@406300 {
 185                       clock-frequency = <390000>;
 186                       compatible = "brcm,brcmstb-i2c";
 187                       interrupt-parent = <&upg_irq0_intc>;
 188                       reg = <0x406300 0x58>;
 189                       interrupts = <26>;
 190                       interrupt-names = "upg_bsca";
 191                       status = "disabled";
 192                 };
 193
 194                 bscb: i2c@409400 {
 195                       clock-frequency = <390000>;
 196                       compatible = "brcm,brcmstb-i2c";
 197                       interrupt-parent = <&upg_aon_irq0_intc>;
 198                       reg = <0x409400 0x58>;
 199                       interrupts = <28>;
 200                       interrupt-names = "upg_bscb";
 201                       status = "disabled";
 202                 };
 203
 204                 bscc: i2c@406200 {
 205                       clock-frequency = <390000>;
 206                       compatible = "brcm,brcmstb-i2c";
 207                       interrupt-parent = <&upg_irq0_intc>;
 208                       reg = <0x406200 0x58>;
 209                       interrupts = <24>;
 210                       interrupt-names = "upg_bscc";
 211                       status = "disabled";
 212                 };
 213
 214                 bscd: i2c@406280 {
 215                       clock-frequency = <390000>;
 216                       compatible = "brcm,brcmstb-i2c";
 217                       interrupt-parent = <&upg_irq0_intc>;
 218                       reg = <0x406280 0x58>;
 219                       interrupts = <25>;
 220                       interrupt-names = "upg_bscd";
 221                       status = "disabled";
 222                 };
 223
 224                 bsce: i2c@409180 {
 225                       clock-frequency = <390000>;
 226                       compatible = "brcm,brcmstb-i2c";
 227                       interrupt-parent = <&upg_aon_irq0_intc>;
 228                       reg = <0x409180 0x58>;
 229                       interrupts = <27>;
 230                       interrupt-names = "upg_bsce";
 231                       status = "disabled";
 232                 };
 233
 234                 pwma: pwm@406580 {
 235                         compatible = "brcm,bcm7038-pwm";
 236                         reg = <0x406580 0x28>;
 237                         #pwm-cells = <2>;
 238                         clocks = <&upg_clk>;
 239                         status = "disabled";
 240                 };
 241
 242                 pwmb: pwm@406800 {
 243                         compatible = "brcm,bcm7038-pwm";
 244                         reg = <0x406800 0x28>;
 245                         #pwm-cells = <2>;
 246                         clocks = <&upg_clk>;
 247                         status = "disabled";
 248                 };
 249
 250                 watchdog: watchdog@4067e8 {
 251                         clocks = <&upg_clk>;
 252                         compatible = "brcm,bcm7038-wdt";
 253                         reg = <0x4067e8 0x14>;
 254                         status = "disabled";
 255                 };
 256
 257                 aon_pm_l2_intc: interrupt-controller@408440 {
 258                         compatible = "brcm,l2-intc";
 259                         reg = <0x408440 0x30>;
 260                         interrupt-controller;
 261                         #interrupt-cells = <1>;
 262                         interrupt-parent = <&periph_intc>;
 263                         interrupts = <54>;
 264                         brcm,irq-can-wake;
 265                 };
 266
 267                 aon_ctrl: syscon@408000 {
 268                         compatible = "brcm,brcmstb-aon-ctrl";
 269                         reg = <0x408000 0x100>, <0x408200 0x200>;
 270                         reg-names = "aon-ctrl", "aon-sram";
 271                 };
 272
 273                 timers: timer@4067c0 {
 274                         compatible = "brcm,brcmstb-timers";
 275                         reg = <0x4067c0 0x40>;
 276                 };
 277
 278                 upg_gio: gpio@406700 {
 279                         compatible = "brcm,brcmstb-gpio";
 280                         reg = <0x406700 0x80>;
 281                         #gpio-cells = <2>;
 282                         #interrupt-cells = <2>;
 283                         gpio-controller;
 284                         interrupt-controller;
 285                         interrupt-parent = <&upg_irq0_intc>;
 286                         interrupts = <6>;
 287                         brcm,gpio-bank-widths = <32 32 32 21>;
 288                 };
 289
 290                 upg_gio_aon: gpio@4094c0 {
 291                         compatible = "brcm,brcmstb-gpio";
 292                         reg = <0x4094c0 0x40>;
 293                         #gpio-cells = <2>;
 294                         #interrupt-cells = <2>;
 295                         gpio-controller;
 296                         interrupt-controller;
 297                         interrupt-parent = <&upg_aon_irq0_intc>;
 298                         interrupts = <6>;
 299                         interrupts-extended = <&upg_aon_irq0_intc 6>,
 300                                               <&aon_pm_l2_intc 5>;
 301                         wakeup-source;
 302                         brcm,gpio-bank-widths = <18 4>;
 303                 };
 304
 305                 enet0: ethernet@b80000 {
 306                         phy-mode = "internal";
 307                         phy-handle = <&phy1>;
 308                         mac-address = [ 00 10 18 36 23 1a ];
 309                         compatible = "brcm,genet-v3";
 310                         #address-cells = <0x1>;
 311                         #size-cells = <0x1>;
 312                         reg = <0xb80000 0x11c88>;
 313                         interrupts = <17>, <18>;
 314                         interrupt-parent = <&periph_intc>;
 315                         status = "disabled";
 316
 317                         mdio@e14 {
 318                                 compatible = "brcm,genet-mdio-v3";
 319                                 #address-cells = <0x1>;
 320                                 #size-cells = <0x0>;
 321                                 reg = <0xe14 0x8>;
 322
 323                                 phy1: ethernet-phy@1 {
 324                                         max-speed = <100>;
 325                                         reg = <0x1>;
 326                                         compatible = "brcm,40nm-ephy",
 327                                                 "ethernet-phy-ieee802.3-c22";
 328                                 };
 329                         };
 330                 };
 331
 332                 ehci0: usb@480300 {
 333                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 334                         reg = <0x480300 0x100>;
 335                         native-endian;
 336                         interrupt-parent = <&periph_intc>;
 337                         interrupts = <70>;
 338                         status = "disabled";
 339                 };
 340
 341                 ohci0: usb@480400 {
 342                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 343                         reg = <0x480400 0x100>;
 344                         native-endian;
 345                         no-big-frame-no;
 346                         interrupt-parent = <&periph_intc>;
 347                         interrupts = <72>;
 348                         status = "disabled";
 349                 };
 350
 351                 ehci1: usb@480500 {
 352                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 353                         reg = <0x480500 0x100>;
 354                         native-endian;
 355                         interrupt-parent = <&periph_intc>;
 356                         interrupts = <71>;
 357                         status = "disabled";
 358                 };
 359
 360                 ohci1: usb@480600 {
 361                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 362                         reg = <0x480600 0x100>;
 363                         native-endian;
 364                         no-big-frame-no;
 365                         interrupt-parent = <&periph_intc>;
 366                         interrupts = <73>;
 367                         status = "disabled";
 368                 };
 369
 370                 ehci2: usb@490300 {
 371                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 372                         reg = <0x490300 0x100>;
 373                         native-endian;
 374                         interrupt-parent = <&periph_intc>;
 375                         interrupts = <75>;
 376                         status = "disabled";
 377                 };
 378
 379                 ohci2: usb@490400 {
 380                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 381                         reg = <0x490400 0x100>;
 382                         native-endian;
 383                         no-big-frame-no;
 384                         interrupt-parent = <&periph_intc>;
 385                         interrupts = <77>;
 386                         status = "disabled";
 387                 };
 388
 389                 ehci3: usb@490500 {
 390                         compatible = "brcm,bcm7435-ehci", "generic-ehci";
 391                         reg = <0x490500 0x100>;
 392                         native-endian;
 393                         interrupt-parent = <&periph_intc>;
 394                         interrupts = <76>;
 395                         status = "disabled";
 396                 };
 397
 398                 ohci3: usb@490600 {
 399                         compatible = "brcm,bcm7435-ohci", "generic-ohci";
 400                         reg = <0x490600 0x100>;
 401                         native-endian;
 402                         no-big-frame-no;
 403                         interrupt-parent = <&periph_intc>;
 404                         interrupts = <78>;
 405                         status = "disabled";
 406                 };
 407
 408                 hif_l2_intc: interrupt-controller@41b000 {
 409                         compatible = "brcm,l2-intc";
 410                         reg = <0x41b000 0x30>;
 411                         interrupt-controller;
 412                         #interrupt-cells = <1>;
 413                         interrupt-parent = <&periph_intc>;
 414                         interrupts = <24>;
 415                 };
 416
 417                 nand: nand@41c800 {
 418                         compatible = "brcm,brcmnand-v6.2", "brcm,brcmnand";
 419                         #address-cells = <1>;
 420                         #size-cells = <0>;
 421                         reg-names = "nand", "flash-dma";
 422                         reg = <0x41c800 0x600>, <0x41d000 0x100>;
 423                         interrupt-parent = <&hif_l2_intc>;
 424                         interrupts = <24>, <4>;
 425                         status = "disabled";
 426                 };
 427
 428                 sata: sata@181000 {
 429                         compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
 430                         reg-names = "ahci", "top-ctrl";
 431                         reg = <0x181000 0xa9c>, <0x180020 0x1c>;
 432                         interrupt-parent = <&periph_intc>;
 433                         interrupts = <45>;
 434                         #address-cells = <1>;
 435                         #size-cells = <0>;
 436                         status = "disabled";
 437
 438                         sata0: sata-port@0 {
 439                                 reg = <0>;
 440                                 phys = <&sata_phy0>;
 441                         };
 442
 443                         sata1: sata-port@1 {
 444                                 reg = <1>;
 445                                 phys = <&sata_phy1>;
 446                         };
 447                 };
 448
 449                 sata_phy: sata-phy@180100 {
 450                         compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
 451                         reg = <0x180100 0x0eff>;
 452                         reg-names = "phy";
 453                         #address-cells = <1>;
 454                         #size-cells = <0>;
 455                         status = "disabled";
 456
 457                         sata_phy0: sata-phy@0 {
 458                                 reg = <0>;
 459                                 #phy-cells = <0>;
 460                         };
 461
 462                         sata_phy1: sata-phy@1 {
 463                                 reg = <1>;
 464                                 #phy-cells = <0>;
 465                         };
 466                 };
 467
 468                 sdhci0: sdhci@41a000 {
 469                         compatible = "brcm,bcm7425-sdhci";
 470                         reg = <0x41a000 0x100>;
 471                         interrupt-parent = <&periph_intc>;
 472                         interrupts = <47>;
 473                         sd-uhs-sdr50;
 474                         mmc-hs200-1_8v;
 475                         status = "disabled";
 476                 };
 477
 478                 sdhci1: sdhci@41a200 {
 479                         compatible = "brcm,bcm7425-sdhci";
 480                         reg = <0x41a200 0x100>;
 481                         interrupt-parent = <&periph_intc>;
 482                         interrupts = <48>;
 483                         sd-uhs-sdr50;
 484                         mmc-hs200-1_8v;
 485                         status = "disabled";
 486                 };
 487
 488                 spi_l2_intc: interrupt-controller@41bd00 {
 489                         compatible = "brcm,l2-intc";
 490                         reg = <0x41bd00 0x30>;
 491                         interrupt-controller;
 492                         #interrupt-cells = <1>;
 493                         interrupt-parent = <&periph_intc>;
 494                         interrupts = <25>;
 495                 };
 496
 497                 qspi: spi@41d200 {
 498                         #address-cells = <0x1>;
 499                         #size-cells = <0x0>;
 500                         compatible = "brcm,spi-bcm-qspi",
 501                                      "brcm,spi-brcmstb-qspi";
 502                         clocks = <&upg_clk>;
 503                         reg = <0x41a920 0x4 0x41d400 0x188 0x41d200 0x50>;
 504                         reg-names = "cs_reg", "hif_mspi", "bspi";
 505                         interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
 506                         interrupt-parent = <&spi_l2_intc>;
 507                         interrupt-names = "spi_lr_fullness_reached",
 508                                           "spi_lr_session_aborted",
 509                                           "spi_lr_impatient",
 510                                           "spi_lr_session_done",
 511                                           "spi_lr_overread",
 512                                           "mspi_done",
 513                                           "mspi_halted";
 514                         status = "disabled";
 515                 };
 516
 517                 mspi: spi@409200 {
 518                         #address-cells = <1>;
 519                         #size-cells = <0>;
 520                         compatible = "brcm,spi-bcm-qspi",
 521                                      "brcm,spi-brcmstb-mspi";
 522                         clocks = <&upg_clk>;
 523                         reg = <0x409200 0x180>;
 524                         reg-names = "mspi";
 525                         interrupts = <0x14>;
 526                         interrupt-parent = <&upg_aon_irq0_intc>;
 527                         interrupt-names = "mspi_done";
 528                         status = "disabled";
 529                 };
 530
 531                 waketimer: waketimer@409580 {
 532                         compatible = "brcm,brcmstb-waketimer";
 533                         reg = <0x409580 0x14>;
 534                         interrupts = <0x3>;
 535                         interrupt-parent = <&aon_pm_l2_intc>;
 536                         interrupt-names = "timer";
 537                         clocks = <&upg_clk>;
 538                         status = "disabled";
 539                 };
 540         };
 541
 542         memory_controllers {
 543                 compatible = "simple-bus";
 544                 ranges = <0x0 0x103b0000 0x1a000>;
 545                 #address-cells = <1>;
 546                 #size-cells = <1>;
 547
 548                 memory-controller@0 {
 549                         compatible = "brcm,brcmstb-memc", "simple-bus";
 550                         ranges = <0x0 0x0 0xa000>;
 551                         #address-cells = <1>;
 552                         #size-cells = <1>;
 553
 554                         memc-arb@1000 {
 555                                 compatible = "brcm,brcmstb-memc-arb";
 556                                 reg = <0x1000 0x248>;
 557                         };
 558
 559                         memc-ddr@2000 {
 560                                 compatible = "brcm,brcmstb-memc-ddr";
 561                                 reg = <0x2000 0x300>;
 562                         };
 563
 564                         ddr-phy@6000 {
 565                                 compatible = "brcm,brcmstb-ddr-phy";
 566                                 reg = <0x6000 0xc8>;
 567                         };
 568
 569                         shimphy@8000 {
 570                                 compatible = "brcm,brcmstb-ddr-shimphy";
 571                                 reg = <0x8000 0x13c>;
 572                         };
 573                 };
 574
 575                 memory-controller@1 {
 576                         compatible = "brcm,brcmstb-memc", "simple-bus";
 577                         ranges = <0x0 0x10000 0xa000>;
 578                         #address-cells = <1>;
 579                         #size-cells = <1>;
 580
 581                         memc-arb@1000 {
 582                                 compatible = "brcm,brcmstb-memc-arb";
 583                                 reg = <0x1000 0x248>;
 584                         };
 585
 586                         memc-ddr@2000 {
 587                                 compatible = "brcm,brcmstb-memc-ddr";
 588                                 reg = <0x2000 0x300>;
 589                         };
 590
 591                         ddr-phy@6000 {
 592                                 compatible = "brcm,brcmstb-ddr-phy";
 593                                 reg = <0x6000 0xc8>;
 594                         };
 595
 596                         shimphy@8000 {
 597                                 compatible = "brcm,brcmstb-ddr-shimphy";
 598                                 reg = <0x8000 0x13c>;
 599                         };
 600                 };
 601         };
 602 };