arch/mips/boot/dts/qca/ar9132.dtsi

   1 #include <dt-bindings/clock/ath79-clk.h>
   2
   3 / {
   4         compatible = "qca,ar9132";
   5
   6         #address-cells = <1>;
   7         #size-cells = <1>;
   8
   9         cpus {
  10                 #address-cells = <1>;
  11                 #size-cells = <0>;
  12
  13                 cpu@0 {
  14                         device_type = "cpu";
  15                         compatible = "mips,mips24Kc";
  16                         clocks = <&pll ATH79_CLK_CPU>;
  17                         reg = <0>;
  18                 };
  19         };
  20
  21         cpuintc: interrupt-controller {
  22                 compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
  23
  24                 interrupt-controller;
  25                 #interrupt-cells = <1>;
  26
  27                 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
  28                 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
  29                                         <&ddr_ctrl 0>, <&ddr_ctrl 1>;
  30         };
  31
  32         ahb {
  33                 compatible = "simple-bus";
  34                 ranges;
  35
  36                 #address-cells = <1>;
  37                 #size-cells = <1>;
  38
  39                 interrupt-parent = <&cpuintc>;
  40
  41                 apb {
  42                         compatible = "simple-bus";
  43                         ranges;
  44
  45                         #address-cells = <1>;
  46                         #size-cells = <1>;
  47
  48                         interrupt-parent = <&miscintc>;
  49
  50                         ddr_ctrl: memory-controller@18000000 {
  51                                 compatible = "qca,ar9132-ddr-controller",
  52                                                 "qca,ar7240-ddr-controller";
  53                                 reg = <0x18000000 0x100>;
  54
  55                                 #qca,ddr-wb-channel-cells = <1>;
  56                         };
  57
  58                         uart: uart@18020000 {
  59                                 compatible = "ns8250";
  60                                 reg = <0x18020000 0x20>;
  61                                 interrupts = <3>;
  62
  63                                 clocks = <&pll ATH79_CLK_AHB>;
  64                                 clock-names = "uart";
  65
  66                                 reg-io-width = <4>;
  67                                 reg-shift = <2>;
  68                                 no-loopback-test;
  69
  70                                 status = "disabled";
  71                         };
  72
  73                         gpio: gpio@18040000 {
  74                                 compatible = "qca,ar9132-gpio",
  75                                                 "qca,ar7100-gpio";
  76                                 reg = <0x18040000 0x30>;
  77                                 interrupts = <2>;
  78
  79                                 ngpios = <22>;
  80
  81                                 gpio-controller;
  82                                 #gpio-cells = <2>;
  83
  84                                 interrupt-controller;
  85                                 #interrupt-cells = <2>;
  86                         };
  87
  88                         pll: pll-controller@18050000 {
  89                                 compatible = "qca,ar9132-pll",
  90                                                 "qca,ar9130-pll";
  91                                 reg = <0x18050000 0x20>;
  92
  93                                 clock-names = "ref";
  94                                 /* The board must provides the ref clock */
  95
  96                                 #clock-cells = <1>;
  97                                 clock-output-names = "cpu", "ddr", "ahb";
  98                         };
  99
 100                         wdt: wdt@18060008 {
 101                                 compatible = "qca,ar7130-wdt";
 102                                 reg = <0x18060008 0x8>;
 103
 104                                 interrupts = <4>;
 105
 106                                 clocks = <&pll ATH79_CLK_AHB>;
 107                                 clock-names = "wdt";
 108                         };
 109
 110                         miscintc: interrupt-controller@18060010 {
 111                                 compatible = "qca,ar9132-misc-intc",
 112                                            "qca,ar7100-misc-intc";
 113                                 reg = <0x18060010 0x8>;
 114
 115                                 interrupt-parent = <&cpuintc>;
 116                                 interrupts = <6>;
 117
 118                                 interrupt-controller;
 119                                 #interrupt-cells = <1>;
 120                         };
 121
 122                         rst: reset-controller@1806001c {
 123                                 compatible = "qca,ar9132-reset",
 124                                                 "qca,ar7100-reset";
 125                                 reg = <0x1806001c 0x4>;
 126
 127                                 #reset-cells = <1>;
 128                         };
 129                 };
 130
 131                 usb: usb@1b000100 {
 132                         compatible = "qca,ar7100-ehci", "generic-ehci";
 133                         reg = <0x1b000100 0x100>;
 134
 135                         interrupts = <3>;
 136                         resets = <&rst 5>;
 137
 138                         has-transaction-translator;
 139
 140                         phy-names = "usb";
 141                         phys = <&usb_phy>;
 142
 143                         status = "disabled";
 144                 };
 145
 146                 spi: spi@1f000000 {
 147                         compatible = "qca,ar9132-spi", "qca,ar7100-spi";
 148                         reg = <0x1f000000 0x10>;
 149
 150                         clocks = <&pll ATH79_CLK_AHB>;
 151                         clock-names = "ahb";
 152
 153                         status = "disabled";
 154
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157                 };
 158         };
 159
 160         usb_phy: usb-phy {
 161                 compatible = "qca,ar7100-usb-phy";
 162
 163                 reset-names = "usb-phy", "usb-suspend-override";
 164                 resets = <&rst 4>, <&rst 3>;
 165
 166                 #phy-cells = <0>;
 167
 168                 status = "disabled";
 169         };
 170 };