arch/mips/include/asm/octeon/cvmx-stxx-defs.h

   1 /***********************license start***************
   2  * Author: Cavium Networks
   3  *
   4  * Contact: support@caviumnetworks.com
   5  * This file is part of the OCTEON SDK
   6  *
   7  * Copyright (C) 2003-2018 Cavium, Inc.
   8  *
   9  * This file is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License, Version 2, as
  11  * published by the Free Software Foundation.
  12  *
  13  * This file is distributed in the hope that it will be useful, but
  14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16  * NONINFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this file; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  22  * or visit http://www.gnu.org/licenses/.
  23  *
  24  * This file may also be available under a different license from Cavium.
  25  * Contact Cavium Networks for more information
  26  ***********************license end**************************************/
  27
  28 #ifndef __CVMX_STXX_DEFS_H__
  29 #define __CVMX_STXX_DEFS_H__
  30
  31 #define CVMX_STXX_ARB_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000608ull) + ((block_id) & 1) * 0x8000000ull)
  32 #define CVMX_STXX_BCKPRS_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000688ull) + ((block_id) & 1) * 0x8000000ull)
  33 #define CVMX_STXX_COM_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000600ull) + ((block_id) & 1) * 0x8000000ull)
  34 #define CVMX_STXX_DIP_CNT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000690ull) + ((block_id) & 1) * 0x8000000ull)
  35 #define CVMX_STXX_IGN_CAL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000610ull) + ((block_id) & 1) * 0x8000000ull)
  36 #define CVMX_STXX_INT_MSK(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A0ull) + ((block_id) & 1) * 0x8000000ull)
  37 #define CVMX_STXX_INT_REG(block_id) (CVMX_ADD_IO_SEG(0x0001180090000698ull) + ((block_id) & 1) * 0x8000000ull)
  38 #define CVMX_STXX_INT_SYNC(block_id) (CVMX_ADD_IO_SEG(0x00011800900006A8ull) + ((block_id) & 1) * 0x8000000ull)
  39 #define CVMX_STXX_MIN_BST(block_id) (CVMX_ADD_IO_SEG(0x0001180090000618ull) + ((block_id) & 1) * 0x8000000ull)
  40 #define CVMX_STXX_SPI4_CALX(offset, block_id) (CVMX_ADD_IO_SEG(0x0001180090000400ull) + (((offset) & 31) + ((block_id) & 1) * 0x1000000ull) * 8)
  41 #define CVMX_STXX_SPI4_DAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000628ull) + ((block_id) & 1) * 0x8000000ull)
  42 #define CVMX_STXX_SPI4_STAT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000630ull) + ((block_id) & 1) * 0x8000000ull)
  43 #define CVMX_STXX_STAT_BYTES_HI(block_id) (CVMX_ADD_IO_SEG(0x0001180090000648ull) + ((block_id) & 1) * 0x8000000ull)
  44 #define CVMX_STXX_STAT_BYTES_LO(block_id) (CVMX_ADD_IO_SEG(0x0001180090000680ull) + ((block_id) & 1) * 0x8000000ull)
  45 #define CVMX_STXX_STAT_CTL(block_id) (CVMX_ADD_IO_SEG(0x0001180090000638ull) + ((block_id) & 1) * 0x8000000ull)
  46 #define CVMX_STXX_STAT_PKT_XMT(block_id) (CVMX_ADD_IO_SEG(0x0001180090000640ull) + ((block_id) & 1) * 0x8000000ull)
  47
  48 void __cvmx_interrupt_stxx_int_msk_enable(int index);
  49
  50 union cvmx_stxx_arb_ctl {
  51         uint64_t u64;
  52         struct cvmx_stxx_arb_ctl_s {
  53 #ifdef __BIG_ENDIAN_BITFIELD
  54                 uint64_t reserved_6_63:58;
  55                 uint64_t mintrn:1;
  56                 uint64_t reserved_4_4:1;
  57                 uint64_t igntpa:1;
  58                 uint64_t reserved_0_2:3;
  59 #else
  60                 uint64_t reserved_0_2:3;
  61                 uint64_t igntpa:1;
  62                 uint64_t reserved_4_4:1;
  63                 uint64_t mintrn:1;
  64                 uint64_t reserved_6_63:58;
  65 #endif
  66         } s;
  67         struct cvmx_stxx_arb_ctl_s cn38xx;
  68         struct cvmx_stxx_arb_ctl_s cn38xxp2;
  69         struct cvmx_stxx_arb_ctl_s cn58xx;
  70         struct cvmx_stxx_arb_ctl_s cn58xxp1;
  71 };
  72
  73 union cvmx_stxx_bckprs_cnt {
  74         uint64_t u64;
  75         struct cvmx_stxx_bckprs_cnt_s {
  76 #ifdef __BIG_ENDIAN_BITFIELD
  77                 uint64_t reserved_32_63:32;
  78                 uint64_t cnt:32;
  79 #else
  80                 uint64_t cnt:32;
  81                 uint64_t reserved_32_63:32;
  82 #endif
  83         } s;
  84         struct cvmx_stxx_bckprs_cnt_s cn38xx;
  85         struct cvmx_stxx_bckprs_cnt_s cn38xxp2;
  86         struct cvmx_stxx_bckprs_cnt_s cn58xx;
  87         struct cvmx_stxx_bckprs_cnt_s cn58xxp1;
  88 };
  89
  90 union cvmx_stxx_com_ctl {
  91         uint64_t u64;
  92         struct cvmx_stxx_com_ctl_s {
  93 #ifdef __BIG_ENDIAN_BITFIELD
  94                 uint64_t reserved_4_63:60;
  95                 uint64_t st_en:1;
  96                 uint64_t reserved_1_2:2;
  97                 uint64_t inf_en:1;
  98 #else
  99                 uint64_t inf_en:1;
 100                 uint64_t reserved_1_2:2;
 101                 uint64_t st_en:1;
 102                 uint64_t reserved_4_63:60;
 103 #endif
 104         } s;
 105         struct cvmx_stxx_com_ctl_s cn38xx;
 106         struct cvmx_stxx_com_ctl_s cn38xxp2;
 107         struct cvmx_stxx_com_ctl_s cn58xx;
 108         struct cvmx_stxx_com_ctl_s cn58xxp1;
 109 };
 110
 111 union cvmx_stxx_dip_cnt {
 112         uint64_t u64;
 113         struct cvmx_stxx_dip_cnt_s {
 114 #ifdef __BIG_ENDIAN_BITFIELD
 115                 uint64_t reserved_8_63:56;
 116                 uint64_t frmmax:4;
 117                 uint64_t dipmax:4;
 118 #else
 119                 uint64_t dipmax:4;
 120                 uint64_t frmmax:4;
 121                 uint64_t reserved_8_63:56;
 122 #endif
 123         } s;
 124         struct cvmx_stxx_dip_cnt_s cn38xx;
 125         struct cvmx_stxx_dip_cnt_s cn38xxp2;
 126         struct cvmx_stxx_dip_cnt_s cn58xx;
 127         struct cvmx_stxx_dip_cnt_s cn58xxp1;
 128 };
 129
 130 union cvmx_stxx_ign_cal {
 131         uint64_t u64;
 132         struct cvmx_stxx_ign_cal_s {
 133 #ifdef __BIG_ENDIAN_BITFIELD
 134                 uint64_t reserved_16_63:48;
 135                 uint64_t igntpa:16;
 136 #else
 137                 uint64_t igntpa:16;
 138                 uint64_t reserved_16_63:48;
 139 #endif
 140         } s;
 141         struct cvmx_stxx_ign_cal_s cn38xx;
 142         struct cvmx_stxx_ign_cal_s cn38xxp2;
 143         struct cvmx_stxx_ign_cal_s cn58xx;
 144         struct cvmx_stxx_ign_cal_s cn58xxp1;
 145 };
 146
 147 union cvmx_stxx_int_msk {
 148         uint64_t u64;
 149         struct cvmx_stxx_int_msk_s {
 150 #ifdef __BIG_ENDIAN_BITFIELD
 151                 uint64_t reserved_8_63:56;
 152                 uint64_t frmerr:1;
 153                 uint64_t unxfrm:1;
 154                 uint64_t nosync:1;
 155                 uint64_t diperr:1;
 156                 uint64_t datovr:1;
 157                 uint64_t ovrbst:1;
 158                 uint64_t calpar1:1;
 159                 uint64_t calpar0:1;
 160 #else
 161                 uint64_t calpar0:1;
 162                 uint64_t calpar1:1;
 163                 uint64_t ovrbst:1;
 164                 uint64_t datovr:1;
 165                 uint64_t diperr:1;
 166                 uint64_t nosync:1;
 167                 uint64_t unxfrm:1;
 168                 uint64_t frmerr:1;
 169                 uint64_t reserved_8_63:56;
 170 #endif
 171         } s;
 172         struct cvmx_stxx_int_msk_s cn38xx;
 173         struct cvmx_stxx_int_msk_s cn38xxp2;
 174         struct cvmx_stxx_int_msk_s cn58xx;
 175         struct cvmx_stxx_int_msk_s cn58xxp1;
 176 };
 177
 178 union cvmx_stxx_int_reg {
 179         uint64_t u64;
 180         struct cvmx_stxx_int_reg_s {
 181 #ifdef __BIG_ENDIAN_BITFIELD
 182                 uint64_t reserved_9_63:55;
 183                 uint64_t syncerr:1;
 184                 uint64_t frmerr:1;
 185                 uint64_t unxfrm:1;
 186                 uint64_t nosync:1;
 187                 uint64_t diperr:1;
 188                 uint64_t datovr:1;
 189                 uint64_t ovrbst:1;
 190                 uint64_t calpar1:1;
 191                 uint64_t calpar0:1;
 192 #else
 193                 uint64_t calpar0:1;
 194                 uint64_t calpar1:1;
 195                 uint64_t ovrbst:1;
 196                 uint64_t datovr:1;
 197                 uint64_t diperr:1;
 198                 uint64_t nosync:1;
 199                 uint64_t unxfrm:1;
 200                 uint64_t frmerr:1;
 201                 uint64_t syncerr:1;
 202                 uint64_t reserved_9_63:55;
 203 #endif
 204         } s;
 205         struct cvmx_stxx_int_reg_s cn38xx;
 206         struct cvmx_stxx_int_reg_s cn38xxp2;
 207         struct cvmx_stxx_int_reg_s cn58xx;
 208         struct cvmx_stxx_int_reg_s cn58xxp1;
 209 };
 210
 211 union cvmx_stxx_int_sync {
 212         uint64_t u64;
 213         struct cvmx_stxx_int_sync_s {
 214 #ifdef __BIG_ENDIAN_BITFIELD
 215                 uint64_t reserved_8_63:56;
 216                 uint64_t frmerr:1;
 217                 uint64_t unxfrm:1;
 218                 uint64_t nosync:1;
 219                 uint64_t diperr:1;
 220                 uint64_t datovr:1;
 221                 uint64_t ovrbst:1;
 222                 uint64_t calpar1:1;
 223                 uint64_t calpar0:1;
 224 #else
 225                 uint64_t calpar0:1;
 226                 uint64_t calpar1:1;
 227                 uint64_t ovrbst:1;
 228                 uint64_t datovr:1;
 229                 uint64_t diperr:1;
 230                 uint64_t nosync:1;
 231                 uint64_t unxfrm:1;
 232                 uint64_t frmerr:1;
 233                 uint64_t reserved_8_63:56;
 234 #endif
 235         } s;
 236         struct cvmx_stxx_int_sync_s cn38xx;
 237         struct cvmx_stxx_int_sync_s cn38xxp2;
 238         struct cvmx_stxx_int_sync_s cn58xx;
 239         struct cvmx_stxx_int_sync_s cn58xxp1;
 240 };
 241
 242 union cvmx_stxx_min_bst {
 243         uint64_t u64;
 244         struct cvmx_stxx_min_bst_s {
 245 #ifdef __BIG_ENDIAN_BITFIELD
 246                 uint64_t reserved_9_63:55;
 247                 uint64_t minb:9;
 248 #else
 249                 uint64_t minb:9;
 250                 uint64_t reserved_9_63:55;
 251 #endif
 252         } s;
 253         struct cvmx_stxx_min_bst_s cn38xx;
 254         struct cvmx_stxx_min_bst_s cn38xxp2;
 255         struct cvmx_stxx_min_bst_s cn58xx;
 256         struct cvmx_stxx_min_bst_s cn58xxp1;
 257 };
 258
 259 union cvmx_stxx_spi4_calx {
 260         uint64_t u64;
 261         struct cvmx_stxx_spi4_calx_s {
 262 #ifdef __BIG_ENDIAN_BITFIELD
 263                 uint64_t reserved_17_63:47;
 264                 uint64_t oddpar:1;
 265                 uint64_t prt3:4;
 266                 uint64_t prt2:4;
 267                 uint64_t prt1:4;
 268                 uint64_t prt0:4;
 269 #else
 270                 uint64_t prt0:4;
 271                 uint64_t prt1:4;
 272                 uint64_t prt2:4;
 273                 uint64_t prt3:4;
 274                 uint64_t oddpar:1;
 275                 uint64_t reserved_17_63:47;
 276 #endif
 277         } s;
 278         struct cvmx_stxx_spi4_calx_s cn38xx;
 279         struct cvmx_stxx_spi4_calx_s cn38xxp2;
 280         struct cvmx_stxx_spi4_calx_s cn58xx;
 281         struct cvmx_stxx_spi4_calx_s cn58xxp1;
 282 };
 283
 284 union cvmx_stxx_spi4_dat {
 285         uint64_t u64;
 286         struct cvmx_stxx_spi4_dat_s {
 287 #ifdef __BIG_ENDIAN_BITFIELD
 288                 uint64_t reserved_32_63:32;
 289                 uint64_t alpha:16;
 290                 uint64_t max_t:16;
 291 #else
 292                 uint64_t max_t:16;
 293                 uint64_t alpha:16;
 294                 uint64_t reserved_32_63:32;
 295 #endif
 296         } s;
 297         struct cvmx_stxx_spi4_dat_s cn38xx;
 298         struct cvmx_stxx_spi4_dat_s cn38xxp2;
 299         struct cvmx_stxx_spi4_dat_s cn58xx;
 300         struct cvmx_stxx_spi4_dat_s cn58xxp1;
 301 };
 302
 303 union cvmx_stxx_spi4_stat {
 304         uint64_t u64;
 305         struct cvmx_stxx_spi4_stat_s {
 306 #ifdef __BIG_ENDIAN_BITFIELD
 307                 uint64_t reserved_16_63:48;
 308                 uint64_t m:8;
 309                 uint64_t reserved_7_7:1;
 310                 uint64_t len:7;
 311 #else
 312                 uint64_t len:7;
 313                 uint64_t reserved_7_7:1;
 314                 uint64_t m:8;
 315                 uint64_t reserved_16_63:48;
 316 #endif
 317         } s;
 318         struct cvmx_stxx_spi4_stat_s cn38xx;
 319         struct cvmx_stxx_spi4_stat_s cn38xxp2;
 320         struct cvmx_stxx_spi4_stat_s cn58xx;
 321         struct cvmx_stxx_spi4_stat_s cn58xxp1;
 322 };
 323
 324 union cvmx_stxx_stat_bytes_hi {
 325         uint64_t u64;
 326         struct cvmx_stxx_stat_bytes_hi_s {
 327 #ifdef __BIG_ENDIAN_BITFIELD
 328                 uint64_t reserved_32_63:32;
 329                 uint64_t cnt:32;
 330 #else
 331                 uint64_t cnt:32;
 332                 uint64_t reserved_32_63:32;
 333 #endif
 334         } s;
 335         struct cvmx_stxx_stat_bytes_hi_s cn38xx;
 336         struct cvmx_stxx_stat_bytes_hi_s cn38xxp2;
 337         struct cvmx_stxx_stat_bytes_hi_s cn58xx;
 338         struct cvmx_stxx_stat_bytes_hi_s cn58xxp1;
 339 };
 340
 341 union cvmx_stxx_stat_bytes_lo {
 342         uint64_t u64;
 343         struct cvmx_stxx_stat_bytes_lo_s {
 344 #ifdef __BIG_ENDIAN_BITFIELD
 345                 uint64_t reserved_32_63:32;
 346                 uint64_t cnt:32;
 347 #else
 348                 uint64_t cnt:32;
 349                 uint64_t reserved_32_63:32;
 350 #endif
 351         } s;
 352         struct cvmx_stxx_stat_bytes_lo_s cn38xx;
 353         struct cvmx_stxx_stat_bytes_lo_s cn38xxp2;
 354         struct cvmx_stxx_stat_bytes_lo_s cn58xx;
 355         struct cvmx_stxx_stat_bytes_lo_s cn58xxp1;
 356 };
 357
 358 union cvmx_stxx_stat_ctl {
 359         uint64_t u64;
 360         struct cvmx_stxx_stat_ctl_s {
 361 #ifdef __BIG_ENDIAN_BITFIELD
 362                 uint64_t reserved_5_63:59;
 363                 uint64_t clr:1;
 364                 uint64_t bckprs:4;
 365 #else
 366                 uint64_t bckprs:4;
 367                 uint64_t clr:1;
 368                 uint64_t reserved_5_63:59;
 369 #endif
 370         } s;
 371         struct cvmx_stxx_stat_ctl_s cn38xx;
 372         struct cvmx_stxx_stat_ctl_s cn38xxp2;
 373         struct cvmx_stxx_stat_ctl_s cn58xx;
 374         struct cvmx_stxx_stat_ctl_s cn58xxp1;
 375 };
 376
 377 union cvmx_stxx_stat_pkt_xmt {
 378         uint64_t u64;
 379         struct cvmx_stxx_stat_pkt_xmt_s {
 380 #ifdef __BIG_ENDIAN_BITFIELD
 381                 uint64_t reserved_32_63:32;
 382                 uint64_t cnt:32;
 383 #else
 384                 uint64_t cnt:32;
 385                 uint64_t reserved_32_63:32;
 386 #endif
 387         } s;
 388         struct cvmx_stxx_stat_pkt_xmt_s cn38xx;
 389         struct cvmx_stxx_stat_pkt_xmt_s cn38xxp2;
 390         struct cvmx_stxx_stat_pkt_xmt_s cn58xx;
 391         struct cvmx_stxx_stat_pkt_xmt_s cn58xxp1;
 392 };
 393
 394 #endif