arch/mips/jazz/jazzdma.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Mips Jazz DMA controller support
   4  * Copyright (C) 1995, 1996 by Andreas Busse
   5  *
   6  * NOTE: Some of the argument checking could be removed when
   7  * things have settled down. Also, instead of returning 0xffffffff
   8  * on failure of vdma_alloc() one could leave page #0 unused
   9  * and return the more usual NULL pointer as logical address.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/export.h>
  14 #include <linux/errno.h>
  15 #include <linux/mm.h>
  16 #include <linux/bootmem.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/gfp.h>
  19 #include <asm/mipsregs.h>
  20 #include <asm/jazz.h>
  21 #include <asm/io.h>
  22 #include <linux/uaccess.h>
  23 #include <asm/dma.h>
  24 #include <asm/jazzdma.h>
  25 #include <asm/pgtable.h>
  26
  27 /*
  28  * Set this to one to enable additional vdma debug code.
  29  */
  30 #define CONF_DEBUG_VDMA 0
  31
  32 static VDMA_PGTBL_ENTRY *pgtbl;
  33
  34 static DEFINE_SPINLOCK(vdma_lock);
  35
  36 /*
  37  * Debug stuff
  38  */
  39 #define vdma_debug     ((CONF_DEBUG_VDMA) ? debuglvl : 0)
  40
  41 static int debuglvl = 3;
  42
  43 /*
  44  * Initialize the pagetable with a one-to-one mapping of
  45  * the first 16 Mbytes of main memory and declare all
  46  * entries to be unused. Using this method will at least
  47  * allow some early device driver operations to work.
  48  */
  49 static inline void vdma_pgtbl_init(void)
  50 {
  51         unsigned long paddr = 0;
  52         int i;
  53
  54         for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
  55                 pgtbl[i].frame = paddr;
  56                 pgtbl[i].owner = VDMA_PAGE_EMPTY;
  57                 paddr += VDMA_PAGESIZE;
  58         }
  59 }
  60
  61 /*
  62  * Initialize the Jazz R4030 dma controller
  63  */
  64 static int __init vdma_init(void)
  65 {
  66         /*
  67          * Allocate 32k of memory for DMA page tables.  This needs to be page
  68          * aligned and should be uncached to avoid cache flushing after every
  69          * update.
  70          */
  71         pgtbl = (VDMA_PGTBL_ENTRY *)__get_free_pages(GFP_KERNEL | GFP_DMA,
  72                                                     get_order(VDMA_PGTBL_SIZE));
  73         BUG_ON(!pgtbl);
  74         dma_cache_wback_inv((unsigned long)pgtbl, VDMA_PGTBL_SIZE);
  75         pgtbl = (VDMA_PGTBL_ENTRY *)CKSEG1ADDR((unsigned long)pgtbl);
  76
  77         /*
  78          * Clear the R4030 translation table
  79          */
  80         vdma_pgtbl_init();
  81
  82         r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
  83                           CPHYSADDR((unsigned long)pgtbl));
  84         r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
  85         r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
  86
  87         printk(KERN_INFO "VDMA: R4030 DMA pagetables initialized.\n");
  88         return 0;
  89 }
  90
  91 /*
  92  * Allocate DMA pagetables using a simple first-fit algorithm
  93  */
  94 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
  95 {
  96         int first, last, pages, frame, i;
  97         unsigned long laddr, flags;
  98
  99         /* check arguments */
 100
 101         if (paddr > 0x1fffffff) {
 102                 if (vdma_debug)
 103                         printk("vdma_alloc: Invalid physical address: %08lx\n",
 104                                paddr);
 105                 return VDMA_ERROR;      /* invalid physical address */
 106         }
 107         if (size > 0x400000 || size == 0) {
 108                 if (vdma_debug)
 109                         printk("vdma_alloc: Invalid size: %08lx\n", size);
 110                 return VDMA_ERROR;      /* invalid physical address */
 111         }
 112
 113         spin_lock_irqsave(&vdma_lock, flags);
 114         /*
 115          * Find free chunk
 116          */
 117         pages = VDMA_PAGE(paddr + size) - VDMA_PAGE(paddr) + 1;
 118         first = 0;
 119         while (1) {
 120                 while (pgtbl[first].owner != VDMA_PAGE_EMPTY &&
 121                        first < VDMA_PGTBL_ENTRIES) first++;
 122                 if (first + pages > VDMA_PGTBL_ENTRIES) {       /* nothing free */
 123                         spin_unlock_irqrestore(&vdma_lock, flags);
 124                         return VDMA_ERROR;
 125                 }
 126
 127                 last = first + 1;
 128                 while (pgtbl[last].owner == VDMA_PAGE_EMPTY
 129                        && last - first < pages)
 130                         last++;
 131
 132                 if (last - first == pages)
 133                         break;  /* found */
 134                 first = last + 1;
 135         }
 136
 137         /*
 138          * Mark pages as allocated
 139          */
 140         laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
 141         frame = paddr & ~(VDMA_PAGESIZE - 1);
 142
 143         for (i = first; i < last; i++) {
 144                 pgtbl[i].frame = frame;
 145                 pgtbl[i].owner = laddr;
 146                 frame += VDMA_PAGESIZE;
 147         }
 148
 149         /*
 150          * Update translation table and return logical start address
 151          */
 152         r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
 153
 154         if (vdma_debug > 1)
 155                 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
 156                      pages, laddr);
 157
 158         if (vdma_debug > 2) {
 159                 printk("LADDR: ");
 160                 for (i = first; i < last; i++)
 161                         printk("%08x ", i << 12);
 162                 printk("\nPADDR: ");
 163                 for (i = first; i < last; i++)
 164                         printk("%08x ", pgtbl[i].frame);
 165                 printk("\nOWNER: ");
 166                 for (i = first; i < last; i++)
 167                         printk("%08x ", pgtbl[i].owner);
 168                 printk("\n");
 169         }
 170
 171         spin_unlock_irqrestore(&vdma_lock, flags);
 172
 173         return laddr;
 174 }
 175
 176 EXPORT_SYMBOL(vdma_alloc);
 177
 178 /*
 179  * Free previously allocated dma translation pages
 180  * Note that this does NOT change the translation table,
 181  * it just marks the free'd pages as unused!
 182  */
 183 int vdma_free(unsigned long laddr)
 184 {
 185         int i;
 186
 187         i = laddr >> 12;
 188
 189         if (pgtbl[i].owner != laddr) {
 190                 printk
 191                     ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
 192                      laddr);
 193                 return -1;
 194         }
 195
 196         while (i < VDMA_PGTBL_ENTRIES && pgtbl[i].owner == laddr) {
 197                 pgtbl[i].owner = VDMA_PAGE_EMPTY;
 198                 i++;
 199         }
 200
 201         if (vdma_debug > 1)
 202                 printk("vdma_free: freed %ld pages starting from %08lx\n",
 203                        i - (laddr >> 12), laddr);
 204
 205         return 0;
 206 }
 207
 208 EXPORT_SYMBOL(vdma_free);
 209
 210 /*
 211  * Map certain page(s) to another physical address.
 212  * Caller must have allocated the page(s) before.
 213  */
 214 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
 215 {
 216         int first, pages;
 217
 218         if (laddr > 0xffffff) {
 219                 if (vdma_debug)
 220                         printk
 221                             ("vdma_map: Invalid logical address: %08lx\n",
 222                              laddr);
 223                 return -EINVAL; /* invalid logical address */
 224         }
 225         if (paddr > 0x1fffffff) {
 226                 if (vdma_debug)
 227                         printk
 228                             ("vdma_map: Invalid physical address: %08lx\n",
 229                              paddr);
 230                 return -EINVAL; /* invalid physical address */
 231         }
 232
 233         pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
 234         first = laddr >> 12;
 235         if (vdma_debug)
 236                 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
 237         if (first + pages > VDMA_PGTBL_ENTRIES) {
 238                 if (vdma_debug)
 239                         printk("vdma_alloc: Invalid size: %08lx\n", size);
 240                 return -EINVAL;
 241         }
 242
 243         paddr &= ~(VDMA_PAGESIZE - 1);
 244         while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
 245                 if (pgtbl[first].owner != laddr) {
 246                         if (vdma_debug)
 247                                 printk("Trying to remap other's pages.\n");
 248                         return -EPERM;  /* not owner */
 249                 }
 250                 pgtbl[first].frame = paddr;
 251                 paddr += VDMA_PAGESIZE;
 252                 first++;
 253                 pages--;
 254         }
 255
 256         /*
 257          * Update translation table
 258          */
 259         r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
 260
 261         if (vdma_debug > 2) {
 262                 int i;
 263                 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
 264                 first = laddr >> 12;
 265                 printk("LADDR: ");
 266                 for (i = first; i < first + pages; i++)
 267                         printk("%08x ", i << 12);
 268                 printk("\nPADDR: ");
 269                 for (i = first; i < first + pages; i++)
 270                         printk("%08x ", pgtbl[i].frame);
 271                 printk("\nOWNER: ");
 272                 for (i = first; i < first + pages; i++)
 273                         printk("%08x ", pgtbl[i].owner);
 274                 printk("\n");
 275         }
 276
 277         return 0;
 278 }
 279
 280 /*
 281  * Translate a physical address to a logical address.
 282  * This will return the logical address of the first
 283  * match.
 284  */
 285 unsigned long vdma_phys2log(unsigned long paddr)
 286 {
 287         int i;
 288         int frame;
 289
 290         frame = paddr & ~(VDMA_PAGESIZE - 1);
 291
 292         for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
 293                 if (pgtbl[i].frame == frame)
 294                         break;
 295         }
 296
 297         if (i == VDMA_PGTBL_ENTRIES)
 298                 return ~0UL;
 299
 300         return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
 301 }
 302
 303 EXPORT_SYMBOL(vdma_phys2log);
 304
 305 /*
 306  * Translate a logical DMA address to a physical address
 307  */
 308 unsigned long vdma_log2phys(unsigned long laddr)
 309 {
 310         return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
 311 }
 312
 313 EXPORT_SYMBOL(vdma_log2phys);
 314
 315 /*
 316  * Print DMA statistics
 317  */
 318 void vdma_stats(void)
 319 {
 320         int i;
 321
 322         printk("vdma_stats: CONFIG: %08x\n",
 323                r4030_read_reg32(JAZZ_R4030_CONFIG));
 324         printk("R4030 translation table base: %08x\n",
 325                r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
 326         printk("R4030 translation table limit: %08x\n",
 327                r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
 328         printk("vdma_stats: INV_ADDR: %08x\n",
 329                r4030_read_reg32(JAZZ_R4030_INV_ADDR));
 330         printk("vdma_stats: R_FAIL_ADDR: %08x\n",
 331                r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
 332         printk("vdma_stats: M_FAIL_ADDR: %08x\n",
 333                r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
 334         printk("vdma_stats: IRQ_SOURCE: %08x\n",
 335                r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
 336         printk("vdma_stats: I386_ERROR: %08x\n",
 337                r4030_read_reg32(JAZZ_R4030_I386_ERROR));
 338         printk("vdma_chnl_modes:   ");
 339         for (i = 0; i < 8; i++)
 340                 printk("%04x ",
 341                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
 342                                                    (i << 5)));
 343         printk("\n");
 344         printk("vdma_chnl_enables: ");
 345         for (i = 0; i < 8; i++)
 346                 printk("%04x ",
 347                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 348                                                    (i << 5)));
 349         printk("\n");
 350 }
 351
 352 /*
 353  * DMA transfer functions
 354  */
 355
 356 /*
 357  * Enable a DMA channel. Also clear any error conditions.
 358  */
 359 void vdma_enable(int channel)
 360 {
 361         int status;
 362
 363         if (vdma_debug)
 364                 printk("vdma_enable: channel %d\n", channel);
 365
 366         /*
 367          * Check error conditions first
 368          */
 369         status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
 370         if (status & 0x400)
 371                 printk("VDMA: Channel %d: Address error!\n", channel);
 372         if (status & 0x200)
 373                 printk("VDMA: Channel %d: Memory error!\n", channel);
 374
 375         /*
 376          * Clear all interrupt flags
 377          */
 378         r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 379                           r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 380                                            (channel << 5)) | R4030_TC_INTR
 381                           | R4030_MEM_INTR | R4030_ADDR_INTR);
 382
 383         /*
 384          * Enable the desired channel
 385          */
 386         r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 387                           r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 388                                            (channel << 5)) |
 389                           R4030_CHNL_ENABLE);
 390 }
 391
 392 EXPORT_SYMBOL(vdma_enable);
 393
 394 /*
 395  * Disable a DMA channel
 396  */
 397 void vdma_disable(int channel)
 398 {
 399         if (vdma_debug) {
 400                 int status =
 401                     r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 402                                      (channel << 5));
 403
 404                 printk("vdma_disable: channel %d\n", channel);
 405                 printk("VDMA: channel %d status: %04x (%s) mode: "
 406                        "%02x addr: %06x count: %06x\n",
 407                        channel, status,
 408                        ((status & 0x600) ? "ERROR" : "OK"),
 409                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
 410                                                    (channel << 5)),
 411                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
 412                                                    (channel << 5)),
 413                        (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
 414                                                    (channel << 5)));
 415         }
 416
 417         r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 418                           r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 419                                            (channel << 5)) &
 420                           ~R4030_CHNL_ENABLE);
 421
 422         /*
 423          * After disabling a DMA channel a remote bus register should be
 424          * read to ensure that the current DMA acknowledge cycle is completed.
 425          */
 426         *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
 427 }
 428
 429 EXPORT_SYMBOL(vdma_disable);
 430
 431 /*
 432  * Set DMA mode. This function accepts the mode values used
 433  * to set a PC-style DMA controller. For the SCSI and FDC
 434  * channels, we also set the default modes each time we're
 435  * called.
 436  * NOTE: The FAST and BURST dma modes are supported by the
 437  * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
 438  * for now.
 439  */
 440 void vdma_set_mode(int channel, int mode)
 441 {
 442         if (vdma_debug)
 443                 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
 444                        mode);
 445
 446         switch (channel) {
 447         case JAZZ_SCSI_DMA:     /* scsi */
 448                 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
 449 /*                        R4030_MODE_FAST | */
 450 /*                        R4030_MODE_BURST | */
 451                                   R4030_MODE_INTR_EN |
 452                                   R4030_MODE_WIDTH_16 |
 453                                   R4030_MODE_ATIME_80);
 454                 break;
 455
 456         case JAZZ_FLOPPY_DMA:   /* floppy */
 457                 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
 458 /*                        R4030_MODE_FAST | */
 459 /*                        R4030_MODE_BURST | */
 460                                   R4030_MODE_INTR_EN |
 461                                   R4030_MODE_WIDTH_8 |
 462                                   R4030_MODE_ATIME_120);
 463                 break;
 464
 465         case JAZZ_AUDIOL_DMA:
 466         case JAZZ_AUDIOR_DMA:
 467                 printk("VDMA: Audio DMA not supported yet.\n");
 468                 break;
 469
 470         default:
 471                 printk
 472                     ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
 473                      channel);
 474         }
 475
 476         switch (mode) {
 477         case DMA_MODE_READ:
 478                 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 479                                   r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 480                                                    (channel << 5)) &
 481                                   ~R4030_CHNL_WRITE);
 482                 break;
 483
 484         case DMA_MODE_WRITE:
 485                 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
 486                                   r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
 487                                                    (channel << 5)) |
 488                                   R4030_CHNL_WRITE);
 489                 break;
 490
 491         default:
 492                 printk
 493                     ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
 494                      mode);
 495         }
 496 }
 497
 498 EXPORT_SYMBOL(vdma_set_mode);
 499
 500 /*
 501  * Set Transfer Address
 502  */
 503 void vdma_set_addr(int channel, long addr)
 504 {
 505         if (vdma_debug)
 506                 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
 507                        addr);
 508
 509         r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
 510 }
 511
 512 EXPORT_SYMBOL(vdma_set_addr);
 513
 514 /*
 515  * Set Transfer Count
 516  */
 517 void vdma_set_count(int channel, int count)
 518 {
 519         if (vdma_debug)
 520                 printk("vdma_set_count: channel %d, count %08x\n", channel,
 521                        (unsigned) count);
 522
 523         r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
 524 }
 525
 526 EXPORT_SYMBOL(vdma_set_count);
 527
 528 /*
 529  * Get Residual
 530  */
 531 int vdma_get_residue(int channel)
 532 {
 533         int residual;
 534
 535         residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
 536
 537         if (vdma_debug)
 538                 printk("vdma_get_residual: channel %d: residual=%d\n",
 539                        channel, residual);
 540
 541         return residual;
 542 }
 543
 544 /*
 545  * Get DMA channel enable register
 546  */
 547 int vdma_get_enable(int channel)
 548 {
 549         int enable;
 550
 551         enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
 552
 553         if (vdma_debug)
 554                 printk("vdma_get_enable: channel %d: enable=%d\n", channel,
 555                        enable);
 556
 557         return enable;
 558 }
 559
 560 arch_initcall(vdma_init);