GNU Linux-libre 4.4.284-gnu1
[releases.git] / arch / mips / mti-malta / malta-platform.c
1 /*
2  * This file is subject to the terms and conditions of the GNU General Public
3  * License.  See the file "COPYING" in the main directory of this archive
4  * for more details.
5  *
6  * Copyright (C) 2006, 07 MIPS Technologies, Inc.
7  *   written by Ralf Baechle (ralf@linux-mips.org)
8  *     written by Ralf Baechle <ralf@linux-mips.org>
9  *
10  * Copyright (C) 2008 Wind River Systems, Inc.
11  *   updated by Tiejun Chen <tiejun.chen@windriver.com>
12  *
13  * 1. Probe driver for the Malta's UART ports:
14  *
15  *   o 2 ports in the SMC SuperIO
16  *   o 1 port in the CBUS UART, a discrete 16550 which normally is only used
17  *     for bringups.
18  *
19  * We don't use 8250_platform.c on Malta as it would result in the CBUS
20  * UART becoming ttyS0.
21  *
22  * 2. Register RTC-CMOS platform device on Malta.
23  */
24 #include <linux/init.h>
25 #include <linux/serial_8250.h>
26 #include <linux/mc146818rtc.h>
27 #include <linux/module.h>
28 #include <linux/irq.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/platform_device.h>
32 #include <asm/mips-boards/maltaint.h>
33 #include <mtd/mtd-abi.h>
34
35 #define SMC_PORT(base, int)                                             \
36 {                                                                       \
37         .iobase         = base,                                         \
38         .irq            = int,                                          \
39         .uartclk        = 1843200,                                      \
40         .iotype         = UPIO_PORT,                                    \
41         .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,            \
42         .regshift       = 0,                                            \
43 }
44
45 #define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
46
47 static struct plat_serial8250_port uart8250_data[] = {
48         SMC_PORT(0x3F8, 4),
49         SMC_PORT(0x2F8, 3),
50 #ifndef CONFIG_MIPS_CMP
51         {
52                 .mapbase        = 0x1f000900,   /* The CBUS UART */
53                 .irq            = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
54                 .uartclk        = 3686400,      /* Twice the usual clk! */
55                 .iotype         = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ?
56                                   UPIO_MEM32BE : UPIO_MEM32,
57                 .flags          = CBUS_UART_FLAGS,
58                 .regshift       = 3,
59         },
60 #endif
61         { },
62 };
63
64 static struct platform_device malta_uart8250_device = {
65         .name                   = "serial8250",
66         .id                     = PLAT8250_DEV_PLATFORM,
67         .dev                    = {
68                 .platform_data  = uart8250_data,
69         },
70 };
71
72 struct resource malta_rtc_resources[] = {
73         {
74                 .start  = RTC_PORT(0),
75                 .end    = RTC_PORT(7),
76                 .flags  = IORESOURCE_IO,
77         }, {
78                 .start  = RTC_IRQ,
79                 .end    = RTC_IRQ,
80                 .flags  = IORESOURCE_IRQ,
81         }
82 };
83
84 static struct platform_device malta_rtc_device = {
85         .name           = "rtc_cmos",
86         .id             = -1,
87         .resource       = malta_rtc_resources,
88         .num_resources  = ARRAY_SIZE(malta_rtc_resources),
89 };
90
91 static struct mtd_partition malta_mtd_partitions[] = {
92         {
93                 .name =         "YAMON",
94                 .offset =       0x0,
95                 .size =         0x100000,
96                 .mask_flags =   MTD_WRITEABLE
97         }, {
98                 .name =         "User FS",
99                 .offset =       0x100000,
100                 .size =         0x2e0000
101         }, {
102                 .name =         "Board Config",
103                 .offset =       0x3e0000,
104                 .size =         0x020000,
105                 .mask_flags =   MTD_WRITEABLE
106         }
107 };
108
109 static struct physmap_flash_data malta_flash_data = {
110         .width          = 4,
111         .nr_parts       = ARRAY_SIZE(malta_mtd_partitions),
112         .parts          = malta_mtd_partitions
113 };
114
115 static struct resource malta_flash_resource = {
116         .start          = 0x1e000000,
117         .end            = 0x1e3fffff,
118         .flags          = IORESOURCE_MEM
119 };
120
121 static struct platform_device malta_flash_device = {
122         .name           = "physmap-flash",
123         .id             = 0,
124         .dev            = {
125                 .platform_data  = &malta_flash_data,
126         },
127         .num_resources  = 1,
128         .resource       = &malta_flash_resource,
129 };
130
131 static struct platform_device *malta_devices[] __initdata = {
132         &malta_uart8250_device,
133         &malta_rtc_device,
134         &malta_flash_device,
135 };
136
137 static int __init malta_add_devices(void)
138 {
139         int err;
140
141         err = platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
142         if (err)
143                 return err;
144
145         return 0;
146 }
147
148 device_initcall(malta_add_devices);