1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
3 #define _ASM_POWERPC_BOOK3S_64_PGTABLE_H_
5 #include <asm-generic/5level-fixup.h>
8 #include <linux/mmdebug.h>
13 * Common bits between hash and Radix page table
15 #define _PAGE_BIT_SWAP_TYPE 0
21 #define _PAGE_EXEC 0x00001 /* execute permission */
22 #define _PAGE_WRITE 0x00002 /* write access allowed */
23 #define _PAGE_READ 0x00004 /* read access allowed */
24 #define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
25 #define _PAGE_RWX (_PAGE_READ | _PAGE_WRITE | _PAGE_EXEC)
26 #define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
27 #define _PAGE_SAO 0x00010 /* Strong access order */
28 #define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
29 #define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
30 #define _PAGE_DIRTY 0x00080 /* C: page changed */
31 #define _PAGE_ACCESSED 0x00100 /* R: page referenced */
35 #define _RPAGE_SW0 0x2000000000000000UL
36 #define _RPAGE_SW1 0x00800
37 #define _RPAGE_SW2 0x00400
38 #define _RPAGE_SW3 0x00200
39 #define _RPAGE_RSV1 0x1000000000000000UL
40 #define _RPAGE_RSV2 0x0800000000000000UL
41 #define _RPAGE_RSV3 0x0400000000000000UL
42 #define _RPAGE_RSV4 0x0200000000000000UL
43 #define _RPAGE_RSV5 0x00040UL
45 #define _PAGE_PTE 0x4000000000000000UL /* distinguishes PTEs from pointers */
46 #define _PAGE_PRESENT 0x8000000000000000UL /* pte contains a translation */
48 * We need to mark a pmd pte invalid while splitting. We can do that by clearing
49 * the _PAGE_PRESENT bit. But then that will be taken as a swap pte. In order to
50 * differentiate between two use a SW field when invalidating.
52 * We do that temporary invalidate for regular pte entry in ptep_set_access_flags
54 * This is used only when _PAGE_PRESENT is cleared.
56 #define _PAGE_INVALID _RPAGE_SW0
59 * Top and bottom bits of RPN which can be used by hash
60 * translation mode, because we expect them to be zero
63 #define _RPAGE_RPN0 0x01000
64 #define _RPAGE_RPN1 0x02000
65 #define _RPAGE_RPN44 0x0100000000000000UL
66 #define _RPAGE_RPN43 0x0080000000000000UL
67 #define _RPAGE_RPN42 0x0040000000000000UL
68 #define _RPAGE_RPN41 0x0020000000000000UL
70 /* Max physical address bit as per radix table */
71 #define _RPAGE_PA_MAX 57
74 * Max physical address bit we will use for now.
76 * This is mostly a hardware limitation and for now Power9 has
79 * This is different from the number of physical bit required to address
80 * the last byte of memory. That is defined by MAX_PHYSMEM_BITS.
81 * MAX_PHYSMEM_BITS is a linux limitation imposed by the maximum
82 * number of sections we can support (SECTIONS_SHIFT).
84 * This is different from Radix page table limitation above and
85 * should always be less than that. The limit is done such that
86 * we can overload the bits between _RPAGE_PA_MAX and _PAGE_PA_MAX
87 * for hash linux page table specific bits.
89 * In order to be compatible with future hardware generations we keep
90 * some offsets and limit this for now to 53
92 #define _PAGE_PA_MAX 53
94 #define _PAGE_SOFT_DIRTY _RPAGE_SW3 /* software: software dirty tracking */
95 #define _PAGE_SPECIAL _RPAGE_SW2 /* software: special page */
96 #define _PAGE_DEVMAP _RPAGE_SW1 /* software: ZONE_DEVICE page */
97 #define __HAVE_ARCH_PTE_DEVMAP
100 * Drivers request for cache inhibited pte mapping using _PAGE_NO_CACHE
101 * Instead of fixing all of them, add an alternate define which
102 * maps CI pte mapping.
104 #define _PAGE_NO_CACHE _PAGE_TOLERANT
106 * We support _RPAGE_PA_MAX bit real address in pte. On the linux side
107 * we are limited by _PAGE_PA_MAX. Clear everything above _PAGE_PA_MAX
108 * and every thing below PAGE_SHIFT;
110 #define PTE_RPN_MASK (((1UL << _PAGE_PA_MAX) - 1) & (PAGE_MASK))
112 * set of bits not changed in pmd_modify. Even though we have hash specific bits
113 * in here, on radix we expect them to be zero.
115 #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
116 _PAGE_ACCESSED | H_PAGE_THP_HUGE | _PAGE_PTE | \
117 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
119 * user access blocked by key
121 #define _PAGE_KERNEL_RW (_PAGE_PRIVILEGED | _PAGE_RW | _PAGE_DIRTY)
122 #define _PAGE_KERNEL_RO (_PAGE_PRIVILEGED | _PAGE_READ)
123 #define _PAGE_KERNEL_RWX (_PAGE_PRIVILEGED | _PAGE_DIRTY | \
124 _PAGE_RW | _PAGE_EXEC)
126 * No page size encoding in the linux PTE
128 #define _PAGE_PSIZE 0
130 * _PAGE_CHG_MASK masks of bits that are to be preserved across
133 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
134 _PAGE_ACCESSED | _PAGE_SPECIAL | _PAGE_PTE | \
135 _PAGE_SOFT_DIRTY | _PAGE_DEVMAP)
137 #define H_PTE_PKEY (H_PTE_PKEY_BIT0 | H_PTE_PKEY_BIT1 | H_PTE_PKEY_BIT2 | \
138 H_PTE_PKEY_BIT3 | H_PTE_PKEY_BIT4)
140 * Mask of bits returned by pte_pgprot()
142 #define PAGE_PROT_BITS (_PAGE_SAO | _PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT | \
143 H_PAGE_4K_PFN | _PAGE_PRIVILEGED | _PAGE_ACCESSED | \
144 _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_EXEC | \
145 _PAGE_SOFT_DIRTY | H_PTE_PKEY)
147 * We define 2 sets of base prot bits, one for basic pages (ie,
148 * cacheable kernel and user pages) and one for non cacheable
149 * pages. We always set _PAGE_COHERENT when SMP is enabled or
150 * the processor might need it for DMA coherency.
152 #define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_PSIZE)
153 #define _PAGE_BASE (_PAGE_BASE_NC)
155 /* Permission masks used to generate the __P and __S table,
157 * Note:__pgprot is defined in arch/powerpc/include/asm/page.h
159 * Write permissions imply read permissions for now (we could make write-only
160 * pages on BookE but we don't bother for now). Execute permission control is
161 * possible on platforms that define _PAGE_EXEC
163 * Note due to the way vm flags are laid out, the bits are XWR
165 #define PAGE_NONE __pgprot(_PAGE_BASE | _PAGE_PRIVILEGED)
166 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW)
167 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_EXEC)
168 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_READ)
169 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
170 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_READ)
171 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_EXEC)
173 #define __P000 PAGE_NONE
174 #define __P001 PAGE_READONLY
175 #define __P010 PAGE_COPY
176 #define __P011 PAGE_COPY
177 #define __P100 PAGE_READONLY_X
178 #define __P101 PAGE_READONLY_X
179 #define __P110 PAGE_COPY_X
180 #define __P111 PAGE_COPY_X
182 #define __S000 PAGE_NONE
183 #define __S001 PAGE_READONLY
184 #define __S010 PAGE_SHARED
185 #define __S011 PAGE_SHARED
186 #define __S100 PAGE_READONLY_X
187 #define __S101 PAGE_READONLY_X
188 #define __S110 PAGE_SHARED_X
189 #define __S111 PAGE_SHARED_X
191 /* Permission masks used for kernel mappings */
192 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
193 #define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
195 #define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
196 _PAGE_NON_IDEMPOTENT)
197 #define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RWX)
198 #define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
199 #define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_ROX)
202 * Protection used for kernel text. We want the debuggers to be able to
203 * set breakpoints anywhere, so don't write protect the kernel text
204 * on platforms where such control is possible.
206 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) || \
207 defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
208 #define PAGE_KERNEL_TEXT PAGE_KERNEL_X
210 #define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
213 /* Make modules code happy. We don't set RO yet */
214 #define PAGE_KERNEL_EXEC PAGE_KERNEL_X
215 #define PAGE_AGP (PAGE_KERNEL_NC)
221 extern unsigned long __pte_index_size;
222 extern unsigned long __pmd_index_size;
223 extern unsigned long __pud_index_size;
224 extern unsigned long __pgd_index_size;
225 extern unsigned long __pud_cache_index;
226 #define PTE_INDEX_SIZE __pte_index_size
227 #define PMD_INDEX_SIZE __pmd_index_size
228 #define PUD_INDEX_SIZE __pud_index_size
229 #define PGD_INDEX_SIZE __pgd_index_size
230 /* pmd table use page table fragments */
231 #define PMD_CACHE_INDEX 0
232 #define PUD_CACHE_INDEX __pud_cache_index
234 * Because of use of pte fragments and THP, size of page table
235 * are not always derived out of index size above.
237 extern unsigned long __pte_table_size;
238 extern unsigned long __pmd_table_size;
239 extern unsigned long __pud_table_size;
240 extern unsigned long __pgd_table_size;
241 #define PTE_TABLE_SIZE __pte_table_size
242 #define PMD_TABLE_SIZE __pmd_table_size
243 #define PUD_TABLE_SIZE __pud_table_size
244 #define PGD_TABLE_SIZE __pgd_table_size
246 extern unsigned long __pmd_val_bits;
247 extern unsigned long __pud_val_bits;
248 extern unsigned long __pgd_val_bits;
249 #define PMD_VAL_BITS __pmd_val_bits
250 #define PUD_VAL_BITS __pud_val_bits
251 #define PGD_VAL_BITS __pgd_val_bits
253 extern unsigned long __pte_frag_nr;
254 #define PTE_FRAG_NR __pte_frag_nr
255 extern unsigned long __pte_frag_size_shift;
256 #define PTE_FRAG_SIZE_SHIFT __pte_frag_size_shift
257 #define PTE_FRAG_SIZE (1UL << PTE_FRAG_SIZE_SHIFT)
259 extern unsigned long __pmd_frag_nr;
260 #define PMD_FRAG_NR __pmd_frag_nr
261 extern unsigned long __pmd_frag_size_shift;
262 #define PMD_FRAG_SIZE_SHIFT __pmd_frag_size_shift
263 #define PMD_FRAG_SIZE (1UL << PMD_FRAG_SIZE_SHIFT)
265 #define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
266 #define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
267 #define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
268 #define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
270 /* PMD_SHIFT determines what a second-level page table entry can map */
271 #define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
272 #define PMD_SIZE (1UL << PMD_SHIFT)
273 #define PMD_MASK (~(PMD_SIZE-1))
275 /* PUD_SHIFT determines what a third-level page table entry can map */
276 #define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
277 #define PUD_SIZE (1UL << PUD_SHIFT)
278 #define PUD_MASK (~(PUD_SIZE-1))
280 /* PGDIR_SHIFT determines what a fourth-level page table entry can map */
281 #define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
282 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
283 #define PGDIR_MASK (~(PGDIR_SIZE-1))
285 /* Bits to mask out from a PMD to get to the PTE page */
286 #define PMD_MASKED_BITS 0xc0000000000000ffUL
287 /* Bits to mask out from a PUD to get to the PMD page */
288 #define PUD_MASKED_BITS 0xc0000000000000ffUL
289 /* Bits to mask out from a PGD to get to the PUD page */
290 #define PGD_MASKED_BITS 0xc0000000000000ffUL
293 * Used as an indicator for rcu callback functions
301 * Below are used with 4k page size and hugetlb
307 extern unsigned long __vmalloc_start;
308 extern unsigned long __vmalloc_end;
309 #define VMALLOC_START __vmalloc_start
310 #define VMALLOC_END __vmalloc_end
312 extern unsigned long __kernel_virt_start;
313 extern unsigned long __kernel_virt_size;
314 extern unsigned long __kernel_io_start;
315 #define KERN_VIRT_START __kernel_virt_start
316 #define KERN_VIRT_SIZE __kernel_virt_size
317 #define KERN_IO_START __kernel_io_start
318 extern struct page *vmemmap;
319 extern unsigned long ioremap_bot;
320 extern unsigned long pci_io_base;
321 #endif /* __ASSEMBLY__ */
323 #include <asm/book3s/64/hash.h>
324 #include <asm/book3s/64/radix.h>
326 #ifdef CONFIG_PPC_64K_PAGES
327 #include <asm/book3s/64/pgtable-64k.h>
329 #include <asm/book3s/64/pgtable-4k.h>
332 #include <asm/barrier.h>
334 * The second half of the kernel virtual space is used for IO mappings,
335 * it's itself carved into the PIO region (ISA and PHB IO space) and
338 * ISA_IO_BASE = KERN_IO_START, 64K reserved area
339 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
340 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
342 #define FULL_IO_SIZE 0x80000000ul
343 #define ISA_IO_BASE (KERN_IO_START)
344 #define ISA_IO_END (KERN_IO_START + 0x10000ul)
345 #define PHB_IO_BASE (ISA_IO_END)
346 #define PHB_IO_END (KERN_IO_START + FULL_IO_SIZE)
347 #define IOREMAP_BASE (PHB_IO_END)
348 #define IOREMAP_END (KERN_VIRT_START + KERN_VIRT_SIZE)
350 /* Advertise special mapping type for AGP */
351 #define HAVE_PAGE_AGP
356 * This is the default implementation of various PTE accessors, it's
357 * used in all cases except Book3S with 64K pages where we have a
358 * concept of sub-pages
362 #define __real_pte(e, p, o) ((real_pte_t){(e)})
363 #define __rpte_to_pte(r) ((r).pte)
364 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> H_PAGE_F_GIX_SHIFT)
366 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
369 shift = mmu_psize_defs[psize].shift; \
371 #define pte_iterate_hashed_end() } while(0)
374 * We expect this to be called only for user addresses or kernel virtual
375 * addresses other than the linear mapping.
377 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
379 #endif /* __real_pte */
381 static inline unsigned long pte_update(struct mm_struct *mm, unsigned long addr,
382 pte_t *ptep, unsigned long clr,
383 unsigned long set, int huge)
386 return radix__pte_update(mm, addr, ptep, clr, set, huge);
387 return hash__pte_update(mm, addr, ptep, clr, set, huge);
390 * For hash even if we have _PAGE_ACCESSED = 0, we do a pte_update.
391 * We currently remove entries from the hashtable regardless of whether
392 * the entry was young or dirty.
394 * We should be more intelligent about this but for the moment we override
395 * these functions and force a tlb flush unconditionally
396 * For radix: H_PAGE_HASHPTE should be zero. Hence we can use the same
397 * function for both hash and radix.
399 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
400 unsigned long addr, pte_t *ptep)
404 if ((pte_raw(*ptep) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
406 old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
407 return (old & _PAGE_ACCESSED) != 0;
410 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
411 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
414 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
418 static inline int __pte_write(pte_t pte)
420 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_WRITE));
423 #ifdef CONFIG_NUMA_BALANCING
424 #define pte_savedwrite pte_savedwrite
425 static inline bool pte_savedwrite(pte_t pte)
428 * Saved write ptes are prot none ptes that doesn't have
429 * privileged bit sit. We mark prot none as one which has
430 * present and pviliged bit set and RWX cleared. To mark
431 * protnone which used to have _PAGE_WRITE set we clear
432 * the privileged bit.
434 return !(pte_raw(pte) & cpu_to_be64(_PAGE_RWX | _PAGE_PRIVILEGED));
437 #define pte_savedwrite pte_savedwrite
438 static inline bool pte_savedwrite(pte_t pte)
444 static inline int pte_write(pte_t pte)
446 return __pte_write(pte) || pte_savedwrite(pte);
449 static inline int pte_read(pte_t pte)
451 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_READ));
454 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
455 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
458 if (__pte_write(*ptep))
459 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 0);
460 else if (unlikely(pte_savedwrite(*ptep)))
461 pte_update(mm, addr, ptep, 0, _PAGE_PRIVILEGED, 0);
464 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
465 unsigned long addr, pte_t *ptep)
468 * We should not find protnone for hugetlb, but this complete the
471 if (__pte_write(*ptep))
472 pte_update(mm, addr, ptep, _PAGE_WRITE, 0, 1);
473 else if (unlikely(pte_savedwrite(*ptep)))
474 pte_update(mm, addr, ptep, 0, _PAGE_PRIVILEGED, 1);
477 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
478 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
479 unsigned long addr, pte_t *ptep)
481 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
485 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
486 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
488 pte_t *ptep, int full)
490 if (full && radix_enabled()) {
492 * We know that this is a full mm pte clear and
493 * hence can be sure there is no parallel set_pte.
495 return radix__ptep_get_and_clear_full(mm, addr, ptep, full);
497 return ptep_get_and_clear(mm, addr, ptep);
501 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
504 pte_update(mm, addr, ptep, ~0UL, 0, 0);
507 static inline int pte_dirty(pte_t pte)
509 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_DIRTY));
512 static inline int pte_young(pte_t pte)
514 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_ACCESSED));
517 static inline int pte_special(pte_t pte)
519 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SPECIAL));
522 static inline pgprot_t pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte) & PAGE_PROT_BITS); }
524 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
525 static inline bool pte_soft_dirty(pte_t pte)
527 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SOFT_DIRTY));
530 static inline pte_t pte_mksoft_dirty(pte_t pte)
532 return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);
535 static inline pte_t pte_clear_soft_dirty(pte_t pte)
537 return __pte(pte_val(pte) & ~_PAGE_SOFT_DIRTY);
539 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
541 #ifdef CONFIG_NUMA_BALANCING
542 static inline int pte_protnone(pte_t pte)
544 return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE | _PAGE_RWX)) ==
545 cpu_to_be64(_PAGE_PRESENT | _PAGE_PTE);
548 #define pte_mk_savedwrite pte_mk_savedwrite
549 static inline pte_t pte_mk_savedwrite(pte_t pte)
552 * Used by Autonuma subsystem to preserve the write bit
553 * while marking the pte PROT_NONE. Only allow this
556 VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX | _PAGE_PRIVILEGED)) !=
557 cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));
558 return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
561 #define pte_clear_savedwrite pte_clear_savedwrite
562 static inline pte_t pte_clear_savedwrite(pte_t pte)
565 * Used by KSM subsystem to make a protnone pte readonly.
567 VM_BUG_ON(!pte_protnone(pte));
568 return __pte(pte_val(pte) | _PAGE_PRIVILEGED);
571 #define pte_clear_savedwrite pte_clear_savedwrite
572 static inline pte_t pte_clear_savedwrite(pte_t pte)
575 return __pte(pte_val(pte) & ~_PAGE_WRITE);
577 #endif /* CONFIG_NUMA_BALANCING */
579 static inline int pte_present(pte_t pte)
582 * A pte is considerent present if _PAGE_PRESENT is set.
583 * We also need to consider the pte present which is marked
584 * invalid during ptep_set_access_flags. Hence we look for _PAGE_INVALID
585 * if we find _PAGE_PRESENT cleared.
587 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_INVALID));
590 #ifdef CONFIG_PPC_MEM_KEYS
591 extern bool arch_pte_access_permitted(u64 pte, bool write, bool execute);
593 static inline bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
597 #endif /* CONFIG_PPC_MEM_KEYS */
599 #define pte_access_permitted pte_access_permitted
600 static inline bool pte_access_permitted(pte_t pte, bool write)
602 unsigned long pteval = pte_val(pte);
603 /* Also check for pte_user */
604 unsigned long clear_pte_bits = _PAGE_PRIVILEGED;
606 * _PAGE_READ is needed for any access and will be
607 * cleared for PROT_NONE
609 unsigned long need_pte_bits = _PAGE_PRESENT | _PAGE_READ;
612 need_pte_bits |= _PAGE_WRITE;
614 if ((pteval & need_pte_bits) != need_pte_bits)
617 if ((pteval & clear_pte_bits) == clear_pte_bits)
620 return arch_pte_access_permitted(pte_val(pte), write, 0);
624 * Conversion functions: convert a page and protection to a page entry,
625 * and a page entry and page directory to the page they refer to.
627 * Even if PTEs can be unsigned long long, a PFN is always an unsigned
630 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
632 return __pte((((pte_basic_t)(pfn) << PAGE_SHIFT) & PTE_RPN_MASK) |
636 static inline unsigned long pte_pfn(pte_t pte)
638 return (pte_val(pte) & PTE_RPN_MASK) >> PAGE_SHIFT;
641 /* Generic modifiers for PTE bits */
642 static inline pte_t pte_wrprotect(pte_t pte)
644 if (unlikely(pte_savedwrite(pte)))
645 return pte_clear_savedwrite(pte);
646 return __pte(pte_val(pte) & ~_PAGE_WRITE);
649 static inline pte_t pte_mkclean(pte_t pte)
651 return __pte(pte_val(pte) & ~_PAGE_DIRTY);
654 static inline pte_t pte_mkold(pte_t pte)
656 return __pte(pte_val(pte) & ~_PAGE_ACCESSED);
659 static inline pte_t pte_mkwrite(pte_t pte)
662 * write implies read, hence set both
664 return __pte(pte_val(pte) | _PAGE_RW);
667 static inline pte_t pte_mkdirty(pte_t pte)
669 return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
672 static inline pte_t pte_mkyoung(pte_t pte)
674 return __pte(pte_val(pte) | _PAGE_ACCESSED);
677 static inline pte_t pte_mkspecial(pte_t pte)
679 return __pte(pte_val(pte) | _PAGE_SPECIAL);
682 static inline pte_t pte_mkhuge(pte_t pte)
687 static inline pte_t pte_mkdevmap(pte_t pte)
689 return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);
693 * This is potentially called with a pmd as the argument, in which case it's not
694 * safe to check _PAGE_DEVMAP unless we also confirm that _PAGE_PTE is set.
695 * That's because the bit we use for _PAGE_DEVMAP is not reserved for software
696 * use in page directory entries (ie. non-ptes).
698 static inline int pte_devmap(pte_t pte)
700 u64 mask = cpu_to_be64(_PAGE_DEVMAP | _PAGE_PTE);
702 return (pte_raw(pte) & mask) == mask;
705 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
707 /* FIXME!! check whether this need to be a conditional */
708 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
711 static inline bool pte_user(pte_t pte)
713 return !(pte_raw(pte) & cpu_to_be64(_PAGE_PRIVILEGED));
716 /* Encode and de-code a swap entry */
717 #define MAX_SWAPFILES_CHECK() do { \
718 BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
720 * Don't have overlapping bits with _PAGE_HPTEFLAGS \
721 * We filter HPTEFLAGS on set_pte. \
723 BUILD_BUG_ON(_PAGE_HPTEFLAGS & (0x1f << _PAGE_BIT_SWAP_TYPE)); \
724 BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE_SWP_SOFT_DIRTY); \
727 * on pte we don't need handle RADIX_TREE_EXCEPTIONAL_SHIFT;
729 #define SWP_TYPE_BITS 5
730 #define __swp_type(x) (((x).val >> _PAGE_BIT_SWAP_TYPE) \
731 & ((1UL << SWP_TYPE_BITS) - 1))
732 #define __swp_offset(x) (((x).val & PTE_RPN_MASK) >> PAGE_SHIFT)
733 #define __swp_entry(type, offset) ((swp_entry_t) { \
734 ((type) << _PAGE_BIT_SWAP_TYPE) \
735 | (((offset) << PAGE_SHIFT) & PTE_RPN_MASK)})
737 * swp_entry_t must be independent of pte bits. We build a swp_entry_t from
738 * swap type and offset we get from swap and convert that to pte to find a
739 * matching pte in linux page table.
740 * Clear bits not found in swap entries here.
742 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val((pte)) & ~_PAGE_PTE })
743 #define __swp_entry_to_pte(x) __pte((x).val | _PAGE_PTE)
745 #ifdef CONFIG_MEM_SOFT_DIRTY
746 #define _PAGE_SWP_SOFT_DIRTY (1UL << (SWP_TYPE_BITS + _PAGE_BIT_SWAP_TYPE))
748 #define _PAGE_SWP_SOFT_DIRTY 0UL
749 #endif /* CONFIG_MEM_SOFT_DIRTY */
751 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
752 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
754 return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY);
757 static inline bool pte_swp_soft_dirty(pte_t pte)
759 return !!(pte_raw(pte) & cpu_to_be64(_PAGE_SWP_SOFT_DIRTY));
762 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
764 return __pte(pte_val(pte) & ~_PAGE_SWP_SOFT_DIRTY);
766 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
768 static inline bool check_pte_access(unsigned long access, unsigned long ptev)
771 * This check for _PAGE_RWX and _PAGE_PRESENT bits
776 * This check for access to privilege space
778 if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
784 * Generic functions with hash/radix callbacks
787 static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
788 pte_t *ptep, pte_t entry,
789 unsigned long address,
793 return radix__ptep_set_access_flags(vma, ptep, entry,
795 return hash__ptep_set_access_flags(ptep, entry);
798 #define __HAVE_ARCH_PTE_SAME
799 static inline int pte_same(pte_t pte_a, pte_t pte_b)
802 return radix__pte_same(pte_a, pte_b);
803 return hash__pte_same(pte_a, pte_b);
806 static inline int pte_none(pte_t pte)
809 return radix__pte_none(pte);
810 return hash__pte_none(pte);
813 static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
814 pte_t *ptep, pte_t pte, int percpu)
817 return radix__set_pte_at(mm, addr, ptep, pte, percpu);
818 return hash__set_pte_at(mm, addr, ptep, pte, percpu);
821 #define _PAGE_CACHE_CTL (_PAGE_NON_IDEMPOTENT | _PAGE_TOLERANT)
823 #define pgprot_noncached pgprot_noncached
824 static inline pgprot_t pgprot_noncached(pgprot_t prot)
826 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
827 _PAGE_NON_IDEMPOTENT);
830 #define pgprot_noncached_wc pgprot_noncached_wc
831 static inline pgprot_t pgprot_noncached_wc(pgprot_t prot)
833 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) |
837 #define pgprot_cached pgprot_cached
838 static inline pgprot_t pgprot_cached(pgprot_t prot)
840 return __pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL));
843 #define pgprot_writecombine pgprot_writecombine
844 static inline pgprot_t pgprot_writecombine(pgprot_t prot)
846 return pgprot_noncached_wc(prot);
849 * check a pte mapping have cache inhibited property
851 static inline bool pte_ci(pte_t pte)
853 unsigned long pte_v = pte_val(pte);
855 if (((pte_v & _PAGE_CACHE_CTL) == _PAGE_TOLERANT) ||
856 ((pte_v & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT))
861 static inline void pmd_set(pmd_t *pmdp, unsigned long val)
866 static inline void pmd_clear(pmd_t *pmdp)
871 static inline int pmd_none(pmd_t pmd)
873 return !pmd_raw(pmd);
876 static inline int pmd_present(pmd_t pmd)
879 return !pmd_none(pmd);
882 static inline int pmd_bad(pmd_t pmd)
885 return radix__pmd_bad(pmd);
886 return hash__pmd_bad(pmd);
889 static inline void pud_set(pud_t *pudp, unsigned long val)
894 static inline void pud_clear(pud_t *pudp)
899 static inline int pud_none(pud_t pud)
901 return !pud_raw(pud);
904 static inline int pud_present(pud_t pud)
906 return !pud_none(pud);
909 extern struct page *pud_page(pud_t pud);
910 extern struct page *pmd_page(pmd_t pmd);
911 static inline pte_t pud_pte(pud_t pud)
913 return __pte_raw(pud_raw(pud));
916 static inline pud_t pte_pud(pte_t pte)
918 return __pud_raw(pte_raw(pte));
920 #define pud_write(pud) pte_write(pud_pte(pud))
922 static inline int pud_bad(pud_t pud)
925 return radix__pud_bad(pud);
926 return hash__pud_bad(pud);
929 #define pud_access_permitted pud_access_permitted
930 static inline bool pud_access_permitted(pud_t pud, bool write)
932 return pte_access_permitted(pud_pte(pud), write);
935 #define pgd_write(pgd) pte_write(pgd_pte(pgd))
936 static inline void pgd_set(pgd_t *pgdp, unsigned long val)
941 static inline void pgd_clear(pgd_t *pgdp)
946 static inline int pgd_none(pgd_t pgd)
948 return !pgd_raw(pgd);
951 static inline int pgd_present(pgd_t pgd)
953 return !pgd_none(pgd);
956 static inline pte_t pgd_pte(pgd_t pgd)
958 return __pte_raw(pgd_raw(pgd));
961 static inline pgd_t pte_pgd(pte_t pte)
963 return __pgd_raw(pte_raw(pte));
966 static inline int pgd_bad(pgd_t pgd)
969 return radix__pgd_bad(pgd);
970 return hash__pgd_bad(pgd);
973 #define pgd_access_permitted pgd_access_permitted
974 static inline bool pgd_access_permitted(pgd_t pgd, bool write)
976 return pte_access_permitted(pgd_pte(pgd), write);
979 extern struct page *pgd_page(pgd_t pgd);
981 /* Pointers in the page table tree are physical addresses */
982 #define __pgtable_ptr_val(ptr) __pa(ptr)
984 #define pmd_page_vaddr(pmd) __va(pmd_val(pmd) & ~PMD_MASKED_BITS)
985 #define pud_page_vaddr(pud) __va(pud_val(pud) & ~PUD_MASKED_BITS)
986 #define pgd_page_vaddr(pgd) __va(pgd_val(pgd) & ~PGD_MASKED_BITS)
988 static inline unsigned long pgd_index(unsigned long address)
990 return (address >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1);
993 static inline unsigned long pud_index(unsigned long address)
995 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
998 static inline unsigned long pmd_index(unsigned long address)
1000 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
1003 static inline unsigned long pte_index(unsigned long address)
1005 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
1009 * Find an entry in a page-table-directory. We combine the address region
1010 * (the high order N bits) and the pgd portion of the address.
1013 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1015 #define pud_offset(pgdp, addr) \
1016 (((pud_t *) pgd_page_vaddr(*(pgdp))) + pud_index(addr))
1017 #define pmd_offset(pudp,addr) \
1018 (((pmd_t *) pud_page_vaddr(*(pudp))) + pmd_index(addr))
1019 #define pte_offset_kernel(dir,addr) \
1020 (((pte_t *) pmd_page_vaddr(*(dir))) + pte_index(addr))
1022 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
1023 #define pte_unmap(pte) do { } while(0)
1025 /* to find an entry in a kernel page-table-directory */
1026 /* This now only contains the vmalloc pages */
1027 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1029 #define pte_ERROR(e) \
1030 pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
1031 #define pmd_ERROR(e) \
1032 pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
1033 #define pud_ERROR(e) \
1034 pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
1035 #define pgd_ERROR(e) \
1036 pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
1038 static inline int map_kernel_page(unsigned long ea, unsigned long pa,
1039 unsigned long flags)
1041 if (radix_enabled()) {
1042 #if defined(CONFIG_PPC_RADIX_MMU) && defined(DEBUG_VM)
1043 unsigned long page_size = 1 << mmu_psize_defs[mmu_io_psize].shift;
1044 WARN((page_size != PAGE_SIZE), "I/O page size != PAGE_SIZE");
1046 return radix__map_kernel_page(ea, pa, __pgprot(flags), PAGE_SIZE);
1048 return hash__map_kernel_page(ea, pa, flags);
1051 static inline int __meminit vmemmap_create_mapping(unsigned long start,
1052 unsigned long page_size,
1055 if (radix_enabled())
1056 return radix__vmemmap_create_mapping(start, page_size, phys);
1057 return hash__vmemmap_create_mapping(start, page_size, phys);
1060 #ifdef CONFIG_MEMORY_HOTPLUG
1061 static inline void vmemmap_remove_mapping(unsigned long start,
1062 unsigned long page_size)
1064 if (radix_enabled())
1065 return radix__vmemmap_remove_mapping(start, page_size);
1066 return hash__vmemmap_remove_mapping(start, page_size);
1070 static inline pte_t pmd_pte(pmd_t pmd)
1072 return __pte_raw(pmd_raw(pmd));
1075 static inline pmd_t pte_pmd(pte_t pte)
1077 return __pmd_raw(pte_raw(pte));
1080 static inline pte_t *pmdp_ptep(pmd_t *pmd)
1082 return (pte_t *)pmd;
1084 #define pmd_pfn(pmd) pte_pfn(pmd_pte(pmd))
1085 #define pmd_dirty(pmd) pte_dirty(pmd_pte(pmd))
1086 #define pmd_young(pmd) pte_young(pmd_pte(pmd))
1087 #define pmd_mkold(pmd) pte_pmd(pte_mkold(pmd_pte(pmd)))
1088 #define pmd_wrprotect(pmd) pte_pmd(pte_wrprotect(pmd_pte(pmd)))
1089 #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
1090 #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
1091 #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
1092 #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
1093 #define pmd_mk_savedwrite(pmd) pte_pmd(pte_mk_savedwrite(pmd_pte(pmd)))
1094 #define pmd_clear_savedwrite(pmd) pte_pmd(pte_clear_savedwrite(pmd_pte(pmd)))
1096 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1097 #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
1098 #define pmd_mksoft_dirty(pmd) pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)))
1099 #define pmd_clear_soft_dirty(pmd) pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)))
1100 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
1102 #ifdef CONFIG_NUMA_BALANCING
1103 static inline int pmd_protnone(pmd_t pmd)
1105 return pte_protnone(pmd_pte(pmd));
1107 #endif /* CONFIG_NUMA_BALANCING */
1109 #define pmd_write(pmd) pte_write(pmd_pte(pmd))
1110 #define __pmd_write(pmd) __pte_write(pmd_pte(pmd))
1111 #define pmd_savedwrite(pmd) pte_savedwrite(pmd_pte(pmd))
1113 #define pmd_access_permitted pmd_access_permitted
1114 static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1116 return pte_access_permitted(pmd_pte(pmd), write);
1119 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1120 extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
1121 extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
1122 extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
1123 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1124 pmd_t *pmdp, pmd_t pmd);
1125 extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
1127 extern int hash__has_transparent_hugepage(void);
1128 static inline int has_transparent_hugepage(void)
1130 if (radix_enabled())
1131 return radix__has_transparent_hugepage();
1132 return hash__has_transparent_hugepage();
1134 #define has_transparent_hugepage has_transparent_hugepage
1136 static inline unsigned long
1137 pmd_hugepage_update(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp,
1138 unsigned long clr, unsigned long set)
1140 if (radix_enabled())
1141 return radix__pmd_hugepage_update(mm, addr, pmdp, clr, set);
1142 return hash__pmd_hugepage_update(mm, addr, pmdp, clr, set);
1145 static inline int pmd_large(pmd_t pmd)
1147 return !!(pmd_raw(pmd) & cpu_to_be64(_PAGE_PTE));
1150 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
1152 return __pmd(pmd_val(pmd) & ~_PAGE_PRESENT);
1155 * For radix we should always find H_PAGE_HASHPTE zero. Hence
1156 * the below will work for radix too
1158 static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
1159 unsigned long addr, pmd_t *pmdp)
1163 if ((pmd_raw(*pmdp) & cpu_to_be64(_PAGE_ACCESSED | H_PAGE_HASHPTE)) == 0)
1165 old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
1166 return ((old & _PAGE_ACCESSED) != 0);
1169 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1170 static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
1173 if (__pmd_write((*pmdp)))
1174 pmd_hugepage_update(mm, addr, pmdp, _PAGE_WRITE, 0);
1175 else if (unlikely(pmd_savedwrite(*pmdp)))
1176 pmd_hugepage_update(mm, addr, pmdp, 0, _PAGE_PRIVILEGED);
1179 static inline int pmd_trans_huge(pmd_t pmd)
1181 if (radix_enabled())
1182 return radix__pmd_trans_huge(pmd);
1183 return hash__pmd_trans_huge(pmd);
1186 #define __HAVE_ARCH_PMD_SAME
1187 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
1189 if (radix_enabled())
1190 return radix__pmd_same(pmd_a, pmd_b);
1191 return hash__pmd_same(pmd_a, pmd_b);
1194 static inline pmd_t pmd_mkhuge(pmd_t pmd)
1196 if (radix_enabled())
1197 return radix__pmd_mkhuge(pmd);
1198 return hash__pmd_mkhuge(pmd);
1201 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1202 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1203 unsigned long address, pmd_t *pmdp,
1204 pmd_t entry, int dirty);
1206 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1207 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1208 unsigned long address, pmd_t *pmdp);
1210 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1211 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
1212 unsigned long addr, pmd_t *pmdp)
1214 if (radix_enabled())
1215 return radix__pmdp_huge_get_and_clear(mm, addr, pmdp);
1216 return hash__pmdp_huge_get_and_clear(mm, addr, pmdp);
1219 static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
1220 unsigned long address, pmd_t *pmdp)
1222 if (radix_enabled())
1223 return radix__pmdp_collapse_flush(vma, address, pmdp);
1224 return hash__pmdp_collapse_flush(vma, address, pmdp);
1226 #define pmdp_collapse_flush pmdp_collapse_flush
1228 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1229 static inline void pgtable_trans_huge_deposit(struct mm_struct *mm,
1230 pmd_t *pmdp, pgtable_t pgtable)
1232 if (radix_enabled())
1233 return radix__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
1234 return hash__pgtable_trans_huge_deposit(mm, pmdp, pgtable);
1237 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1238 static inline pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm,
1241 if (radix_enabled())
1242 return radix__pgtable_trans_huge_withdraw(mm, pmdp);
1243 return hash__pgtable_trans_huge_withdraw(mm, pmdp);
1246 #define __HAVE_ARCH_PMDP_INVALIDATE
1247 extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
1250 #define pmd_move_must_withdraw pmd_move_must_withdraw
1252 extern int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
1253 struct spinlock *old_pmd_ptl,
1254 struct vm_area_struct *vma);
1256 * Hash translation mode use the deposited table to store hash pte
1259 #define arch_needs_pgtable_deposit arch_needs_pgtable_deposit
1260 static inline bool arch_needs_pgtable_deposit(void)
1262 if (radix_enabled())
1266 extern void serialize_against_pte_lookup(struct mm_struct *mm);
1269 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
1271 if (radix_enabled())
1272 return radix__pmd_mkdevmap(pmd);
1273 return hash__pmd_mkdevmap(pmd);
1276 static inline int pmd_devmap(pmd_t pmd)
1278 return pte_devmap(pmd_pte(pmd));
1281 static inline int pud_devmap(pud_t pud)
1286 static inline int pgd_devmap(pgd_t pgd)
1290 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1292 static inline const int pud_pfn(pud_t pud)
1295 * Currently all calls to pud_pfn() are gated around a pud_devmap()
1296 * check so this should never be used. If it grows another user we
1297 * want to know about it.
1303 #endif /* __ASSEMBLY__ */
1304 #endif /* _ASM_POWERPC_BOOK3S_64_PGTABLE_H_ */