arch/powerpc/kernel/dt_cpu_ftrs.c

   1 /*
   2  * Copyright 2017, Nicholas Piggin, IBM Corporation
   3  * Licensed under GPLv2.
   4  */
   5
   6 #define pr_fmt(fmt) "dt-cpu-ftrs: " fmt
   7
   8 #include <linux/export.h>
   9 #include <linux/init.h>
  10 #include <linux/jump_label.h>
  11 #include <linux/libfdt.h>
  12 #include <linux/memblock.h>
  13 #include <linux/printk.h>
  14 #include <linux/sched.h>
  15 #include <linux/string.h>
  16 #include <linux/threads.h>
  17
  18 #include <asm/cputable.h>
  19 #include <asm/dt_cpu_ftrs.h>
  20 #include <asm/mmu.h>
  21 #include <asm/oprofile_impl.h>
  22 #include <asm/prom.h>
  23 #include <asm/setup.h>
  24
  25
  26 /* Device-tree visible constants follow */
  27 #define ISA_V2_07B      2070
  28 #define ISA_V3_0B       3000
  29
  30 #define USABLE_PR               (1U << 0)
  31 #define USABLE_OS               (1U << 1)
  32 #define USABLE_HV               (1U << 2)
  33
  34 #define HV_SUPPORT_HFSCR        (1U << 0)
  35 #define OS_SUPPORT_FSCR         (1U << 0)
  36
  37 /* For parsing, we define all bits set as "NONE" case */
  38 #define HV_SUPPORT_NONE         0xffffffffU
  39 #define OS_SUPPORT_NONE         0xffffffffU
  40
  41 struct dt_cpu_feature {
  42         const char *name;
  43         uint32_t isa;
  44         uint32_t usable_privilege;
  45         uint32_t hv_support;
  46         uint32_t os_support;
  47         uint32_t hfscr_bit_nr;
  48         uint32_t fscr_bit_nr;
  49         uint32_t hwcap_bit_nr;
  50         /* fdt parsing */
  51         unsigned long node;
  52         int enabled;
  53         int disabled;
  54 };
  55
  56 #define CPU_FTRS_BASE \
  57            (CPU_FTR_USE_TB | \
  58             CPU_FTR_LWSYNC | \
  59             CPU_FTR_FPU_UNAVAILABLE |\
  60             CPU_FTR_NODSISRALIGN |\
  61             CPU_FTR_NOEXECUTE |\
  62             CPU_FTR_COHERENT_ICACHE | \
  63             CPU_FTR_STCX_CHECKS_ADDRESS |\
  64             CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
  65             CPU_FTR_DAWR | \
  66             CPU_FTR_ARCH_206 |\
  67             CPU_FTR_ARCH_207S)
  68
  69 #define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)
  70
  71 #define COMMON_USER_BASE        (PPC_FEATURE_32 | PPC_FEATURE_64 | \
  72                                  PPC_FEATURE_ARCH_2_06 |\
  73                                  PPC_FEATURE_ICACHE_SNOOP)
  74 #define COMMON_USER2_BASE       (PPC_FEATURE2_ARCH_2_07 | \
  75                                  PPC_FEATURE2_ISEL)
  76 /*
  77  * Set up the base CPU
  78  */
  79
  80 extern void __flush_tlb_power8(unsigned int action);
  81 extern void __flush_tlb_power9(unsigned int action);
  82 extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
  83 extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
  84
  85 static int hv_mode;
  86
  87 static struct {
  88         u64     lpcr;
  89         u64     lpcr_clear;
  90         u64     hfscr;
  91         u64     fscr;
  92 } system_registers;
  93
  94 static void (*init_pmu_registers)(void);
  95
  96 static void cpufeatures_flush_tlb(void)
  97 {
  98         /*
  99          * This is a temporary measure to keep equivalent TLB flush as the
 100          * cputable based setup code.
 101          */
 102         switch (PVR_VER(mfspr(SPRN_PVR))) {
 103         case PVR_POWER8:
 104         case PVR_POWER8E:
 105         case PVR_POWER8NVL:
 106                 __flush_tlb_power8(TLB_INVAL_SCOPE_GLOBAL);
 107                 break;
 108         case PVR_POWER9:
 109                 __flush_tlb_power9(TLB_INVAL_SCOPE_GLOBAL);
 110                 break;
 111         default:
 112                 pr_err("unknown CPU version for boot TLB flush\n");
 113                 break;
 114         }
 115 }
 116
 117 static void __restore_cpu_cpufeatures(void)
 118 {
 119         u64 lpcr;
 120
 121         /*
 122          * LPCR is restored by the power on engine already. It can be changed
 123          * after early init e.g., by radix enable, and we have no unified API
 124          * for saving and restoring such SPRs.
 125          *
 126          * This ->restore hook should really be removed from idle and register
 127          * restore moved directly into the idle restore code, because this code
 128          * doesn't know how idle is implemented or what it needs restored here.
 129          *
 130          * The best we can do to accommodate secondary boot and idle restore
 131          * for now is "or" LPCR with existing.
 132          */
 133         lpcr = mfspr(SPRN_LPCR);
 134         lpcr |= system_registers.lpcr;
 135         lpcr &= ~system_registers.lpcr_clear;
 136         mtspr(SPRN_LPCR, lpcr);
 137         if (hv_mode) {
 138                 mtspr(SPRN_LPID, 0);
 139                 mtspr(SPRN_HFSCR, system_registers.hfscr);
 140                 mtspr(SPRN_PCR, 0);
 141         }
 142         mtspr(SPRN_FSCR, system_registers.fscr);
 143
 144         if (init_pmu_registers)
 145                 init_pmu_registers();
 146
 147         cpufeatures_flush_tlb();
 148 }
 149
 150 static char dt_cpu_name[64];
 151
 152 static struct cpu_spec __initdata base_cpu_spec = {
 153         .cpu_name               = NULL,
 154         .cpu_features           = CPU_FTRS_BASE,
 155         .cpu_user_features      = COMMON_USER_BASE,
 156         .cpu_user_features2     = COMMON_USER2_BASE,
 157         .mmu_features           = 0,
 158         .icache_bsize           = 32, /* minimum block size, fixed by */
 159         .dcache_bsize           = 32, /* cache info init.             */
 160         .num_pmcs               = 0,
 161         .pmc_type               = PPC_PMC_DEFAULT,
 162         .oprofile_cpu_type      = NULL,
 163         .oprofile_type          = PPC_OPROFILE_INVALID,
 164         .cpu_setup              = NULL,
 165         .cpu_restore            = __restore_cpu_cpufeatures,
 166         .flush_tlb              = NULL,
 167         .machine_check_early    = NULL,
 168         .platform               = NULL,
 169 };
 170
 171 static void __init cpufeatures_setup_cpu(void)
 172 {
 173         set_cur_cpu_spec(&base_cpu_spec);
 174
 175         cur_cpu_spec->pvr_mask = -1;
 176         cur_cpu_spec->pvr_value = mfspr(SPRN_PVR);
 177
 178         /* Initialize the base environment -- clear FSCR/HFSCR.  */
 179         hv_mode = !!(mfmsr() & MSR_HV);
 180         if (hv_mode) {
 181                 /* CPU_FTR_HVMODE is used early in PACA setup */
 182                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 183                 mtspr(SPRN_HFSCR, 0);
 184         }
 185         mtspr(SPRN_FSCR, 0);
 186
 187         /*
 188          * LPCR does not get cleared, to match behaviour with secondaries
 189          * in __restore_cpu_cpufeatures. Once the idle code is fixed, this
 190          * could clear LPCR too.
 191          */
 192 }
 193
 194 static int __init feat_try_enable_unknown(struct dt_cpu_feature *f)
 195 {
 196         if (f->hv_support == HV_SUPPORT_NONE) {
 197         } else if (f->hv_support & HV_SUPPORT_HFSCR) {
 198                 u64 hfscr = mfspr(SPRN_HFSCR);
 199                 hfscr |= 1UL << f->hfscr_bit_nr;
 200                 mtspr(SPRN_HFSCR, hfscr);
 201         } else {
 202                 /* Does not have a known recipe */
 203                 return 0;
 204         }
 205
 206         if (f->os_support == OS_SUPPORT_NONE) {
 207         } else if (f->os_support & OS_SUPPORT_FSCR) {
 208                 u64 fscr = mfspr(SPRN_FSCR);
 209                 fscr |= 1UL << f->fscr_bit_nr;
 210                 mtspr(SPRN_FSCR, fscr);
 211         } else {
 212                 /* Does not have a known recipe */
 213                 return 0;
 214         }
 215
 216         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 217                 uint32_t word = f->hwcap_bit_nr / 32;
 218                 uint32_t bit = f->hwcap_bit_nr % 32;
 219
 220                 if (word == 0)
 221                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 222                 else if (word == 1)
 223                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 224                 else
 225                         pr_err("%s could not advertise to user (no hwcap bits)\n", f->name);
 226         }
 227
 228         return 1;
 229 }
 230
 231 static int __init feat_enable(struct dt_cpu_feature *f)
 232 {
 233         if (f->hv_support != HV_SUPPORT_NONE) {
 234                 if (f->hfscr_bit_nr != -1) {
 235                         u64 hfscr = mfspr(SPRN_HFSCR);
 236                         hfscr |= 1UL << f->hfscr_bit_nr;
 237                         mtspr(SPRN_HFSCR, hfscr);
 238                 }
 239         }
 240
 241         if (f->os_support != OS_SUPPORT_NONE) {
 242                 if (f->fscr_bit_nr != -1) {
 243                         u64 fscr = mfspr(SPRN_FSCR);
 244                         fscr |= 1UL << f->fscr_bit_nr;
 245                         mtspr(SPRN_FSCR, fscr);
 246                 }
 247         }
 248
 249         if ((f->usable_privilege & USABLE_PR) && (f->hwcap_bit_nr != -1)) {
 250                 uint32_t word = f->hwcap_bit_nr / 32;
 251                 uint32_t bit = f->hwcap_bit_nr % 32;
 252
 253                 if (word == 0)
 254                         cur_cpu_spec->cpu_user_features |= 1U << bit;
 255                 else if (word == 1)
 256                         cur_cpu_spec->cpu_user_features2 |= 1U << bit;
 257                 else
 258                         pr_err("CPU feature: %s could not advertise to user (no hwcap bits)\n", f->name);
 259         }
 260
 261         return 1;
 262 }
 263
 264 static int __init feat_disable(struct dt_cpu_feature *f)
 265 {
 266         return 0;
 267 }
 268
 269 static int __init feat_enable_hv(struct dt_cpu_feature *f)
 270 {
 271         u64 lpcr;
 272
 273         if (!hv_mode) {
 274                 pr_err("CPU feature hypervisor present in device tree but HV mode not enabled in the CPU. Ignoring.\n");
 275                 return 0;
 276         }
 277
 278         mtspr(SPRN_LPID, 0);
 279
 280         lpcr = mfspr(SPRN_LPCR);
 281         lpcr &=  ~LPCR_LPES0; /* HV external interrupts */
 282         mtspr(SPRN_LPCR, lpcr);
 283
 284         cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 285
 286         return 1;
 287 }
 288
 289 static int __init feat_enable_le(struct dt_cpu_feature *f)
 290 {
 291         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_TRUE_LE;
 292         return 1;
 293 }
 294
 295 static int __init feat_enable_smt(struct dt_cpu_feature *f)
 296 {
 297         cur_cpu_spec->cpu_features |= CPU_FTR_SMT;
 298         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_SMT;
 299         return 1;
 300 }
 301
 302 static int __init feat_enable_idle_nap(struct dt_cpu_feature *f)
 303 {
 304         u64 lpcr;
 305
 306         /* Set PECE wakeup modes for ISA 207 */
 307         lpcr = mfspr(SPRN_LPCR);
 308         lpcr |=  LPCR_PECE0;
 309         lpcr |=  LPCR_PECE1;
 310         lpcr |=  LPCR_PECE2;
 311         mtspr(SPRN_LPCR, lpcr);
 312
 313         return 1;
 314 }
 315
 316 static int __init feat_enable_align_dsisr(struct dt_cpu_feature *f)
 317 {
 318         cur_cpu_spec->cpu_features &= ~CPU_FTR_NODSISRALIGN;
 319
 320         return 1;
 321 }
 322
 323 static int __init feat_enable_idle_stop(struct dt_cpu_feature *f)
 324 {
 325         u64 lpcr;
 326
 327         /* Set PECE wakeup modes for ISAv3.0B */
 328         lpcr = mfspr(SPRN_LPCR);
 329         lpcr |=  LPCR_PECE0;
 330         lpcr |=  LPCR_PECE1;
 331         lpcr |=  LPCR_PECE2;
 332         mtspr(SPRN_LPCR, lpcr);
 333
 334         return 1;
 335 }
 336
 337 static int __init feat_enable_mmu_hash(struct dt_cpu_feature *f)
 338 {
 339         u64 lpcr;
 340
 341         lpcr = mfspr(SPRN_LPCR);
 342         lpcr &= ~LPCR_ISL;
 343
 344         /* VRMASD */
 345         lpcr |= LPCR_VPM0;
 346         lpcr &= ~LPCR_VPM1;
 347         lpcr |= 0x10UL << LPCR_VRMASD_SH; /* L=1 LP=00 */
 348         mtspr(SPRN_LPCR, lpcr);
 349
 350         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 351         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 352
 353         return 1;
 354 }
 355
 356 static int __init feat_enable_mmu_hash_v3(struct dt_cpu_feature *f)
 357 {
 358         u64 lpcr;
 359
 360         system_registers.lpcr_clear |= (LPCR_ISL | LPCR_UPRT | LPCR_HR);
 361         lpcr = mfspr(SPRN_LPCR);
 362         lpcr &= ~(LPCR_ISL | LPCR_UPRT | LPCR_HR);
 363         mtspr(SPRN_LPCR, lpcr);
 364
 365         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 366         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 367
 368         return 1;
 369 }
 370
 371
 372 static int __init feat_enable_mmu_radix(struct dt_cpu_feature *f)
 373 {
 374 #ifdef CONFIG_PPC_RADIX_MMU
 375         cur_cpu_spec->mmu_features |= MMU_FTR_TYPE_RADIX;
 376         cur_cpu_spec->mmu_features |= MMU_FTRS_HASH_BASE;
 377         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_MMU;
 378
 379         return 1;
 380 #endif
 381         return 0;
 382 }
 383
 384 static int __init feat_enable_dscr(struct dt_cpu_feature *f)
 385 {
 386         u64 lpcr;
 387
 388         /*
 389          * Linux relies on FSCR[DSCR] being clear, so that we can take the
 390          * facility unavailable interrupt and track the task's usage of DSCR.
 391          * See facility_unavailable_exception().
 392          * Clear the bit here so that feat_enable() doesn't set it.
 393          */
 394         f->fscr_bit_nr = -1;
 395
 396         feat_enable(f);
 397
 398         lpcr = mfspr(SPRN_LPCR);
 399         lpcr &= ~LPCR_DPFD;
 400         lpcr |=  (4UL << LPCR_DPFD_SH);
 401         mtspr(SPRN_LPCR, lpcr);
 402
 403         return 1;
 404 }
 405
 406 static void hfscr_pmu_enable(void)
 407 {
 408         u64 hfscr = mfspr(SPRN_HFSCR);
 409         hfscr |= PPC_BIT(60);
 410         mtspr(SPRN_HFSCR, hfscr);
 411 }
 412
 413 static void init_pmu_power8(void)
 414 {
 415         if (hv_mode) {
 416                 mtspr(SPRN_MMCRC, 0);
 417                 mtspr(SPRN_MMCRH, 0);
 418         }
 419
 420         mtspr(SPRN_MMCRA, 0);
 421         mtspr(SPRN_MMCR0, 0);
 422         mtspr(SPRN_MMCR1, 0);
 423         mtspr(SPRN_MMCR2, 0);
 424         mtspr(SPRN_MMCRS, 0);
 425 }
 426
 427 static int __init feat_enable_mce_power8(struct dt_cpu_feature *f)
 428 {
 429         cur_cpu_spec->platform = "power8";
 430         cur_cpu_spec->flush_tlb = __flush_tlb_power8;
 431         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p8;
 432
 433         return 1;
 434 }
 435
 436 static int __init feat_enable_pmu_power8(struct dt_cpu_feature *f)
 437 {
 438         hfscr_pmu_enable();
 439
 440         init_pmu_power8();
 441         init_pmu_registers = init_pmu_power8;
 442
 443         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 444         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 445         if (pvr_version_is(PVR_POWER8E))
 446                 cur_cpu_spec->cpu_features |= CPU_FTR_PMAO_BUG;
 447
 448         cur_cpu_spec->num_pmcs          = 6;
 449         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 450         cur_cpu_spec->oprofile_cpu_type = "ppc64/power8";
 451
 452         return 1;
 453 }
 454
 455 static void init_pmu_power9(void)
 456 {
 457         if (hv_mode)
 458                 mtspr(SPRN_MMCRC, 0);
 459
 460         mtspr(SPRN_MMCRA, 0);
 461         mtspr(SPRN_MMCR0, 0);
 462         mtspr(SPRN_MMCR1, 0);
 463         mtspr(SPRN_MMCR2, 0);
 464 }
 465
 466 static int __init feat_enable_mce_power9(struct dt_cpu_feature *f)
 467 {
 468         cur_cpu_spec->platform = "power9";
 469         cur_cpu_spec->flush_tlb = __flush_tlb_power9;
 470         cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p9;
 471
 472         return 1;
 473 }
 474
 475 static int __init feat_enable_pmu_power9(struct dt_cpu_feature *f)
 476 {
 477         hfscr_pmu_enable();
 478
 479         init_pmu_power9();
 480         init_pmu_registers = init_pmu_power9;
 481
 482         cur_cpu_spec->cpu_features |= CPU_FTR_MMCRA;
 483         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_PSERIES_PERFMON_COMPAT;
 484
 485         cur_cpu_spec->num_pmcs          = 6;
 486         cur_cpu_spec->pmc_type          = PPC_PMC_IBM;
 487         cur_cpu_spec->oprofile_cpu_type = "ppc64/power9";
 488
 489         return 1;
 490 }
 491
 492 static int __init feat_enable_tm(struct dt_cpu_feature *f)
 493 {
 494 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 495         feat_enable(f);
 496         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NOSC;
 497         return 1;
 498 #endif
 499         return 0;
 500 }
 501
 502 static int __init feat_enable_fp(struct dt_cpu_feature *f)
 503 {
 504         feat_enable(f);
 505         cur_cpu_spec->cpu_features &= ~CPU_FTR_FPU_UNAVAILABLE;
 506
 507         return 1;
 508 }
 509
 510 static int __init feat_enable_vector(struct dt_cpu_feature *f)
 511 {
 512 #ifdef CONFIG_ALTIVEC
 513         feat_enable(f);
 514         cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
 515         cur_cpu_spec->cpu_features |= CPU_FTR_VMX_COPY;
 516         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
 517
 518         return 1;
 519 #endif
 520         return 0;
 521 }
 522
 523 static int __init feat_enable_vsx(struct dt_cpu_feature *f)
 524 {
 525 #ifdef CONFIG_VSX
 526         feat_enable(f);
 527         cur_cpu_spec->cpu_features |= CPU_FTR_VSX;
 528         cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_VSX;
 529
 530         return 1;
 531 #endif
 532         return 0;
 533 }
 534
 535 static int __init feat_enable_purr(struct dt_cpu_feature *f)
 536 {
 537         cur_cpu_spec->cpu_features |= CPU_FTR_PURR | CPU_FTR_SPURR;
 538
 539         return 1;
 540 }
 541
 542 static int __init feat_enable_ebb(struct dt_cpu_feature *f)
 543 {
 544         /*
 545          * PPC_FEATURE2_EBB is enabled in PMU init code because it has
 546          * historically been related to the PMU facility. This may have
 547          * to be decoupled if EBB becomes more generic. For now, follow
 548          * existing convention.
 549          */
 550         f->hwcap_bit_nr = -1;
 551         feat_enable(f);
 552
 553         return 1;
 554 }
 555
 556 static int __init feat_enable_dbell(struct dt_cpu_feature *f)
 557 {
 558         u64 lpcr;
 559
 560         /* P9 has an HFSCR for privileged state */
 561         feat_enable(f);
 562
 563         cur_cpu_spec->cpu_features |= CPU_FTR_DBELL;
 564
 565         lpcr = mfspr(SPRN_LPCR);
 566         lpcr |=  LPCR_PECEDH; /* hyp doorbell wakeup */
 567         mtspr(SPRN_LPCR, lpcr);
 568
 569         return 1;
 570 }
 571
 572 static int __init feat_enable_hvi(struct dt_cpu_feature *f)
 573 {
 574         u64 lpcr;
 575
 576         /*
 577          * POWER9 XIVE interrupts including in OPAL XICS compatibility
 578          * are always delivered as hypervisor virtualization interrupts (HVI)
 579          * rather than EE.
 580          *
 581          * However LPES0 is not set here, in the chance that an EE does get
 582          * delivered to the host somehow, the EE handler would not expect it
 583          * to be delivered in LPES0 mode (e.g., using SRR[01]). This could
 584          * happen if there is a bug in interrupt controller code, or IC is
 585          * misconfigured in systemsim.
 586          */
 587
 588         lpcr = mfspr(SPRN_LPCR);
 589         lpcr |= LPCR_HVICE;     /* enable hvi interrupts */
 590         lpcr |= LPCR_HEIC;      /* disable ee interrupts when MSR_HV */
 591         lpcr |= LPCR_PECE_HVEE; /* hvi can wake from stop */
 592         mtspr(SPRN_LPCR, lpcr);
 593
 594         return 1;
 595 }
 596
 597 static int __init feat_enable_large_ci(struct dt_cpu_feature *f)
 598 {
 599         cur_cpu_spec->mmu_features |= MMU_FTR_CI_LARGE_PAGE;
 600
 601         return 1;
 602 }
 603
 604 struct dt_cpu_feature_match {
 605         const char *name;
 606         int (*enable)(struct dt_cpu_feature *f);
 607         u64 cpu_ftr_bit_mask;
 608 };
 609
 610 static struct dt_cpu_feature_match __initdata
 611                 dt_cpu_feature_match_table[] = {
 612         {"hypervisor", feat_enable_hv, 0},
 613         {"big-endian", feat_enable, 0},
 614         {"little-endian", feat_enable_le, CPU_FTR_REAL_LE},
 615         {"smt", feat_enable_smt, 0},
 616         {"interrupt-facilities", feat_enable, 0},
 617         {"timer-facilities", feat_enable, 0},
 618         {"timer-facilities-v3", feat_enable, 0},
 619         {"debug-facilities", feat_enable, 0},
 620         {"come-from-address-register", feat_enable, CPU_FTR_CFAR},
 621         {"branch-tracing", feat_enable, 0},
 622         {"floating-point", feat_enable_fp, 0},
 623         {"vector", feat_enable_vector, 0},
 624         {"vector-scalar", feat_enable_vsx, 0},
 625         {"vector-scalar-v3", feat_enable, 0},
 626         {"decimal-floating-point", feat_enable, 0},
 627         {"decimal-integer", feat_enable, 0},
 628         {"quadword-load-store", feat_enable, 0},
 629         {"vector-crypto", feat_enable, 0},
 630         {"mmu-hash", feat_enable_mmu_hash, 0},
 631         {"mmu-radix", feat_enable_mmu_radix, 0},
 632         {"mmu-hash-v3", feat_enable_mmu_hash_v3, 0},
 633         {"virtual-page-class-key-protection", feat_enable, 0},
 634         {"transactional-memory", feat_enable_tm, CPU_FTR_TM},
 635         {"transactional-memory-v3", feat_enable_tm, 0},
 636         {"idle-nap", feat_enable_idle_nap, 0},
 637         {"alignment-interrupt-dsisr", feat_enable_align_dsisr, 0},
 638         {"idle-stop", feat_enable_idle_stop, 0},
 639         {"machine-check-power8", feat_enable_mce_power8, 0},
 640         {"performance-monitor-power8", feat_enable_pmu_power8, 0},
 641         {"data-stream-control-register", feat_enable_dscr, CPU_FTR_DSCR},
 642         {"event-based-branch", feat_enable_ebb, 0},
 643         {"target-address-register", feat_enable, 0},
 644         {"branch-history-rolling-buffer", feat_enable, 0},
 645         {"control-register", feat_enable, CPU_FTR_CTRL},
 646         {"processor-control-facility", feat_enable_dbell, CPU_FTR_DBELL},
 647         {"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
 648         {"processor-utilization-of-resources-register", feat_enable_purr, 0},
 649         {"no-execute", feat_enable, 0},
 650         {"strong-access-ordering", feat_enable, CPU_FTR_SAO},
 651         {"cache-inhibited-large-page", feat_enable_large_ci, 0},
 652         {"coprocessor-icswx", feat_enable, CPU_FTR_ICSWX},
 653         {"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},
 654         {"program-priority-register", feat_enable, CPU_FTR_HAS_PPR},
 655         {"wait", feat_enable, 0},
 656         {"atomic-memory-operations", feat_enable, 0},
 657         {"branch-v3", feat_enable, 0},
 658         {"copy-paste", feat_enable, 0},
 659         {"decimal-floating-point-v3", feat_enable, 0},
 660         {"decimal-integer-v3", feat_enable, 0},
 661         {"fixed-point-v3", feat_enable, 0},
 662         {"floating-point-v3", feat_enable, 0},
 663         {"group-start-register", feat_enable, 0},
 664         {"pc-relative-addressing", feat_enable, 0},
 665         {"machine-check-power9", feat_enable_mce_power9, 0},
 666         {"performance-monitor-power9", feat_enable_pmu_power9, 0},
 667         {"event-based-branch-v3", feat_enable, 0},
 668         {"random-number-generator", feat_enable, 0},
 669         {"system-call-vectored", feat_disable, 0},
 670         {"trace-interrupt-v3", feat_enable, 0},
 671         {"vector-v3", feat_enable, 0},
 672         {"vector-binary128", feat_enable, 0},
 673         {"vector-binary16", feat_enable, 0},
 674         {"wait-v3", feat_enable, 0},
 675 };
 676
 677 static bool __initdata using_dt_cpu_ftrs;
 678 static bool __initdata enable_unknown = true;
 679
 680 static int __init dt_cpu_ftrs_parse(char *str)
 681 {
 682         if (!str)
 683                 return 0;
 684
 685         if (!strcmp(str, "off"))
 686                 using_dt_cpu_ftrs = false;
 687         else if (!strcmp(str, "known"))
 688                 enable_unknown = false;
 689         else
 690                 return 1;
 691
 692         return 0;
 693 }
 694 early_param("dt_cpu_ftrs", dt_cpu_ftrs_parse);
 695
 696 static void __init cpufeatures_setup_start(u32 isa)
 697 {
 698         pr_info("setup for ISA %d\n", isa);
 699
 700         if (isa >= 3000) {
 701                 cur_cpu_spec->cpu_features |= CPU_FTR_ARCH_300;
 702                 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_ARCH_3_00;
 703         }
 704 }
 705
 706 static bool __init cpufeatures_process_feature(struct dt_cpu_feature *f)
 707 {
 708         const struct dt_cpu_feature_match *m;
 709         bool known = false;
 710         int i;
 711
 712         for (i = 0; i < ARRAY_SIZE(dt_cpu_feature_match_table); i++) {
 713                 m = &dt_cpu_feature_match_table[i];
 714                 if (!strcmp(f->name, m->name)) {
 715                         known = true;
 716                         if (m->enable(f)) {
 717                                 cur_cpu_spec->cpu_features |= m->cpu_ftr_bit_mask;
 718                                 break;
 719                         }
 720
 721                         pr_info("not enabling: %s (disabled or unsupported by kernel)\n",
 722                                 f->name);
 723                         return false;
 724                 }
 725         }
 726
 727         if (!known && (!enable_unknown || !feat_try_enable_unknown(f))) {
 728                 pr_info("not enabling: %s (unknown and unsupported by kernel)\n",
 729                         f->name);
 730                 return false;
 731         }
 732
 733         if (known)
 734                 pr_debug("enabling: %s\n", f->name);
 735         else
 736                 pr_debug("enabling: %s (unknown)\n", f->name);
 737
 738         return true;
 739 }
 740
 741 /*
 742  * Handle POWER9 broadcast tlbie invalidation issue using
 743  * cpu feature flag.
 744  */
 745 static __init void update_tlbie_feature_flag(unsigned long pvr)
 746 {
 747         if (PVR_VER(pvr) == PVR_POWER9) {
 748                 /*
 749                  * Set the tlbie feature flag for anything below
 750                  * Nimbus DD 2.3 and Cumulus DD 1.3
 751                  */
 752                 if ((pvr & 0xe000) == 0) {
 753                         /* Nimbus */
 754                         if ((pvr & 0xfff) < 0x203)
 755                                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 756                 } else if ((pvr & 0xc000) == 0) {
 757                         /* Cumulus */
 758                         if ((pvr & 0xfff) < 0x103)
 759                                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 760                 } else {
 761                         WARN_ONCE(1, "Unknown PVR");
 762                         cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_STQ_BUG;
 763                 }
 764
 765                 cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_ERAT_BUG;
 766         }
 767 }
 768
 769 static __init void cpufeatures_cpu_quirks(void)
 770 {
 771         unsigned long version = mfspr(SPRN_PVR);
 772
 773         /*
 774          * Not all quirks can be derived from the cpufeatures device tree.
 775          */
 776         if ((version & 0xffffff00) == 0x004e0100)
 777                 cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
 778
 779         update_tlbie_feature_flag(version);
 780 }
 781
 782 static void __init cpufeatures_setup_finished(void)
 783 {
 784         cpufeatures_cpu_quirks();
 785
 786         if (hv_mode && !(cur_cpu_spec->cpu_features & CPU_FTR_HVMODE)) {
 787                 pr_err("hypervisor not present in device tree but HV mode is enabled in the CPU. Enabling.\n");
 788                 cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
 789         }
 790
 791         system_registers.lpcr = mfspr(SPRN_LPCR);
 792         system_registers.hfscr = mfspr(SPRN_HFSCR);
 793         system_registers.fscr = mfspr(SPRN_FSCR);
 794
 795         cpufeatures_flush_tlb();
 796
 797         pr_info("final cpu/mmu features = 0x%016lx 0x%08x\n",
 798                 cur_cpu_spec->cpu_features, cur_cpu_spec->mmu_features);
 799 }
 800
 801 static int __init disabled_on_cmdline(void)
 802 {
 803         unsigned long root, chosen;
 804         const char *p;
 805
 806         root = of_get_flat_dt_root();
 807         chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
 808         if (chosen == -FDT_ERR_NOTFOUND)
 809                 return false;
 810
 811         p = of_get_flat_dt_prop(chosen, "bootargs", NULL);
 812         if (!p)
 813                 return false;
 814
 815         if (strstr(p, "dt_cpu_ftrs=off"))
 816                 return true;
 817
 818         return false;
 819 }
 820
 821 static int __init fdt_find_cpu_features(unsigned long node, const char *uname,
 822                                         int depth, void *data)
 823 {
 824         if (of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features")
 825             && of_get_flat_dt_prop(node, "isa", NULL))
 826                 return 1;
 827
 828         return 0;
 829 }
 830
 831 bool __init dt_cpu_ftrs_in_use(void)
 832 {
 833         return using_dt_cpu_ftrs;
 834 }
 835
 836 bool __init dt_cpu_ftrs_init(void *fdt)
 837 {
 838         using_dt_cpu_ftrs = false;
 839
 840         /* Setup and verify the FDT, if it fails we just bail */
 841         if (!early_init_dt_verify(fdt))
 842                 return false;
 843
 844         if (!of_scan_flat_dt(fdt_find_cpu_features, NULL))
 845                 return false;
 846
 847         if (disabled_on_cmdline())
 848                 return false;
 849
 850         cpufeatures_setup_cpu();
 851
 852         using_dt_cpu_ftrs = true;
 853         return true;
 854 }
 855
 856 static int nr_dt_cpu_features;
 857 static struct dt_cpu_feature *dt_cpu_features;
 858
 859 static int __init process_cpufeatures_node(unsigned long node,
 860                                           const char *uname, int i)
 861 {
 862         const __be32 *prop;
 863         struct dt_cpu_feature *f;
 864         int len;
 865
 866         f = &dt_cpu_features[i];
 867         memset(f, 0, sizeof(struct dt_cpu_feature));
 868
 869         f->node = node;
 870
 871         f->name = uname;
 872
 873         prop = of_get_flat_dt_prop(node, "isa", &len);
 874         if (!prop) {
 875                 pr_warn("%s: missing isa property\n", uname);
 876                 return 0;
 877         }
 878         f->isa = be32_to_cpup(prop);
 879
 880         prop = of_get_flat_dt_prop(node, "usable-privilege", &len);
 881         if (!prop) {
 882                 pr_warn("%s: missing usable-privilege property", uname);
 883                 return 0;
 884         }
 885         f->usable_privilege = be32_to_cpup(prop);
 886
 887         prop = of_get_flat_dt_prop(node, "hv-support", &len);
 888         if (prop)
 889                 f->hv_support = be32_to_cpup(prop);
 890         else
 891                 f->hv_support = HV_SUPPORT_NONE;
 892
 893         prop = of_get_flat_dt_prop(node, "os-support", &len);
 894         if (prop)
 895                 f->os_support = be32_to_cpup(prop);
 896         else
 897                 f->os_support = OS_SUPPORT_NONE;
 898
 899         prop = of_get_flat_dt_prop(node, "hfscr-bit-nr", &len);
 900         if (prop)
 901                 f->hfscr_bit_nr = be32_to_cpup(prop);
 902         else
 903                 f->hfscr_bit_nr = -1;
 904         prop = of_get_flat_dt_prop(node, "fscr-bit-nr", &len);
 905         if (prop)
 906                 f->fscr_bit_nr = be32_to_cpup(prop);
 907         else
 908                 f->fscr_bit_nr = -1;
 909         prop = of_get_flat_dt_prop(node, "hwcap-bit-nr", &len);
 910         if (prop)
 911                 f->hwcap_bit_nr = be32_to_cpup(prop);
 912         else
 913                 f->hwcap_bit_nr = -1;
 914
 915         if (f->usable_privilege & USABLE_HV) {
 916                 if (!(mfmsr() & MSR_HV)) {
 917                         pr_warn("%s: HV feature passed to guest\n", uname);
 918                         return 0;
 919                 }
 920
 921                 if (f->hv_support == HV_SUPPORT_NONE && f->hfscr_bit_nr != -1) {
 922                         pr_warn("%s: unwanted hfscr_bit_nr\n", uname);
 923                         return 0;
 924                 }
 925
 926                 if (f->hv_support == HV_SUPPORT_HFSCR) {
 927                         if (f->hfscr_bit_nr == -1) {
 928                                 pr_warn("%s: missing hfscr_bit_nr\n", uname);
 929                                 return 0;
 930                         }
 931                 }
 932         } else {
 933                 if (f->hv_support != HV_SUPPORT_NONE || f->hfscr_bit_nr != -1) {
 934                         pr_warn("%s: unwanted hv_support/hfscr_bit_nr\n", uname);
 935                         return 0;
 936                 }
 937         }
 938
 939         if (f->usable_privilege & USABLE_OS) {
 940                 if (f->os_support == OS_SUPPORT_NONE && f->fscr_bit_nr != -1) {
 941                         pr_warn("%s: unwanted fscr_bit_nr\n", uname);
 942                         return 0;
 943                 }
 944
 945                 if (f->os_support == OS_SUPPORT_FSCR) {
 946                         if (f->fscr_bit_nr == -1) {
 947                                 pr_warn("%s: missing fscr_bit_nr\n", uname);
 948                                 return 0;
 949                         }
 950                 }
 951         } else {
 952                 if (f->os_support != OS_SUPPORT_NONE || f->fscr_bit_nr != -1) {
 953                         pr_warn("%s: unwanted os_support/fscr_bit_nr\n", uname);
 954                         return 0;
 955                 }
 956         }
 957
 958         if (!(f->usable_privilege & USABLE_PR)) {
 959                 if (f->hwcap_bit_nr != -1) {
 960                         pr_warn("%s: unwanted hwcap_bit_nr\n", uname);
 961                         return 0;
 962                 }
 963         }
 964
 965         /* Do all the independent features in the first pass */
 966         if (!of_get_flat_dt_prop(node, "dependencies", &len)) {
 967                 if (cpufeatures_process_feature(f))
 968                         f->enabled = 1;
 969                 else
 970                         f->disabled = 1;
 971         }
 972
 973         return 0;
 974 }
 975
 976 static void __init cpufeatures_deps_enable(struct dt_cpu_feature *f)
 977 {
 978         const __be32 *prop;
 979         int len;
 980         int nr_deps;
 981         int i;
 982
 983         if (f->enabled || f->disabled)
 984                 return;
 985
 986         prop = of_get_flat_dt_prop(f->node, "dependencies", &len);
 987         if (!prop) {
 988                 pr_warn("%s: missing dependencies property", f->name);
 989                 return;
 990         }
 991
 992         nr_deps = len / sizeof(int);
 993
 994         for (i = 0; i < nr_deps; i++) {
 995                 unsigned long phandle = be32_to_cpu(prop[i]);
 996                 int j;
 997
 998                 for (j = 0; j < nr_dt_cpu_features; j++) {
 999                         struct dt_cpu_feature *d = &dt_cpu_features[j];
1000
1001                         if (of_get_flat_dt_phandle(d->node) == phandle) {
1002                                 cpufeatures_deps_enable(d);
1003                                 if (d->disabled) {
1004                                         f->disabled = 1;
1005                                         return;
1006                                 }
1007                         }
1008                 }
1009         }
1010
1011         if (cpufeatures_process_feature(f))
1012                 f->enabled = 1;
1013         else
1014                 f->disabled = 1;
1015 }
1016
1017 static int __init scan_cpufeatures_subnodes(unsigned long node,
1018                                           const char *uname,
1019                                           void *data)
1020 {
1021         int *count = data;
1022
1023         process_cpufeatures_node(node, uname, *count);
1024
1025         (*count)++;
1026
1027         return 0;
1028 }
1029
1030 static int __init count_cpufeatures_subnodes(unsigned long node,
1031                                           const char *uname,
1032                                           void *data)
1033 {
1034         int *count = data;
1035
1036         (*count)++;
1037
1038         return 0;
1039 }
1040
1041 static int __init dt_cpu_ftrs_scan_callback(unsigned long node, const char
1042                                             *uname, int depth, void *data)
1043 {
1044         const __be32 *prop;
1045         int count, i;
1046         u32 isa;
1047
1048         /* We are scanning "ibm,powerpc-cpu-features" nodes only */
1049         if (!of_flat_dt_is_compatible(node, "ibm,powerpc-cpu-features"))
1050                 return 0;
1051
1052         prop = of_get_flat_dt_prop(node, "isa", NULL);
1053         if (!prop)
1054                 /* We checked before, "can't happen" */
1055                 return 0;
1056
1057         isa = be32_to_cpup(prop);
1058
1059         /* Count and allocate space for cpu features */
1060         of_scan_flat_dt_subnodes(node, count_cpufeatures_subnodes,
1061                                                 &nr_dt_cpu_features);
1062         dt_cpu_features = __va(
1063                 memblock_alloc(sizeof(struct dt_cpu_feature)*
1064                                 nr_dt_cpu_features, PAGE_SIZE));
1065
1066         cpufeatures_setup_start(isa);
1067
1068         /* Scan nodes into dt_cpu_features and enable those without deps  */
1069         count = 0;
1070         of_scan_flat_dt_subnodes(node, scan_cpufeatures_subnodes, &count);
1071
1072         /* Recursive enable remaining features with dependencies */
1073         for (i = 0; i < nr_dt_cpu_features; i++) {
1074                 struct dt_cpu_feature *f = &dt_cpu_features[i];
1075
1076                 cpufeatures_deps_enable(f);
1077         }
1078
1079         prop = of_get_flat_dt_prop(node, "display-name", NULL);
1080         if (prop && strlen((char *)prop) != 0) {
1081                 strlcpy(dt_cpu_name, (char *)prop, sizeof(dt_cpu_name));
1082                 cur_cpu_spec->cpu_name = dt_cpu_name;
1083         }
1084
1085         cpufeatures_setup_finished();
1086
1087         memblock_free(__pa(dt_cpu_features),
1088                         sizeof(struct dt_cpu_feature)*nr_dt_cpu_features);
1089
1090         return 0;
1091 }
1092
1093 void __init dt_cpu_ftrs_scan(void)
1094 {
1095         if (!using_dt_cpu_ftrs)
1096                 return;
1097
1098         of_scan_flat_dt(dt_cpu_ftrs_scan_callback, NULL);
1099 }