2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
18 #include <asm/cpuidle.h>
21 * We layout physical memory as follows:
22 * 0x0000 - 0x00ff : Secondary processor spin code
23 * 0x0100 - 0x17ff : pSeries Interrupt prologs
24 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
25 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
26 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
27 * 0x7000 - 0x7fff : FWNMI data area
28 * 0x8000 - 0x8fff : Initial (CPU0) segment table
29 * 0x9000 - : Early init and support code
31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
32 #define SYSCALL_PSERIES_1 \
36 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
39 INTERRUPT_TO_KERNEL ; \
40 mfspr r11,SPRN_SRR0 ; \
43 #define SYSCALL_PSERIES_2_RFID \
44 mfspr r12,SPRN_SRR1 ; \
45 ld r10,PACAKBASE(r13) ; \
46 LOAD_HANDLER(r10, system_call_entry) ; \
47 mtspr SPRN_SRR0,r10 ; \
48 ld r10,PACAKMSR(r13) ; \
49 mtspr SPRN_SRR1,r10 ; \
51 b . ; /* prevent speculative execution */
53 #define SYSCALL_PSERIES_3 \
54 /* Fast LE/BE switch system call */ \
55 1: mfspr r12,SPRN_SRR1 ; \
56 xori r12,r12,MSR_LE ; \
57 mtspr SPRN_SRR1,r12 ; \
58 RFI_TO_USER ; /* return to userspace */ \
59 b . ; /* prevent speculative execution */
61 #if defined(CONFIG_RELOCATABLE)
63 * We can't branch directly so we do it via the CTR which
64 * is volatile across system calls.
66 #define SYSCALL_PSERIES_2_DIRECT \
68 ld r12,PACAKBASE(r13) ; \
69 LOAD_HANDLER(r12, system_call_entry) ; \
71 mfspr r12,SPRN_SRR1 ; \
72 /* Re-use of r13... No spare regs to do this */ \
75 GET_PACA(r13) ; /* get r13 back */ \
78 /* We can branch directly */
79 #define SYSCALL_PSERIES_2_DIRECT \
80 mfspr r12,SPRN_SRR1 ; \
82 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
83 b system_call_common ;
87 * This is the start of the interrupt handlers for pSeries
88 * This code runs with relocation off.
89 * Code from here to __end_interrupts gets copied down to real
90 * address 0x100 when we are running a relocatable kernel.
91 * Therefore any relative branches in this section must only
92 * branch to labels in this section.
95 .globl __start_interrupts
98 .globl system_reset_pSeries;
100 HMT_MEDIUM_PPR_DISCARD
102 #ifdef CONFIG_PPC_P7_NAP
104 /* Running native on arch 2.06 or later, check if we are
105 * waking up from nap/sleep/winkle.
108 rlwinm. r13,r13,47-31,30,31
114 * Check if last bit of HSPGR0 is set. This indicates whether we are
115 * waking up from winkle.
121 mtspr SPRN_HSPRG0,r13
123 lbz r0,PACA_THREAD_IDLE_STATE(r13)
124 cmpwi cr2,r0,PNV_THREAD_NAP
125 bgt cr2,8f /* Either sleep or Winkle */
127 /* Waking up from nap should not cause hypervisor state loss */
130 /* Waking up from nap */
131 li r0,PNV_THREAD_RUNNING
132 stb r0,PACA_THREAD_IDLE_STATE(r13) /* Clear thread state */
134 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
135 li r0,KVM_HWTHREAD_IN_KERNEL
136 stb r0,HSTATE_HWTHREAD_STATE(r13)
137 /* Order setting hwthread_state vs. testing hwthread_req */
139 lbz r0,HSTATE_HWTHREAD_REQ(r13)
146 /* Return SRR1 from power7_nap() */
149 b power7_wakeup_noloss
150 2: b power7_wakeup_loss
152 /* Fast Sleep wakeup on PowerNV */
154 b power7_wakeup_tb_loss
157 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
158 #endif /* CONFIG_PPC_P7_NAP */
159 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
163 machine_check_pSeries_1:
164 /* This is moved out of line as it can be patched by FW, but
165 * some code path might still want to branch into the original
168 HMT_MEDIUM_PPR_DISCARD
169 SET_SCRATCH0(r13) /* save r13 */
170 #ifdef CONFIG_PPC_P7_NAP
172 /* Running native on arch 2.06 or later, check if we are
173 * waking up from nap. We only handle no state loss and
174 * supervisor state loss. We do -not- handle hypervisor
175 * state loss at this time.
178 rlwinm. r13,r13,47-31,30,31
179 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
183 rlwinm. r13,r13,47-31,30,31
184 /* waking up from powersave (nap) state */
186 /* Total loss of HV state is fatal. let's just stay stuck here */
187 OPT_GET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
190 OPT_SET_SPR(r13, SPRN_CFAR, CPU_FTR_CFAR)
191 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
192 #endif /* CONFIG_PPC_P7_NAP */
193 EXCEPTION_PROLOG_0(PACA_EXMC)
195 b machine_check_pSeries_early
197 b machine_check_pSeries_0
198 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
201 .globl data_access_pSeries
203 HMT_MEDIUM_PPR_DISCARD
205 EXCEPTION_PROLOG_0(PACA_EXGEN)
206 b data_access_pSeries_ool
209 .globl data_access_slb_pSeries
210 data_access_slb_pSeries:
211 HMT_MEDIUM_PPR_DISCARD
213 EXCEPTION_PROLOG_0(PACA_EXSLB)
214 b data_access_slb_pSeries_ool
217 .globl instruction_access_pSeries
218 instruction_access_pSeries:
219 HMT_MEDIUM_PPR_DISCARD
221 EXCEPTION_PROLOG_0(PACA_EXGEN)
222 b instruction_access_pSeries_ool
225 .globl instruction_access_slb_pSeries
226 instruction_access_slb_pSeries:
227 HMT_MEDIUM_PPR_DISCARD
229 EXCEPTION_PROLOG_0(PACA_EXSLB)
230 b instruction_access_slb_pSeries_ool
232 /* We open code these as we can't have a ". = x" (even with
233 * x = "." within a feature section
236 .globl hardware_interrupt_pSeries;
237 .globl hardware_interrupt_hv;
238 hardware_interrupt_pSeries:
239 hardware_interrupt_hv:
240 HMT_MEDIUM_PPR_DISCARD
242 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
243 EXC_HV, SOFTEN_TEST_HV)
244 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
246 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
247 EXC_STD, SOFTEN_TEST_HV_201)
248 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
249 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
251 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
252 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
254 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
255 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
257 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
258 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
261 .globl decrementer_trampoline
262 decrementer_trampoline:
264 EXCEPTION_PROLOG_0(PACA_EXGEN)
268 .globl hdecrementer_trampoline
269 hdecrementer_trampoline:
270 HMT_MEDIUM_PPR_DISCARD;
272 EXCEPTION_PROLOG_0(PACA_EXGEN)
275 MASKABLE_EXCEPTION_PSERIES(0xa00, 0xa00, doorbell_super)
276 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
278 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
279 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
282 .globl system_call_pSeries
285 * If CONFIG_KVM_BOOK3S_64_HANDLER is set, save the PPR (on systems
286 * that support it) before changing to HMT_MEDIUM. That allows the KVM
287 * code to save that value into the guest state (it is the guest's PPR
288 * value). Otherwise just change to HMT_MEDIUM as userspace has
289 * already saved the PPR.
291 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
294 std r9,PACA_EXGEN+EX_R9(r13)
295 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR);
297 std r10,PACA_EXGEN+EX_R10(r13)
299 OPT_SAVE_REG_TO_PACA(PACA_EXGEN+EX_PPR, r9, CPU_FTR_HAS_PPR);
307 SYSCALL_PSERIES_2_RFID
309 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
311 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
312 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
314 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
315 * out of line to handle them
318 hv_data_storage_trampoline:
320 EXCEPTION_PROLOG_0(PACA_EXGEN)
324 hv_instr_storage_trampoline:
326 EXCEPTION_PROLOG_0(PACA_EXGEN)
330 emulation_assist_trampoline:
332 EXCEPTION_PROLOG_0(PACA_EXGEN)
333 b emulation_assist_hv
336 hv_exception_trampoline:
338 EXCEPTION_PROLOG_0(PACA_EXGEN)
339 b hmi_exception_early
342 hv_doorbell_trampoline:
344 EXCEPTION_PROLOG_0(PACA_EXGEN)
347 /* We need to deal with the Altivec unavailable exception
348 * here which is at 0xf20, thus in the middle of the
349 * prolog code of the PerformanceMonitor one. A little
350 * trickery is thus necessary
353 performance_monitor_pseries_trampoline:
355 EXCEPTION_PROLOG_0(PACA_EXGEN)
356 b performance_monitor_pSeries
359 altivec_unavailable_pseries_trampoline:
361 EXCEPTION_PROLOG_0(PACA_EXGEN)
362 b altivec_unavailable_pSeries
365 vsx_unavailable_pseries_trampoline:
367 EXCEPTION_PROLOG_0(PACA_EXGEN)
368 b vsx_unavailable_pSeries
371 facility_unavailable_trampoline:
373 EXCEPTION_PROLOG_0(PACA_EXGEN)
374 b facility_unavailable_pSeries
377 hv_facility_unavailable_trampoline:
379 EXCEPTION_PROLOG_0(PACA_EXGEN)
380 b facility_unavailable_hv
382 #ifdef CONFIG_CBE_RAS
383 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
384 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
385 #endif /* CONFIG_CBE_RAS */
387 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
388 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
391 .global denorm_exception_hv
393 HMT_MEDIUM_PPR_DISCARD
394 mtspr SPRN_SPRG_HSCRATCH0,r13
395 EXCEPTION_PROLOG_0(PACA_EXGEN)
396 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0x1500)
398 #ifdef CONFIG_PPC_DENORMALISATION
400 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
401 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
402 addi r11,r11,-4 /* HSRR0 is next instruction */
407 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
408 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
410 #ifdef CONFIG_CBE_RAS
411 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
412 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
413 #endif /* CONFIG_CBE_RAS */
415 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
416 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
418 #ifdef CONFIG_CBE_RAS
419 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
420 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
423 #endif /* CONFIG_CBE_RAS */
426 /*** Out of line interrupts support ***/
429 /* moved from 0x200 */
430 machine_check_pSeries_early:
432 EXCEPTION_PROLOG_1(PACA_EXMC, NOTEST, 0x200)
437 * Original R9 to R13 is saved on PACA_EXMC
439 * Switch to mc_emergency stack and handle re-entrancy (we limit
440 * the nested MCE upto level 4 to avoid stack overflow).
441 * Save MCE registers srr1, srr0, dar and dsisr and then set ME=1
443 * We use paca->in_mce to check whether this is the first entry or
444 * nested machine check. We increment paca->in_mce to track nested
447 * If this is the first entry then set stack pointer to
448 * paca->mc_emergency_sp, otherwise r1 is already pointing to
449 * stack frame on mc_emergency stack.
451 * NOTE: We are here with MSR_ME=0 (off), which means we risk a
452 * checkstop if we get another machine check exception before we do
453 * rfid with MSR_ME=1.
455 mr r11,r1 /* Save r1 */
456 lhz r10,PACA_IN_MCE(r13)
457 cmpwi r10,0 /* Are we in nested machine check */
458 bne 0f /* Yes, we are. */
459 /* First machine check entry */
460 ld r1,PACAMCEMERGSP(r13) /* Use MC emergency stack */
461 0: subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
462 addi r10,r10,1 /* increment paca->in_mce */
463 sth r10,PACA_IN_MCE(r13)
464 /* Limit nested MCE to level 4 to avoid stack overflow */
466 bgt 2f /* Check if we hit limit of 4 */
467 std r11,GPR1(r1) /* Save r1 on the stack. */
468 std r11,0(r1) /* make stack chain pointer */
469 mfspr r11,SPRN_SRR0 /* Save SRR0 */
471 mfspr r11,SPRN_SRR1 /* Save SRR1 */
473 mfspr r11,SPRN_DAR /* Save DAR */
475 mfspr r11,SPRN_DSISR /* Save DSISR */
477 std r9,_CCR(r1) /* Save CR in stackframe */
478 /* Save r9 through r13 from EXMC save area to stack frame. */
479 EXCEPTION_PROLOG_COMMON_2(PACA_EXMC)
480 mfmsr r11 /* get MSR value */
481 ori r11,r11,MSR_ME /* turn on ME bit */
482 ori r11,r11,MSR_RI /* turn on RI bit */
483 ld r12,PACAKBASE(r13) /* get high part of &label */
484 LOAD_HANDLER(r12, machine_check_handle_early)
485 1: mtspr SPRN_SRR0,r12
488 b . /* prevent speculative execution */
490 /* Stack overflow. Stay on emergency stack and panic.
491 * Keep the ME bit off while panic-ing, so that if we hit
492 * another machine check we checkstop.
494 addi r1,r1,INT_FRAME_SIZE /* go back to previous stack frame */
496 ld r12,PACAKBASE(r13)
497 LOAD_HANDLER(r12, unrecover_mce)
499 andc r11,r11,r10 /* Turn off MSR_ME */
501 b . /* prevent speculative execution */
502 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
504 machine_check_pSeries:
505 .globl machine_check_fwnmi
507 HMT_MEDIUM_PPR_DISCARD
508 SET_SCRATCH0(r13) /* save r13 */
509 EXCEPTION_PROLOG_0(PACA_EXMC)
510 machine_check_pSeries_0:
511 EXCEPTION_PROLOG_1(PACA_EXMC, KVMTEST, 0x200)
512 EXCEPTION_PROLOG_PSERIES_1(machine_check_common, EXC_STD)
513 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
514 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
515 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
516 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
517 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
518 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
519 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
521 /* moved from 0x300 */
522 .globl data_access_pSeries_ool
523 data_access_pSeries_ool:
524 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST, 0x300)
525 EXCEPTION_PROLOG_PSERIES_1(data_access_common, EXC_STD)
527 .globl data_access_slb_pSeries_ool
528 data_access_slb_pSeries_ool:
529 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
530 std r3,PACA_EXSLB+EX_R3(r13)
533 /* Keep that around for when we re-implement dynamic VSIDs */
535 bge slb_miss_user_pseries
536 #endif /* __DISABLED__ */
538 #ifndef CONFIG_RELOCATABLE
542 * We can't just use a direct branch to slb_miss_realmode
543 * because the distance from here to there depends on where
544 * the kernel ends up being put.
547 ld r10,PACAKBASE(r13)
548 LOAD_HANDLER(r10, slb_miss_realmode)
553 .globl instruction_access_pSeries_ool
554 instruction_access_pSeries_ool:
555 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, 0x400)
556 EXCEPTION_PROLOG_PSERIES_1(instruction_access_common, EXC_STD)
558 .globl instruction_access_slb_pSeries_ool
559 instruction_access_slb_pSeries_ool:
560 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
561 std r3,PACA_EXSLB+EX_R3(r13)
562 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
564 /* Keep that around for when we re-implement dynamic VSIDs */
566 bge slb_miss_user_pseries
567 #endif /* __DISABLED__ */
569 #ifndef CONFIG_RELOCATABLE
573 ld r10,PACAKBASE(r13)
574 LOAD_HANDLER(r10, slb_miss_realmode)
579 #ifdef CONFIG_PPC_DENORMALISATION
583 * To denormalise we need to move a copy of the register to itself.
584 * For POWER6 do that here for all FP regs.
587 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
588 xori r10,r10,(MSR_FE0|MSR_FE1)
592 #define FMR2(n) fmr (n), (n) ; fmr n+1, n+1
593 #define FMR4(n) FMR2(n) ; FMR2(n+2)
594 #define FMR8(n) FMR4(n) ; FMR4(n+4)
595 #define FMR16(n) FMR8(n) ; FMR8(n+8)
596 #define FMR32(n) FMR16(n) ; FMR16(n+16)
601 * To denormalise we need to move a copy of the register to itself.
602 * For POWER7 do that here for the first 32 VSX registers only.
605 oris r10,r10,MSR_VSX@h
609 #define XVCPSGNDP2(n) XVCPSGNDP(n,n,n) ; XVCPSGNDP(n+1,n+1,n+1)
610 #define XVCPSGNDP4(n) XVCPSGNDP2(n) ; XVCPSGNDP2(n+2)
611 #define XVCPSGNDP8(n) XVCPSGNDP4(n) ; XVCPSGNDP4(n+4)
612 #define XVCPSGNDP16(n) XVCPSGNDP8(n) ; XVCPSGNDP8(n+8)
613 #define XVCPSGNDP32(n) XVCPSGNDP16(n) ; XVCPSGNDP16(n+16)
616 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
620 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
622 * To denormalise we need to move a copy of the register to itself.
623 * For POWER8 we need to do that for all 64 VSX registers
629 ld r9,PACA_EXGEN+EX_R9(r13)
630 RESTORE_PPR_PACA(PACA_EXGEN, r10)
632 ld r10,PACA_EXGEN+EX_CFAR(r13)
634 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
635 ld r10,PACA_EXGEN+EX_R10(r13)
636 ld r11,PACA_EXGEN+EX_R11(r13)
637 ld r12,PACA_EXGEN+EX_R12(r13)
638 ld r13,PACA_EXGEN+EX_R13(r13)
644 /* moved from 0xe00 */
645 MASKABLE_EXCEPTION_OOL(0x900, decrementer)
646 STD_EXCEPTION_HV_OOL(0x982, hdecrementer)
647 STD_EXCEPTION_HV_OOL(0xe02, h_data_storage)
648 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
649 STD_EXCEPTION_HV_OOL(0xe22, h_instr_storage)
650 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
651 STD_EXCEPTION_HV_OOL(0xe42, emulation_assist)
652 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
653 MASKABLE_EXCEPTION_HV_OOL(0xe62, hmi_exception)
654 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
656 MASKABLE_EXCEPTION_HV_OOL(0xe82, h_doorbell)
657 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe82)
659 /* moved from 0xf00 */
660 STD_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
661 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
662 STD_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
663 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
664 STD_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
665 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
666 STD_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
667 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf60)
668 STD_EXCEPTION_HV_OOL(0xf82, facility_unavailable)
669 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xf82)
672 * An interrupt came in while soft-disabled. We set paca->irq_happened, then:
673 * - If it was a decrementer interrupt, we bump the dec to max and and return.
674 * - If it was a doorbell we return immediately since doorbells are edge
675 * triggered and won't automatically refire.
676 * - If it was a HMI we return immediately since we handled it in realmode
677 * and it won't refire.
678 * - else we hard disable and return.
679 * This is called with r10 containing the value to OR to the paca field.
681 #define MASKED_INTERRUPT(_H) \
682 masked_##_H##interrupt: \
683 std r11,PACA_EXGEN+EX_R11(r13); \
684 lbz r11,PACAIRQHAPPENED(r13); \
686 stb r11,PACAIRQHAPPENED(r13); \
687 cmpwi r10,PACA_IRQ_DEC; \
690 ori r10,r10,0xffff; \
691 mtspr SPRN_DEC,r10; \
693 1: cmpwi r10,PACA_IRQ_DBELL; \
695 cmpwi r10,PACA_IRQ_HMI; \
697 mfspr r10,SPRN_##_H##SRR1; \
698 rldicl r10,r10,48,1; /* clear MSR_EE */ \
700 mtspr SPRN_##_H##SRR1,r10; \
702 ld r9,PACA_EXGEN+EX_R9(r13); \
703 ld r10,PACA_EXGEN+EX_R10(r13); \
704 ld r11,PACA_EXGEN+EX_R11(r13); \
706 ##_H##RFI_TO_KERNEL; \
713 * Called from arch_local_irq_enable when an interrupt needs
714 * to be resent. r3 contains 0x500, 0x900, 0xa00 or 0xe80 to indicate
715 * which kind of interrupt. MSR:EE is already off. We generate a
716 * stackframe like if a real interrupt had happened.
718 * Note: While MSR:EE is off, we need to make sure that _MSR
719 * in the generated frame has EE set to 1 or the exception
720 * handler will not properly re-enable them.
722 _GLOBAL(__replay_interrupt)
723 /* We are going to jump to the exception common code which
724 * will retrieve various register values from the PACA which
725 * we don't give a damn about, so we don't bother storing them.
732 beq decrementer_common
734 beq hardware_interrupt_common
737 beq h_doorbell_common
740 beq doorbell_super_common
741 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
744 #ifdef CONFIG_PPC_PSERIES
746 * Vectors for the FWNMI option. Share common code.
748 .globl system_reset_fwnmi
751 HMT_MEDIUM_PPR_DISCARD
752 SET_SCRATCH0(r13) /* save r13 */
753 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
756 #endif /* CONFIG_PPC_PSERIES */
760 * This is used for when the SLB miss handler has to go virtual,
761 * which doesn't happen for now anymore but will once we re-implement
762 * dynamic VSIDs for shared page tables
764 slb_miss_user_pseries:
765 std r10,PACA_EXGEN+EX_R10(r13)
766 std r11,PACA_EXGEN+EX_R11(r13)
767 std r12,PACA_EXGEN+EX_R12(r13)
769 ld r11,PACA_EXSLB+EX_R9(r13)
770 ld r12,PACA_EXSLB+EX_R3(r13)
771 std r10,PACA_EXGEN+EX_R13(r13)
772 std r11,PACA_EXGEN+EX_R9(r13)
773 std r12,PACA_EXGEN+EX_R3(r13)
776 mfspr r11,SRR0 /* save SRR0 */
777 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
778 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
780 mfspr r12,SRR1 /* and SRR1 */
783 b . /* prevent spec. execution */
784 #endif /* __DISABLED__ */
786 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
787 kvmppc_skip_interrupt:
789 * Here all GPRs are unchanged from when the interrupt happened
790 * except for r13, which is saved in SPRG_SCRATCH0.
799 kvmppc_skip_Hinterrupt:
801 * Here all GPRs are unchanged from when the interrupt happened
802 * except for r13, which is saved in SPRG_SCRATCH0.
804 mfspr r13, SPRN_HSRR0
806 mtspr SPRN_HSRR0, r13
813 * Code from here down to __end_handlers is invoked from the
814 * exception prologs above. Because the prologs assemble the
815 * addresses of these handlers using the LOAD_HANDLER macro,
816 * which uses an ori instruction, these handlers must be in
817 * the first 64k of the kernel image.
820 /*** Common interrupt handlers ***/
822 STD_EXCEPTION_COMMON(0x100, system_reset, system_reset_exception)
824 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
825 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, timer_interrupt)
826 STD_EXCEPTION_COMMON(0x980, hdecrementer, hdec_interrupt)
827 #ifdef CONFIG_PPC_DOORBELL
828 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, doorbell_exception)
830 STD_EXCEPTION_COMMON_ASYNC(0xa00, doorbell_super, unknown_exception)
832 STD_EXCEPTION_COMMON(0xb00, trap_0b, unknown_exception)
833 STD_EXCEPTION_COMMON(0xd00, single_step, single_step_exception)
834 STD_EXCEPTION_COMMON(0xe00, trap_0e, unknown_exception)
835 STD_EXCEPTION_COMMON(0xe40, emulation_assist, emulation_assist_interrupt)
836 STD_EXCEPTION_COMMON_ASYNC(0xe60, hmi_exception, handle_hmi_exception)
837 #ifdef CONFIG_PPC_DOORBELL
838 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, doorbell_exception)
840 STD_EXCEPTION_COMMON_ASYNC(0xe80, h_doorbell, unknown_exception)
842 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, performance_monitor_exception)
843 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, instruction_breakpoint_exception)
844 STD_EXCEPTION_COMMON(0x1502, denorm, unknown_exception)
845 #ifdef CONFIG_ALTIVEC
846 STD_EXCEPTION_COMMON(0x1700, altivec_assist, altivec_assist_exception)
848 STD_EXCEPTION_COMMON(0x1700, altivec_assist, unknown_exception)
850 #ifdef CONFIG_CBE_RAS
851 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, cbe_system_error_exception)
852 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, cbe_maintenance_exception)
853 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, cbe_thermal_exception)
854 #endif /* CONFIG_CBE_RAS */
857 * Relocation-on interrupts: A subset of the interrupts can be delivered
858 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
859 * it. Addresses are the same as the original interrupt addresses, but
860 * offset by 0xc000000000004000.
861 * It's impossible to receive interrupts below 0x300 via this mechanism.
862 * KVM: None of these traps are from the guest ; anything that escalated
863 * to HV=1 from HV=0 is delivered via real mode handlers.
867 * This uses the standard macro, since the original 0x300 vector
868 * only has extra guff for STAB-based processors -- which never
871 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
873 .globl data_access_slb_relon_pSeries
874 data_access_slb_relon_pSeries:
876 EXCEPTION_PROLOG_0(PACA_EXSLB)
877 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
878 std r3,PACA_EXSLB+EX_R3(r13)
881 #ifndef CONFIG_RELOCATABLE
885 * We can't just use a direct branch to slb_miss_realmode
886 * because the distance from here to there depends on where
887 * the kernel ends up being put.
890 ld r10,PACAKBASE(r13)
891 LOAD_HANDLER(r10, slb_miss_realmode)
896 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
898 .globl instruction_access_slb_relon_pSeries
899 instruction_access_slb_relon_pSeries:
901 EXCEPTION_PROLOG_0(PACA_EXSLB)
902 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
903 std r3,PACA_EXSLB+EX_R3(r13)
904 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
906 #ifndef CONFIG_RELOCATABLE
910 ld r10,PACAKBASE(r13)
911 LOAD_HANDLER(r10, slb_miss_realmode)
917 .globl hardware_interrupt_relon_pSeries;
918 .globl hardware_interrupt_relon_hv;
919 hardware_interrupt_relon_pSeries:
920 hardware_interrupt_relon_hv:
922 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
924 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
925 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE)
926 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
927 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
928 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
931 .globl decrementer_relon_trampoline
932 decrementer_relon_trampoline:
933 HMT_MEDIUM_PPR_DISCARD
935 EXCEPTION_PROLOG_0(PACA_EXGEN)
936 b decrementer_relon_pSeries
938 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
939 MASKABLE_RELON_EXCEPTION_PSERIES(0x4a00, 0xa00, doorbell_super)
940 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
943 .globl system_call_relon_pSeries
944 system_call_relon_pSeries:
947 SYSCALL_PSERIES_2_DIRECT
950 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
953 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
956 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
959 emulation_assist_relon_trampoline:
961 EXCEPTION_PROLOG_0(PACA_EXGEN)
962 b emulation_assist_relon_hv
965 b . /* Can't happen, see v2.07 Book III-S section 6.5 */
968 h_doorbell_relon_trampoline:
970 EXCEPTION_PROLOG_0(PACA_EXGEN)
971 b h_doorbell_relon_hv
974 performance_monitor_relon_pseries_trampoline:
976 EXCEPTION_PROLOG_0(PACA_EXGEN)
977 b performance_monitor_relon_pSeries
980 altivec_unavailable_relon_pseries_trampoline:
982 EXCEPTION_PROLOG_0(PACA_EXGEN)
983 b altivec_unavailable_relon_pSeries
986 vsx_unavailable_relon_pseries_trampoline:
988 EXCEPTION_PROLOG_0(PACA_EXGEN)
989 b vsx_unavailable_relon_pSeries
992 facility_unavailable_relon_trampoline:
994 EXCEPTION_PROLOG_0(PACA_EXGEN)
995 b facility_unavailable_relon_pSeries
998 hv_facility_unavailable_relon_trampoline:
1000 EXCEPTION_PROLOG_0(PACA_EXGEN)
1001 b hv_facility_unavailable_relon_hv
1003 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
1004 #ifdef CONFIG_PPC_DENORMALISATION
1006 b denorm_exception_hv
1008 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
1012 b system_call_common
1014 ppc64_runlatch_on_trampoline:
1015 b __ppc64_runlatch_on
1018 * Here r13 points to the paca, r9 contains the saved CR,
1019 * SRR0 and SRR1 are saved in r11 and r12,
1020 * r9 - r13 are saved in paca->exgen.
1023 .globl data_access_common
1026 std r10,PACA_EXGEN+EX_DAR(r13)
1027 mfspr r10,SPRN_DSISR
1028 stw r10,PACA_EXGEN+EX_DSISR(r13)
1029 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
1030 RECONCILE_IRQ_STATE(r10, r11)
1032 ld r3,PACA_EXGEN+EX_DAR(r13)
1033 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1035 b do_hash_page /* Try to handle as hpte fault */
1038 .globl h_data_storage_common
1039 h_data_storage_common:
1041 std r10,PACA_EXGEN+EX_DAR(r13)
1042 mfspr r10,SPRN_HDSISR
1043 stw r10,PACA_EXGEN+EX_DSISR(r13)
1044 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
1046 RECONCILE_IRQ_STATE(r10, r11)
1047 addi r3,r1,STACK_FRAME_OVERHEAD
1048 bl unknown_exception
1052 .globl instruction_access_common
1053 instruction_access_common:
1054 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
1055 RECONCILE_IRQ_STATE(r10, r11)
1058 andis. r4,r12,0x5820
1060 b do_hash_page /* Try to handle as hpte fault */
1062 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, unknown_exception)
1065 * Here is the common SLB miss user that is used when going to virtual
1066 * mode for SLB misses, that is currently not used
1070 .globl slb_miss_user_common
1071 slb_miss_user_common:
1073 std r3,PACA_EXGEN+EX_DAR(r13)
1074 stw r9,PACA_EXGEN+EX_CCR(r13)
1075 std r10,PACA_EXGEN+EX_LR(r13)
1076 std r11,PACA_EXGEN+EX_SRR0(r13)
1077 bl slb_allocate_user
1079 ld r10,PACA_EXGEN+EX_LR(r13)
1080 ld r3,PACA_EXGEN+EX_R3(r13)
1081 lwz r9,PACA_EXGEN+EX_CCR(r13)
1082 ld r11,PACA_EXGEN+EX_SRR0(r13)
1086 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1087 beq- unrecov_user_slb
1095 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
1101 ld r9,PACA_EXGEN+EX_R9(r13)
1102 ld r10,PACA_EXGEN+EX_R10(r13)
1103 ld r11,PACA_EXGEN+EX_R11(r13)
1104 ld r12,PACA_EXGEN+EX_R12(r13)
1105 ld r13,PACA_EXGEN+EX_R13(r13)
1110 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
1111 ld r4,PACA_EXGEN+EX_DAR(r13)
1118 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
1119 RECONCILE_IRQ_STATE(r10, r11)
1121 1: addi r3,r1,STACK_FRAME_OVERHEAD
1122 bl unrecoverable_exception
1125 #endif /* __DISABLED__ */
1129 * Machine check is different because we use a different
1130 * save area: PACA_EXMC instead of PACA_EXGEN.
1133 .globl machine_check_common
1134 machine_check_common:
1137 std r10,PACA_EXGEN+EX_DAR(r13)
1138 mfspr r10,SPRN_DSISR
1139 stw r10,PACA_EXGEN+EX_DSISR(r13)
1140 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
1142 RECONCILE_IRQ_STATE(r10, r11)
1143 ld r3,PACA_EXGEN+EX_DAR(r13)
1144 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1148 addi r3,r1,STACK_FRAME_OVERHEAD
1149 bl machine_check_exception
1153 .globl alignment_common
1156 std r10,PACA_EXGEN+EX_DAR(r13)
1157 mfspr r10,SPRN_DSISR
1158 stw r10,PACA_EXGEN+EX_DSISR(r13)
1159 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1160 ld r3,PACA_EXGEN+EX_DAR(r13)
1161 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1165 RECONCILE_IRQ_STATE(r10, r11)
1166 addi r3,r1,STACK_FRAME_OVERHEAD
1167 bl alignment_exception
1171 .globl program_check_common
1172 program_check_common:
1173 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1175 RECONCILE_IRQ_STATE(r10, r11)
1176 addi r3,r1,STACK_FRAME_OVERHEAD
1177 bl program_check_exception
1181 .globl fp_unavailable_common
1182 fp_unavailable_common:
1183 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1184 bne 1f /* if from user, just load it up */
1186 RECONCILE_IRQ_STATE(r10, r11)
1187 addi r3,r1,STACK_FRAME_OVERHEAD
1188 bl kernel_fp_unavailable_exception
1191 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1193 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1194 * transaction), go do TM stuff
1196 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1198 END_FTR_SECTION_IFSET(CPU_FTR_TM)
1201 b fast_exception_return
1202 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1203 2: /* User process was in a transaction */
1205 RECONCILE_IRQ_STATE(r10, r11)
1206 addi r3,r1,STACK_FRAME_OVERHEAD
1207 bl fp_unavailable_tm
1211 .globl altivec_unavailable_common
1212 altivec_unavailable_common:
1213 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1214 #ifdef CONFIG_ALTIVEC
1217 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1218 BEGIN_FTR_SECTION_NESTED(69)
1219 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1220 * transaction), go do TM stuff
1222 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1224 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1227 b fast_exception_return
1228 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1229 2: /* User process was in a transaction */
1231 RECONCILE_IRQ_STATE(r10, r11)
1232 addi r3,r1,STACK_FRAME_OVERHEAD
1233 bl altivec_unavailable_tm
1237 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1240 RECONCILE_IRQ_STATE(r10, r11)
1241 addi r3,r1,STACK_FRAME_OVERHEAD
1242 bl altivec_unavailable_exception
1246 .globl vsx_unavailable_common
1247 vsx_unavailable_common:
1248 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1252 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1253 BEGIN_FTR_SECTION_NESTED(69)
1254 /* Test if 2 TM state bits are zero. If non-zero (ie. userspace was in
1255 * transaction), go do TM stuff
1257 rldicl. r0, r12, (64-MSR_TS_LG), (64-2)
1259 END_FTR_SECTION_NESTED(CPU_FTR_TM, CPU_FTR_TM, 69)
1262 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1263 2: /* User process was in a transaction */
1265 RECONCILE_IRQ_STATE(r10, r11)
1266 addi r3,r1,STACK_FRAME_OVERHEAD
1267 bl vsx_unavailable_tm
1271 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1274 RECONCILE_IRQ_STATE(r10, r11)
1275 addi r3,r1,STACK_FRAME_OVERHEAD
1276 bl vsx_unavailable_exception
1279 STD_EXCEPTION_COMMON(0xf60, facility_unavailable, facility_unavailable_exception)
1280 STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, facility_unavailable_exception)
1283 .globl __end_handlers
1286 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1287 MASKABLE_RELON_EXCEPTION_PSERIES_OOL(0x900, decrementer)
1289 STD_RELON_EXCEPTION_HV_OOL(0xe40, emulation_assist)
1290 MASKABLE_RELON_EXCEPTION_HV_OOL(0xe80, h_doorbell)
1292 STD_RELON_EXCEPTION_PSERIES_OOL(0xf00, performance_monitor)
1293 STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
1294 STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
1295 STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
1296 STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
1299 * The __end_interrupts marker must be past the out-of-line (OOL)
1300 * handlers, so that they are copied to real address 0x100 when running
1301 * a relocatable kernel. This ensures they can be reached from the short
1302 * trampoline handlers (like 0x4f00, 0x4f20, etc.) which branch
1303 * directly, without using LOAD_HANDLER().
1306 .globl __end_interrupts
1309 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1311 * Data area reserved for FWNMI option.
1312 * This address (0x7000) is fixed by the RPA.
1315 .globl fwnmi_data_area
1318 /* pseries and powernv need to keep the whole page from
1319 * 0x7000 to 0x8000 free for use by the firmware
1322 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1324 .globl hmi_exception_early
1325 hmi_exception_early:
1326 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, 0xe60)
1327 mr r10,r1 /* Save r1 */
1328 ld r1,PACAEMERGSP(r13) /* Use emergency stack */
1329 subi r1,r1,INT_FRAME_SIZE /* alloc stack frame */
1330 std r9,_CCR(r1) /* save CR in stackframe */
1331 mfspr r11,SPRN_HSRR0 /* Save HSRR0 */
1332 std r11,_NIP(r1) /* save HSRR0 in stackframe */
1333 mfspr r12,SPRN_HSRR1 /* Save SRR1 */
1334 std r12,_MSR(r1) /* save SRR1 in stackframe */
1335 std r10,0(r1) /* make stack chain pointer */
1336 std r0,GPR0(r1) /* save r0 in stackframe */
1337 std r10,GPR1(r1) /* save r1 in stackframe */
1338 EXCEPTION_PROLOG_COMMON_2(PACA_EXGEN)
1339 EXCEPTION_PROLOG_COMMON_3(0xe60)
1340 addi r3,r1,STACK_FRAME_OVERHEAD
1341 bl hmi_exception_realmode
1342 /* Windup the stack. */
1343 /* Move original HSRR0 and HSRR1 into the respective regs */
1361 /* restore original r1. */
1365 * Go to virtual mode and pull the HMI event information from
1368 .globl hmi_exception_after_realmode
1369 hmi_exception_after_realmode:
1371 EXCEPTION_PROLOG_0(PACA_EXGEN)
1375 #define MACHINE_CHECK_HANDLER_WINDUP \
1376 /* Clear MSR_RI before setting SRR0 and SRR1. */\
1378 mfmsr r9; /* get MSR value */ \
1380 mtmsrd r9,1; /* Clear MSR_RI */ \
1381 /* Move original SRR0 and SRR1 into the respective regs */ \
1383 mtspr SPRN_SRR1,r9; \
1385 mtspr SPRN_SRR0,r3; \
1393 REST_8GPRS(2, r1); \
1397 /* Decrement paca->in_mce. */ \
1398 lhz r12,PACA_IN_MCE(r13); \
1400 sth r12,PACA_IN_MCE(r13); \
1402 REST_2GPRS(12, r1); \
1403 /* restore original r1. */ \
1407 * Handle machine check early in real mode. We come here with
1408 * ME=1, MMU (IR=0 and DR=0) off and using MC emergency stack.
1411 .globl machine_check_handle_early
1412 machine_check_handle_early:
1413 std r0,GPR0(r1) /* Save r0 */
1414 EXCEPTION_PROLOG_COMMON_3(0x200)
1416 addi r3,r1,STACK_FRAME_OVERHEAD
1417 bl machine_check_early
1418 std r3,RESULT(r1) /* Save result */
1420 #ifdef CONFIG_PPC_P7_NAP
1422 * Check if thread was in power saving mode. We come here when any
1423 * of the following is true:
1424 * a. thread wasn't in power saving mode
1425 * b. thread was in power saving mode with no state loss or
1426 * supervisor state loss
1428 * Go back to nap again if (b) is true.
1430 rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */
1431 beq 4f /* No, it wasn;t */
1432 /* Thread was in power saving mode. Go back to nap again. */
1435 /* Supervisor state loss */
1437 stb r0,PACA_NAPSTATELOST(r13)
1438 3: bl machine_check_queue_event
1439 MACHINE_CHECK_HANDLER_WINDUP
1442 li r3,PNV_THREAD_NAP
1443 b power7_enter_nap_mode
1447 * Check if we are coming from hypervisor userspace. If yes then we
1448 * continue in host kernel in V mode to deliver the MC event.
1450 rldicl. r11,r12,4,63 /* See if MC hit while in HV mode. */
1452 andi. r11,r12,MSR_PR /* See if coming from user. */
1453 bne 9f /* continue in V mode if we are. */
1456 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
1458 * We are coming from kernel context. Check if we are coming from
1459 * guest. if yes, then we can continue. We will fall through
1460 * do_kvm_200->kvmppc_interrupt to deliver the MC event to guest.
1462 lbz r11,HSTATE_IN_GUEST(r13)
1463 cmpwi r11,0 /* Check if coming from guest */
1464 bne 9f /* continue if we are. */
1467 * At this point we are not sure about what context we come from.
1468 * Queue up the MCE event and return from the interrupt.
1469 * But before that, check if this is an un-recoverable exception.
1470 * If yes, then stay on emergency stack and panic.
1472 andi. r11,r12,MSR_RI
1474 1: mfspr r11,SPRN_SRR0
1475 ld r10,PACAKBASE(r13)
1476 LOAD_HANDLER(r10,unrecover_mce)
1478 ld r10,PACAKMSR(r13)
1480 * We are going down. But there are chances that we might get hit by
1481 * another MCE during panic path and we may run into unstable state
1482 * with no way out. Hence, turn ME bit off while going down, so that
1483 * when another MCE is hit during panic path, system will checkstop
1484 * and hypervisor will get restarted cleanly by SP.
1487 andc r10,r10,r3 /* Turn off MSR_ME */
1493 * Check if we have successfully handled/recovered from error, if not
1494 * then stay on emergency stack and panic.
1496 ld r3,RESULT(r1) /* Load result */
1497 cmpdi r3,0 /* see if we handled MCE successfully */
1499 beq 1b /* if !handled then panic */
1501 * Return from MC interrupt.
1502 * Queue up the MCE event so that we can log it later, while
1503 * returning from kernel or opal call.
1505 bl machine_check_queue_event
1506 MACHINE_CHECK_HANDLER_WINDUP
1507 RFI_TO_USER_OR_KERNEL
1509 /* Deliver the machine check to host kernel in V mode. */
1511 ld r10,ORIG_GPR3(r1)
1513 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1514 MACHINE_CHECK_HANDLER_WINDUP
1515 b machine_check_pSeries
1518 /* Invoke machine_check_exception to print MCE event and panic. */
1519 addi r3,r1,STACK_FRAME_OVERHEAD
1520 bl machine_check_exception
1522 * We will not reach here. Even if we did, there is no way out. Call
1523 * unrecoverable_exception and die.
1525 1: addi r3,r1,STACK_FRAME_OVERHEAD
1526 bl unrecoverable_exception
1529 * r13 points to the PACA, r9 contains the saved CR,
1530 * r12 contain the saved SRR1, SRR0 is still ready for return
1531 * r3 has the faulting address
1532 * r9 - r13 are saved in paca->exslb.
1533 * r3 is saved in paca->slb_r3
1534 * We assume we aren't going to take any exceptions during this procedure.
1538 #ifdef CONFIG_RELOCATABLE
1542 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1543 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1545 bl slb_allocate_realmode
1547 /* All done -- return from exception. */
1549 ld r10,PACA_EXSLB+EX_LR(r13)
1550 ld r3,PACA_EXSLB+EX_R3(r13)
1551 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1555 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1557 andi. r10,r12,MSR_PR /* check for user mode (PR != 0) */
1563 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1566 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1567 ld r9,PACA_EXSLB+EX_R9(r13)
1568 ld r10,PACA_EXSLB+EX_R10(r13)
1569 ld r11,PACA_EXSLB+EX_R11(r13)
1570 ld r12,PACA_EXSLB+EX_R12(r13)
1571 ld r13,PACA_EXSLB+EX_R13(r13)
1573 b . /* prevent speculative execution */
1579 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1582 RESTORE_PPR_PACA(PACA_EXSLB, r9)
1583 ld r9,PACA_EXSLB+EX_R9(r13)
1584 ld r10,PACA_EXSLB+EX_R10(r13)
1585 ld r11,PACA_EXSLB+EX_R11(r13)
1586 ld r12,PACA_EXSLB+EX_R12(r13)
1587 ld r13,PACA_EXSLB+EX_R13(r13)
1589 b . /* prevent speculative execution */
1591 2: mfspr r11,SPRN_SRR0
1592 ld r10,PACAKBASE(r13)
1593 LOAD_HANDLER(r10,unrecov_slb)
1595 ld r10,PACAKMSR(r13)
1601 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1602 RECONCILE_IRQ_STATE(r10, r11)
1604 1: addi r3,r1,STACK_FRAME_OVERHEAD
1605 bl unrecoverable_exception
1609 #ifdef CONFIG_PPC_970_NAP
1612 std r9,TI_LOCAL_FLAGS(r11)
1613 ld r10,_LINK(r1) /* make idle task do the */
1614 std r10,_NIP(r1) /* equivalent of a blr */
1619 .globl stf_barrier_fallback
1620 stf_barrier_fallback:
1621 std r9,PACA_EXRFI+EX_R9(r13)
1622 std r10,PACA_EXRFI+EX_R10(r13)
1624 ld r9,PACA_EXRFI+EX_R9(r13)
1625 ld r10,PACA_EXRFI+EX_R10(r13)
1634 /* Clobbers r10, r11, ctr */
1635 .macro L1D_DISPLACEMENT_FLUSH
1636 ld r10,PACA_RFI_FLUSH_FALLBACK_AREA(r13)
1637 ld r11,PACA_L1D_FLUSH_SIZE(r13)
1638 srdi r11,r11,(7 + 3) /* 128 byte lines, unrolled 8x */
1640 DCBT_STOP_ALL_STREAM_IDS(r11) /* Stop prefetch streams */
1642 /* order ld/st prior to dcbt stop all streams with flushing */
1646 * The load adresses are at staggered offsets within cachelines,
1647 * which suits some pipelines better (on others it should not
1651 ld r11,(0x80 + 8)*0(r10)
1652 ld r11,(0x80 + 8)*1(r10)
1653 ld r11,(0x80 + 8)*2(r10)
1654 ld r11,(0x80 + 8)*3(r10)
1655 ld r11,(0x80 + 8)*4(r10)
1656 ld r11,(0x80 + 8)*5(r10)
1657 ld r11,(0x80 + 8)*6(r10)
1658 ld r11,(0x80 + 8)*7(r10)
1664 .globl rfi_flush_fallback
1668 std r9,PACA_EXRFI+EX_R9(r13)
1669 std r10,PACA_EXRFI+EX_R10(r13)
1670 std r11,PACA_EXRFI+EX_R11(r13)
1672 L1D_DISPLACEMENT_FLUSH
1674 ld r9,PACA_EXRFI+EX_R9(r13)
1675 ld r10,PACA_EXRFI+EX_R10(r13)
1676 ld r11,PACA_EXRFI+EX_R11(r13)
1680 .globl hrfi_flush_fallback
1681 hrfi_flush_fallback:
1684 std r9,PACA_EXRFI+EX_R9(r13)
1685 std r10,PACA_EXRFI+EX_R10(r13)
1686 std r11,PACA_EXRFI+EX_R11(r13)
1688 L1D_DISPLACEMENT_FLUSH
1690 ld r9,PACA_EXRFI+EX_R9(r13)
1691 ld r10,PACA_EXRFI+EX_R10(r13)
1692 ld r11,PACA_EXRFI+EX_R11(r13)
1696 .globl entry_flush_fallback
1697 entry_flush_fallback:
1698 std r9,PACA_EXRFI+EX_R9(r13)
1699 std r10,PACA_EXRFI+EX_R10(r13)
1700 std r11,PACA_EXRFI+EX_R11(r13)
1702 L1D_DISPLACEMENT_FLUSH
1704 ld r9,PACA_EXRFI+EX_R9(r13)
1705 ld r10,PACA_EXRFI+EX_R10(r13)
1706 ld r11,PACA_EXRFI+EX_R11(r13)
1718 andis. r0,r4,0xa410 /* weird error? */
1719 bne- handle_page_fault /* if not, try to insert a HPTE */
1720 andis. r0,r4,DSISR_DABRMATCH@h
1721 bne- handle_dabr_fault
1722 CURRENT_THREAD_INFO(r11, r1)
1723 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1724 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1725 bne 77f /* then don't call hash_page now */
1727 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1728 * accessing a userspace segment (even from the kernel). We assume
1729 * kernel addresses always have the high bit set.
1731 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1732 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1733 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1734 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1735 ori r4,r4,1 /* add _PAGE_PRESENT */
1736 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1739 * r3 contains the faulting address
1740 * r4 contains the required access permissions
1741 * r5 contains the trap number
1744 * at return r3 = 0 for success, 1 for page fault, negative for error
1747 bl hash_page /* build HPTE if possible */
1748 cmpdi r3,0 /* see if hash_page succeeded */
1751 beq fast_exc_return_irq /* Return from exception on success */
1756 /* Here we have a page fault that hash_page can't handle. */
1760 addi r3,r1,STACK_FRAME_OVERHEAD
1763 beq+ ret_from_except_lite
1766 addi r3,r1,STACK_FRAME_OVERHEAD
1771 /* We have a data breakpoint exception - handle it */
1776 addi r3,r1,STACK_FRAME_OVERHEAD
1779 * do_break() may have changed the NV GPRS while handling a breakpoint.
1780 * If so, we need to restore them with their updated values. Don't use
1781 * ret_from_except_lite here.
1786 /* We have a page fault that hash_page could handle but HV refused
1791 addi r3,r1,STACK_FRAME_OVERHEAD
1797 * We come here as a result of a DSI at a point where we don't want
1798 * to call hash_page, such as when we are accessing memory (possibly
1799 * user memory) inside a PMU interrupt that occurred while interrupts
1800 * were soft-disabled. We want to invoke the exception handler for
1801 * the access, or panic if there isn't a handler.
1805 addi r3,r1,STACK_FRAME_OVERHEAD
1811 * Here we have detected that the kernel stack pointer is bad.
1812 * R9 contains the saved CR, r13 points to the paca,
1813 * r10 contains the (bad) kernel stack pointer,
1814 * r11 and r12 contain the saved SRR0 and SRR1.
1815 * We switch to using an emergency stack, save the registers there,
1816 * and call kernel_bad_stack(), which panics.
1819 ld r1,PACAEMERGSP(r13)
1820 subi r1,r1,64+INT_FRAME_SIZE
1826 mfspr r12,SPRN_DSISR
1852 std r10,ORIG_GPR3(r1)
1853 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
1856 lhz r12,PACA_TRAP_SAVE(r13)
1858 addi r11,r1,INT_FRAME_SIZE
1863 ld r11,exception_marker@toc(r2)
1865 std r11,STACK_FRAME_OVERHEAD-16(r1)
1866 1: addi r3,r1,STACK_FRAME_OVERHEAD
1870 _KPROBE(do_uaccess_flush)
1871 UACCESS_FLUSH_FIXUP_SECTION
1876 L1D_DISPLACEMENT_FLUSH