2 * Helper routines to scan the device tree for PCI devices and busses
4 * Migrated out of PowerPC architecture pci_64.c file by Grant Likely
5 * <grant.likely@secretlab.ca> so that these routines are available for
8 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
9 * Rework, based on alpha PCI code.
10 * Copyright (c) 2009 Secret Lab Technologies Ltd.
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
17 #include <linux/pci.h>
18 #include <linux/export.h>
19 #include <asm/pci-bridge.h>
23 * get_int_prop - Decode a u32 from a device tree property
25 static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
30 prop = of_get_property(np, name, &len);
32 return of_read_number(prop, 1);
37 * pci_parse_of_flags - Parse the flags cell of a device tree PCI address
38 * @addr0: value of 1st cell of a device tree PCI address.
39 * @bridge: Set this flag if the address is from a bridge 'ranges' property
41 static unsigned int pci_parse_of_flags(u32 addr0, int bridge)
43 unsigned int flags = 0;
45 if (addr0 & 0x02000000) {
46 flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
47 flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
48 if (flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
49 flags |= IORESOURCE_MEM_64;
50 flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
51 if (addr0 & 0x40000000)
52 flags |= IORESOURCE_PREFETCH
53 | PCI_BASE_ADDRESS_MEM_PREFETCH;
54 /* Note: We don't know whether the ROM has been left enabled
55 * by the firmware or not. We mark it as disabled (ie, we do
56 * not set the IORESOURCE_ROM_ENABLE flag) for now rather than
57 * do a config space read, it will be force-enabled if needed
59 if (!bridge && (addr0 & 0xff) == 0x30)
60 flags |= IORESOURCE_READONLY;
61 } else if (addr0 & 0x01000000)
62 flags = IORESOURCE_IO | PCI_BASE_ADDRESS_SPACE_IO;
64 flags |= IORESOURCE_SIZEALIGN;
69 * of_pci_parse_addrs - Parse PCI addresses assigned in the device tree node
70 * @node: device tree node for the PCI device
71 * @dev: pci_dev structure for the device
73 * This function parses the 'assigned-addresses' property of a PCI devices'
74 * device tree node and writes them into the associated pci_dev structure.
76 static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
80 struct pci_bus_region region;
85 bool mark_unset = false;
87 addrs = of_get_property(node, "assigned-addresses", &proplen);
88 if (!addrs || !proplen) {
89 addrs = of_get_property(node, "reg", &proplen);
90 if (!addrs || !proplen)
95 pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
96 for (; proplen >= 20; proplen -= 20, addrs += 5) {
97 flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
100 base = of_read_number(&addrs[1], 2);
101 size = of_read_number(&addrs[3], 2);
104 i = of_read_number(addrs, 1) & 0xff;
105 pr_debug(" base: %llx, size: %llx, i: %x\n",
106 (unsigned long long)base,
107 (unsigned long long)size, i);
109 if (PCI_BASE_ADDRESS_0 <= i && i <= PCI_BASE_ADDRESS_5) {
110 res = &dev->resource[(i - PCI_BASE_ADDRESS_0) >> 2];
111 } else if (i == dev->rom_base_reg) {
112 res = &dev->resource[PCI_ROM_RESOURCE];
113 flags |= IORESOURCE_READONLY;
115 printk(KERN_ERR "PCI: bad cfg reg num 0x%x\n", i);
120 res->flags |= IORESOURCE_UNSET;
121 res->name = pci_name(dev);
123 region.end = base + size - 1;
124 pcibios_bus_to_resource(dev->bus, res, ®ion);
129 * of_create_pci_dev - Given a device tree node on a pci bus, create a pci_dev
130 * @node: device tree node pointer
131 * @bus: bus the device is sitting on
132 * @devfn: PCI function number, extracted from device tree by caller.
134 struct pci_dev *of_create_pci_dev(struct device_node *node,
135 struct pci_bus *bus, int devfn)
140 dev = pci_alloc_dev(bus);
143 type = of_get_property(node, "device_type", NULL);
147 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type);
149 dev->dev.of_node = of_node_get(node);
150 dev->dev.parent = bus->bridge;
151 dev->dev.bus = &pci_bus_type;
153 dev->multifunction = 0; /* maybe a lie? */
154 dev->needs_freset = 0; /* pcie fundamental reset required */
155 set_pcie_port_type(dev);
157 pci_dev_assign_slot(dev);
158 dev->vendor = get_int_prop(node, "vendor-id", 0xffff);
159 dev->device = get_int_prop(node, "device-id", 0xffff);
160 dev->subsystem_vendor = get_int_prop(node, "subsystem-vendor-id", 0);
161 dev->subsystem_device = get_int_prop(node, "subsystem-id", 0);
163 dev->cfg_size = pci_cfg_space_size(dev);
165 dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(bus),
166 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn));
167 dev->class = get_int_prop(node, "class-code", 0);
168 dev->revision = get_int_prop(node, "revision-id", 0);
170 pr_debug(" class: 0x%x\n", dev->class);
171 pr_debug(" revision: 0x%x\n", dev->revision);
173 dev->current_state = PCI_UNKNOWN; /* unknown power state */
174 dev->error_state = pci_channel_io_normal;
175 dev->dma_mask = 0xffffffff;
177 /* Early fixups, before probing the BARs */
178 pci_fixup_device(pci_fixup_early, dev);
180 if (!strcmp(type, "pci") || !strcmp(type, "pciex")) {
181 /* a PCI-PCI bridge */
182 dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;
183 dev->rom_base_reg = PCI_ROM_ADDRESS1;
184 set_pcie_hotplug_bridge(dev);
185 } else if (!strcmp(type, "cardbus")) {
186 dev->hdr_type = PCI_HEADER_TYPE_CARDBUS;
188 dev->hdr_type = PCI_HEADER_TYPE_NORMAL;
189 dev->rom_base_reg = PCI_ROM_ADDRESS;
190 /* Maybe do a default OF mapping here */
194 of_pci_parse_addrs(node, dev);
196 pr_debug(" adding to system ...\n");
198 pci_device_add(dev, bus);
200 /* Setup MSI caps & disable MSI/MSI-X interrupts */
201 pci_msi_setup_pci_dev(dev);
205 EXPORT_SYMBOL(of_create_pci_dev);
208 * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
209 * @dev: pci_dev structure for the bridge
211 * of_scan_bus() calls this routine for each PCI bridge that it finds, and
212 * this routine in turn call of_scan_bus() recusively to scan for more child
215 void of_scan_pci_bridge(struct pci_dev *dev)
217 struct device_node *node = dev->dev.of_node;
219 struct pci_controller *phb;
220 const __be32 *busrange, *ranges;
222 struct pci_bus_region region;
223 struct resource *res;
227 pr_debug("of_scan_pci_bridge(%s)\n", node->full_name);
229 /* parse bus-range property */
230 busrange = of_get_property(node, "bus-range", &len);
231 if (busrange == NULL || len != 8) {
232 printk(KERN_DEBUG "Can't get bus-range for PCI-PCI bridge %s\n",
236 ranges = of_get_property(node, "ranges", &len);
237 if (ranges == NULL) {
238 printk(KERN_DEBUG "Can't get ranges for PCI-PCI bridge %s\n",
243 bus = pci_find_bus(pci_domain_nr(dev->bus),
244 of_read_number(busrange, 1));
246 bus = pci_add_new_bus(dev->bus, dev,
247 of_read_number(busrange, 1));
249 printk(KERN_ERR "Failed to create pci bus for %s\n",
255 bus->primary = dev->bus->number;
256 pci_bus_insert_busn_res(bus, of_read_number(busrange, 1),
257 of_read_number(busrange+1, 1));
260 /* parse ranges property */
261 /* PCI #address-cells == 3 and #size-cells == 2 always */
262 res = &dev->resource[PCI_BRIDGE_RESOURCES];
263 for (i = 0; i < PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES; ++i) {
265 bus->resource[i] = res;
269 for (; len >= 32; len -= 32, ranges += 8) {
270 flags = pci_parse_of_flags(of_read_number(ranges, 1), 1);
271 size = of_read_number(&ranges[6], 2);
272 if (flags == 0 || size == 0)
274 if (flags & IORESOURCE_IO) {
275 res = bus->resource[0];
277 printk(KERN_ERR "PCI: ignoring extra I/O range"
278 " for bridge %s\n", node->full_name);
282 if (i >= PCI_NUM_RESOURCES - PCI_BRIDGE_RESOURCES) {
283 printk(KERN_ERR "PCI: too many memory ranges"
284 " for bridge %s\n", node->full_name);
287 res = bus->resource[i];
291 region.start = of_read_number(&ranges[1], 2);
292 region.end = region.start + size - 1;
293 pcibios_bus_to_resource(dev->bus, res, ®ion);
295 sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
297 pr_debug(" bus name: %s\n", bus->name);
299 phb = pci_bus_to_host(bus);
301 mode = PCI_PROBE_NORMAL;
302 if (phb->controller_ops.probe_mode)
303 mode = phb->controller_ops.probe_mode(bus);
304 pr_debug(" probe mode: %d\n", mode);
306 if (mode == PCI_PROBE_DEVTREE)
307 of_scan_bus(node, bus);
308 else if (mode == PCI_PROBE_NORMAL)
309 pci_scan_child_bus(bus);
311 EXPORT_SYMBOL(of_scan_pci_bridge);
313 static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
314 struct device_node *dn)
316 struct pci_dev *dev = NULL;
320 struct eeh_dev *edev = pdn_to_eeh_dev(PCI_DN(dn));
323 pr_debug(" * %s\n", dn->full_name);
324 if (!of_device_is_available(dn))
327 reg = of_get_property(dn, "reg", ®len);
328 if (reg == NULL || reglen < 20)
330 devfn = (of_read_number(reg, 1) >> 8) & 0xff;
332 /* Check if the PCI device is already there */
333 dev = pci_get_slot(bus, devfn);
339 /* Device removed permanently ? */
341 if (edev && (edev->mode & EEH_DEV_REMOVED))
345 /* create a new pci_dev for this device */
346 dev = of_create_pci_dev(dn, bus, devfn);
350 pr_debug(" dev header type: %x\n", dev->hdr_type);
355 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
356 * @node: device tree node for the PCI bus
357 * @bus: pci_bus structure for the PCI bus
358 * @rescan_existing: Flag indicating bus has already been set up
360 static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
363 struct device_node *child;
366 pr_debug("of_scan_bus(%s) bus no %d...\n",
367 node->full_name, bus->number);
369 /* Scan direct children */
370 for_each_child_of_node(node, child) {
371 dev = of_scan_pci_dev(bus, child);
374 pr_debug(" dev header type: %x\n", dev->hdr_type);
377 /* Apply all fixups necessary. We don't fixup the bus "self"
378 * for an existing bridge that is being rescanned
380 if (!rescan_existing)
381 pcibios_setup_bus_self(bus);
382 pcibios_setup_bus_devices(bus);
384 /* Now scan child busses */
385 list_for_each_entry(dev, &bus->devices, bus_list) {
386 if (pci_is_bridge(dev)) {
387 of_scan_pci_bridge(dev);
393 * of_scan_bus - given a PCI bus node, setup bus and scan for child devices
394 * @node: device tree node for the PCI bus
395 * @bus: pci_bus structure for the PCI bus
397 void of_scan_bus(struct device_node *node, struct pci_bus *bus)
399 __of_scan_bus(node, bus, 0);
401 EXPORT_SYMBOL_GPL(of_scan_bus);
404 * of_rescan_bus - given a PCI bus node, scan for child devices
405 * @node: device tree node for the PCI bus
406 * @bus: pci_bus structure for the PCI bus
408 * Same as of_scan_bus, but for a pci_bus structure that has already been
411 void of_rescan_bus(struct device_node *node, struct pci_bus *bus)
413 __of_scan_bus(node, bus, 1);
415 EXPORT_SYMBOL_GPL(of_rescan_bus);