arch/powerpc/kernel/ptrace.c

   1 /*
   2  *  PowerPC version
   3  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
   4  *
   5  *  Derived from "arch/m68k/kernel/ptrace.c"
   6  *  Copyright (C) 1994 by Hamish Macdonald
   7  *  Taken from linux/kernel/ptrace.c and modified for M680x0.
   8  *  linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
   9  *
  10  * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11  * and Paul Mackerras (paulus@samba.org).
  12  *
  13  * This file is subject to the terms and conditions of the GNU General
  14  * Public License.  See the file README.legal in the main directory of
  15  * this archive for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/sched.h>
  20 #include <linux/mm.h>
  21 #include <linux/smp.h>
  22 #include <linux/errno.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/regset.h>
  25 #include <linux/tracehook.h>
  26 #include <linux/elf.h>
  27 #include <linux/user.h>
  28 #include <linux/security.h>
  29 #include <linux/signal.h>
  30 #include <linux/seccomp.h>
  31 #include <linux/audit.h>
  32 #include <trace/syscall.h>
  33 #include <linux/hw_breakpoint.h>
  34 #include <linux/perf_event.h>
  35 #include <linux/context_tracking.h>
  36
  37 #include <linux/uaccess.h>
  38 #include <linux/pkeys.h>
  39 #include <asm/page.h>
  40 #include <asm/pgtable.h>
  41 #include <asm/switch_to.h>
  42 #include <asm/tm.h>
  43 #include <asm/asm-prototypes.h>
  44 #include <asm/debug.h>
  45
  46 #define CREATE_TRACE_POINTS
  47 #include <trace/events/syscalls.h>
  48
  49 /*
  50  * The parameter save area on the stack is used to store arguments being passed
  51  * to callee function and is located at fixed offset from stack pointer.
  52  */
  53 #ifdef CONFIG_PPC32
  54 #define PARAMETER_SAVE_AREA_OFFSET      24  /* bytes */
  55 #else /* CONFIG_PPC32 */
  56 #define PARAMETER_SAVE_AREA_OFFSET      48  /* bytes */
  57 #endif
  58
  59 struct pt_regs_offset {
  60         const char *name;
  61         int offset;
  62 };
  63
  64 #define STR(s)  #s                      /* convert to string */
  65 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  66 #define GPR_OFFSET_NAME(num)    \
  67         {.name = STR(r##num), .offset = offsetof(struct pt_regs, gpr[num])}, \
  68         {.name = STR(gpr##num), .offset = offsetof(struct pt_regs, gpr[num])}
  69 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  70
  71 #define TVSO(f) (offsetof(struct thread_vr_state, f))
  72 #define TFSO(f) (offsetof(struct thread_fp_state, f))
  73 #define TSO(f)  (offsetof(struct thread_struct, f))
  74
  75 static const struct pt_regs_offset regoffset_table[] = {
  76         GPR_OFFSET_NAME(0),
  77         GPR_OFFSET_NAME(1),
  78         GPR_OFFSET_NAME(2),
  79         GPR_OFFSET_NAME(3),
  80         GPR_OFFSET_NAME(4),
  81         GPR_OFFSET_NAME(5),
  82         GPR_OFFSET_NAME(6),
  83         GPR_OFFSET_NAME(7),
  84         GPR_OFFSET_NAME(8),
  85         GPR_OFFSET_NAME(9),
  86         GPR_OFFSET_NAME(10),
  87         GPR_OFFSET_NAME(11),
  88         GPR_OFFSET_NAME(12),
  89         GPR_OFFSET_NAME(13),
  90         GPR_OFFSET_NAME(14),
  91         GPR_OFFSET_NAME(15),
  92         GPR_OFFSET_NAME(16),
  93         GPR_OFFSET_NAME(17),
  94         GPR_OFFSET_NAME(18),
  95         GPR_OFFSET_NAME(19),
  96         GPR_OFFSET_NAME(20),
  97         GPR_OFFSET_NAME(21),
  98         GPR_OFFSET_NAME(22),
  99         GPR_OFFSET_NAME(23),
 100         GPR_OFFSET_NAME(24),
 101         GPR_OFFSET_NAME(25),
 102         GPR_OFFSET_NAME(26),
 103         GPR_OFFSET_NAME(27),
 104         GPR_OFFSET_NAME(28),
 105         GPR_OFFSET_NAME(29),
 106         GPR_OFFSET_NAME(30),
 107         GPR_OFFSET_NAME(31),
 108         REG_OFFSET_NAME(nip),
 109         REG_OFFSET_NAME(msr),
 110         REG_OFFSET_NAME(ctr),
 111         REG_OFFSET_NAME(link),
 112         REG_OFFSET_NAME(xer),
 113         REG_OFFSET_NAME(ccr),
 114 #ifdef CONFIG_PPC64
 115         REG_OFFSET_NAME(softe),
 116 #else
 117         REG_OFFSET_NAME(mq),
 118 #endif
 119         REG_OFFSET_NAME(trap),
 120         REG_OFFSET_NAME(dar),
 121         REG_OFFSET_NAME(dsisr),
 122         REG_OFFSET_END,
 123 };
 124
 125 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 126 static void flush_tmregs_to_thread(struct task_struct *tsk)
 127 {
 128         /*
 129          * If task is not current, it will have been flushed already to
 130          * it's thread_struct during __switch_to().
 131          *
 132          * A reclaim flushes ALL the state or if not in TM save TM SPRs
 133          * in the appropriate thread structures from live.
 134          */
 135
 136         if ((!cpu_has_feature(CPU_FTR_TM)) || (tsk != current))
 137                 return;
 138
 139         if (MSR_TM_SUSPENDED(mfmsr())) {
 140                 tm_reclaim_current(TM_CAUSE_SIGNAL);
 141         } else {
 142                 tm_enable();
 143                 tm_save_sprs(&(tsk->thread));
 144         }
 145 }
 146 #else
 147 static inline void flush_tmregs_to_thread(struct task_struct *tsk) { }
 148 #endif
 149
 150 /**
 151  * regs_query_register_offset() - query register offset from its name
 152  * @name:       the name of a register
 153  *
 154  * regs_query_register_offset() returns the offset of a register in struct
 155  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 156  */
 157 int regs_query_register_offset(const char *name)
 158 {
 159         const struct pt_regs_offset *roff;
 160         for (roff = regoffset_table; roff->name != NULL; roff++)
 161                 if (!strcmp(roff->name, name))
 162                         return roff->offset;
 163         return -EINVAL;
 164 }
 165
 166 /**
 167  * regs_query_register_name() - query register name from its offset
 168  * @offset:     the offset of a register in struct pt_regs.
 169  *
 170  * regs_query_register_name() returns the name of a register from its
 171  * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
 172  */
 173 const char *regs_query_register_name(unsigned int offset)
 174 {
 175         const struct pt_regs_offset *roff;
 176         for (roff = regoffset_table; roff->name != NULL; roff++)
 177                 if (roff->offset == offset)
 178                         return roff->name;
 179         return NULL;
 180 }
 181
 182 /*
 183  * does not yet catch signals sent when the child dies.
 184  * in exit.c or in signal.c.
 185  */
 186
 187 /*
 188  * Set of msr bits that gdb can change on behalf of a process.
 189  */
 190 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
 191 #define MSR_DEBUGCHANGE 0
 192 #else
 193 #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
 194 #endif
 195
 196 /*
 197  * Max register writeable via put_reg
 198  */
 199 #ifdef CONFIG_PPC32
 200 #define PT_MAX_PUT_REG  PT_MQ
 201 #else
 202 #define PT_MAX_PUT_REG  PT_CCR
 203 #endif
 204
 205 static unsigned long get_user_msr(struct task_struct *task)
 206 {
 207         return task->thread.regs->msr | task->thread.fpexc_mode;
 208 }
 209
 210 static int set_user_msr(struct task_struct *task, unsigned long msr)
 211 {
 212         task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
 213         task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
 214         return 0;
 215 }
 216
 217 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 218 static unsigned long get_user_ckpt_msr(struct task_struct *task)
 219 {
 220         return task->thread.ckpt_regs.msr | task->thread.fpexc_mode;
 221 }
 222
 223 static int set_user_ckpt_msr(struct task_struct *task, unsigned long msr)
 224 {
 225         task->thread.ckpt_regs.msr &= ~MSR_DEBUGCHANGE;
 226         task->thread.ckpt_regs.msr |= msr & MSR_DEBUGCHANGE;
 227         return 0;
 228 }
 229
 230 static int set_user_ckpt_trap(struct task_struct *task, unsigned long trap)
 231 {
 232         task->thread.ckpt_regs.trap = trap & 0xfff0;
 233         return 0;
 234 }
 235 #endif
 236
 237 #ifdef CONFIG_PPC64
 238 static int get_user_dscr(struct task_struct *task, unsigned long *data)
 239 {
 240         *data = task->thread.dscr;
 241         return 0;
 242 }
 243
 244 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
 245 {
 246         task->thread.dscr = dscr;
 247         task->thread.dscr_inherit = 1;
 248         return 0;
 249 }
 250 #else
 251 static int get_user_dscr(struct task_struct *task, unsigned long *data)
 252 {
 253         return -EIO;
 254 }
 255
 256 static int set_user_dscr(struct task_struct *task, unsigned long dscr)
 257 {
 258         return -EIO;
 259 }
 260 #endif
 261
 262 /*
 263  * We prevent mucking around with the reserved area of trap
 264  * which are used internally by the kernel.
 265  */
 266 static int set_user_trap(struct task_struct *task, unsigned long trap)
 267 {
 268         task->thread.regs->trap = trap & 0xfff0;
 269         return 0;
 270 }
 271
 272 /*
 273  * Get contents of register REGNO in task TASK.
 274  */
 275 int ptrace_get_reg(struct task_struct *task, int regno, unsigned long *data)
 276 {
 277         if ((task->thread.regs == NULL) || !data)
 278                 return -EIO;
 279
 280         if (regno == PT_MSR) {
 281                 *data = get_user_msr(task);
 282                 return 0;
 283         }
 284
 285         if (regno == PT_DSCR)
 286                 return get_user_dscr(task, data);
 287
 288 #ifdef CONFIG_PPC64
 289         /*
 290          * softe copies paca->irq_soft_mask variable state. Since irq_soft_mask is
 291          * no more used as a flag, lets force usr to alway see the softe value as 1
 292          * which means interrupts are not soft disabled.
 293          */
 294         if (regno == PT_SOFTE) {
 295                 *data = 1;
 296                 return  0;
 297         }
 298 #endif
 299
 300         if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long))) {
 301                 *data = ((unsigned long *)task->thread.regs)[regno];
 302                 return 0;
 303         }
 304
 305         return -EIO;
 306 }
 307
 308 /*
 309  * Write contents of register REGNO in task TASK.
 310  */
 311 int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
 312 {
 313         if (task->thread.regs == NULL)
 314                 return -EIO;
 315
 316         if (regno == PT_MSR)
 317                 return set_user_msr(task, data);
 318         if (regno == PT_TRAP)
 319                 return set_user_trap(task, data);
 320         if (regno == PT_DSCR)
 321                 return set_user_dscr(task, data);
 322
 323         if (regno <= PT_MAX_PUT_REG) {
 324                 ((unsigned long *)task->thread.regs)[regno] = data;
 325                 return 0;
 326         }
 327         return -EIO;
 328 }
 329
 330 static int gpr_get(struct task_struct *target, const struct user_regset *regset,
 331                    unsigned int pos, unsigned int count,
 332                    void *kbuf, void __user *ubuf)
 333 {
 334         int i, ret;
 335
 336         if (target->thread.regs == NULL)
 337                 return -EIO;
 338
 339         if (!FULL_REGS(target->thread.regs)) {
 340                 /* We have a partial register set.  Fill 14-31 with bogus values */
 341                 for (i = 14; i < 32; i++)
 342                         target->thread.regs->gpr[i] = NV_REG_POISON;
 343         }
 344
 345         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 346                                   target->thread.regs,
 347                                   0, offsetof(struct pt_regs, msr));
 348         if (!ret) {
 349                 unsigned long msr = get_user_msr(target);
 350                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 351                                           offsetof(struct pt_regs, msr),
 352                                           offsetof(struct pt_regs, msr) +
 353                                           sizeof(msr));
 354         }
 355
 356         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 357                      offsetof(struct pt_regs, msr) + sizeof(long));
 358
 359         if (!ret)
 360                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 361                                           &target->thread.regs->orig_gpr3,
 362                                           offsetof(struct pt_regs, orig_gpr3),
 363                                           sizeof(struct pt_regs));
 364         if (!ret)
 365                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 366                                                sizeof(struct pt_regs), -1);
 367
 368         return ret;
 369 }
 370
 371 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 372                    unsigned int pos, unsigned int count,
 373                    const void *kbuf, const void __user *ubuf)
 374 {
 375         unsigned long reg;
 376         int ret;
 377
 378         if (target->thread.regs == NULL)
 379                 return -EIO;
 380
 381         CHECK_FULL_REGS(target->thread.regs);
 382
 383         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 384                                  target->thread.regs,
 385                                  0, PT_MSR * sizeof(reg));
 386
 387         if (!ret && count > 0) {
 388                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 389                                          PT_MSR * sizeof(reg),
 390                                          (PT_MSR + 1) * sizeof(reg));
 391                 if (!ret)
 392                         ret = set_user_msr(target, reg);
 393         }
 394
 395         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 396                      offsetof(struct pt_regs, msr) + sizeof(long));
 397
 398         if (!ret)
 399                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 400                                          &target->thread.regs->orig_gpr3,
 401                                          PT_ORIG_R3 * sizeof(reg),
 402                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 403
 404         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 405                 ret = user_regset_copyin_ignore(
 406                         &pos, &count, &kbuf, &ubuf,
 407                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 408                         PT_TRAP * sizeof(reg));
 409
 410         if (!ret && count > 0) {
 411                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 412                                          PT_TRAP * sizeof(reg),
 413                                          (PT_TRAP + 1) * sizeof(reg));
 414                 if (!ret)
 415                         ret = set_user_trap(target, reg);
 416         }
 417
 418         if (!ret)
 419                 ret = user_regset_copyin_ignore(
 420                         &pos, &count, &kbuf, &ubuf,
 421                         (PT_TRAP + 1) * sizeof(reg), -1);
 422
 423         return ret;
 424 }
 425
 426 /*
 427  * Regardless of transactions, 'fp_state' holds the current running
 428  * value of all FPR registers and 'ckfp_state' holds the last checkpointed
 429  * value of all FPR registers for the current transaction.
 430  *
 431  * Userspace interface buffer layout:
 432  *
 433  * struct data {
 434  *      u64     fpr[32];
 435  *      u64     fpscr;
 436  * };
 437  */
 438 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 439                    unsigned int pos, unsigned int count,
 440                    void *kbuf, void __user *ubuf)
 441 {
 442 #ifdef CONFIG_VSX
 443         u64 buf[33];
 444         int i;
 445
 446         flush_fp_to_thread(target);
 447
 448         /* copy to local buffer then write that out */
 449         for (i = 0; i < 32 ; i++)
 450                 buf[i] = target->thread.TS_FPR(i);
 451         buf[32] = target->thread.fp_state.fpscr;
 452         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 453 #else
 454         BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
 455                      offsetof(struct thread_fp_state, fpr[32]));
 456
 457         flush_fp_to_thread(target);
 458
 459         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 460                                    &target->thread.fp_state, 0, -1);
 461 #endif
 462 }
 463
 464 /*
 465  * Regardless of transactions, 'fp_state' holds the current running
 466  * value of all FPR registers and 'ckfp_state' holds the last checkpointed
 467  * value of all FPR registers for the current transaction.
 468  *
 469  * Userspace interface buffer layout:
 470  *
 471  * struct data {
 472  *      u64     fpr[32];
 473  *      u64     fpscr;
 474  * };
 475  *
 476  */
 477 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 478                    unsigned int pos, unsigned int count,
 479                    const void *kbuf, const void __user *ubuf)
 480 {
 481 #ifdef CONFIG_VSX
 482         u64 buf[33];
 483         int i;
 484
 485         flush_fp_to_thread(target);
 486
 487         for (i = 0; i < 32 ; i++)
 488                 buf[i] = target->thread.TS_FPR(i);
 489         buf[32] = target->thread.fp_state.fpscr;
 490
 491         /* copy to local buffer then write that out */
 492         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
 493         if (i)
 494                 return i;
 495
 496         for (i = 0; i < 32 ; i++)
 497                 target->thread.TS_FPR(i) = buf[i];
 498         target->thread.fp_state.fpscr = buf[32];
 499         return 0;
 500 #else
 501         BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
 502                      offsetof(struct thread_fp_state, fpr[32]));
 503
 504         flush_fp_to_thread(target);
 505
 506         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 507                                   &target->thread.fp_state, 0, -1);
 508 #endif
 509 }
 510
 511 #ifdef CONFIG_ALTIVEC
 512 /*
 513  * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
 514  * The transfer totals 34 quadword.  Quadwords 0-31 contain the
 515  * corresponding vector registers.  Quadword 32 contains the vscr as the
 516  * last word (offset 12) within that quadword.  Quadword 33 contains the
 517  * vrsave as the first word (offset 0) within the quadword.
 518  *
 519  * This definition of the VMX state is compatible with the current PPC32
 520  * ptrace interface.  This allows signal handling and ptrace to use the
 521  * same structures.  This also simplifies the implementation of a bi-arch
 522  * (combined (32- and 64-bit) gdb.
 523  */
 524
 525 static int vr_active(struct task_struct *target,
 526                      const struct user_regset *regset)
 527 {
 528         flush_altivec_to_thread(target);
 529         return target->thread.used_vr ? regset->n : 0;
 530 }
 531
 532 /*
 533  * Regardless of transactions, 'vr_state' holds the current running
 534  * value of all the VMX registers and 'ckvr_state' holds the last
 535  * checkpointed value of all the VMX registers for the current
 536  * transaction to fall back on in case it aborts.
 537  *
 538  * Userspace interface buffer layout:
 539  *
 540  * struct data {
 541  *      vector128       vr[32];
 542  *      vector128       vscr;
 543  *      vector128       vrsave;
 544  * };
 545  */
 546 static int vr_get(struct task_struct *target, const struct user_regset *regset,
 547                   unsigned int pos, unsigned int count,
 548                   void *kbuf, void __user *ubuf)
 549 {
 550         int ret;
 551
 552         flush_altivec_to_thread(target);
 553
 554         BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
 555                      offsetof(struct thread_vr_state, vr[32]));
 556
 557         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 558                                   &target->thread.vr_state, 0,
 559                                   33 * sizeof(vector128));
 560         if (!ret) {
 561                 /*
 562                  * Copy out only the low-order word of vrsave.
 563                  */
 564                 int start, end;
 565                 union {
 566                         elf_vrreg_t reg;
 567                         u32 word;
 568                 } vrsave;
 569                 memset(&vrsave, 0, sizeof(vrsave));
 570
 571                 vrsave.word = target->thread.vrsave;
 572
 573                 start = 33 * sizeof(vector128);
 574                 end = start + sizeof(vrsave);
 575                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
 576                                           start, end);
 577         }
 578
 579         return ret;
 580 }
 581
 582 /*
 583  * Regardless of transactions, 'vr_state' holds the current running
 584  * value of all the VMX registers and 'ckvr_state' holds the last
 585  * checkpointed value of all the VMX registers for the current
 586  * transaction to fall back on in case it aborts.
 587  *
 588  * Userspace interface buffer layout:
 589  *
 590  * struct data {
 591  *      vector128       vr[32];
 592  *      vector128       vscr;
 593  *      vector128       vrsave;
 594  * };
 595  */
 596 static int vr_set(struct task_struct *target, const struct user_regset *regset,
 597                   unsigned int pos, unsigned int count,
 598                   const void *kbuf, const void __user *ubuf)
 599 {
 600         int ret;
 601
 602         flush_altivec_to_thread(target);
 603
 604         BUILD_BUG_ON(offsetof(struct thread_vr_state, vscr) !=
 605                      offsetof(struct thread_vr_state, vr[32]));
 606
 607         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 608                                  &target->thread.vr_state, 0,
 609                                  33 * sizeof(vector128));
 610         if (!ret && count > 0) {
 611                 /*
 612                  * We use only the first word of vrsave.
 613                  */
 614                 int start, end;
 615                 union {
 616                         elf_vrreg_t reg;
 617                         u32 word;
 618                 } vrsave;
 619                 memset(&vrsave, 0, sizeof(vrsave));
 620
 621                 vrsave.word = target->thread.vrsave;
 622
 623                 start = 33 * sizeof(vector128);
 624                 end = start + sizeof(vrsave);
 625                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
 626                                          start, end);
 627                 if (!ret)
 628                         target->thread.vrsave = vrsave.word;
 629         }
 630
 631         return ret;
 632 }
 633 #endif /* CONFIG_ALTIVEC */
 634
 635 #ifdef CONFIG_VSX
 636 /*
 637  * Currently to set and and get all the vsx state, you need to call
 638  * the fp and VMX calls as well.  This only get/sets the lower 32
 639  * 128bit VSX registers.
 640  */
 641
 642 static int vsr_active(struct task_struct *target,
 643                       const struct user_regset *regset)
 644 {
 645         flush_vsx_to_thread(target);
 646         return target->thread.used_vsr ? regset->n : 0;
 647 }
 648
 649 /*
 650  * Regardless of transactions, 'fp_state' holds the current running
 651  * value of all FPR registers and 'ckfp_state' holds the last
 652  * checkpointed value of all FPR registers for the current
 653  * transaction.
 654  *
 655  * Userspace interface buffer layout:
 656  *
 657  * struct data {
 658  *      u64     vsx[32];
 659  * };
 660  */
 661 static int vsr_get(struct task_struct *target, const struct user_regset *regset,
 662                    unsigned int pos, unsigned int count,
 663                    void *kbuf, void __user *ubuf)
 664 {
 665         u64 buf[32];
 666         int ret, i;
 667
 668         flush_tmregs_to_thread(target);
 669         flush_fp_to_thread(target);
 670         flush_altivec_to_thread(target);
 671         flush_vsx_to_thread(target);
 672
 673         for (i = 0; i < 32 ; i++)
 674                 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
 675
 676         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 677                                   buf, 0, 32 * sizeof(double));
 678
 679         return ret;
 680 }
 681
 682 /*
 683  * Regardless of transactions, 'fp_state' holds the current running
 684  * value of all FPR registers and 'ckfp_state' holds the last
 685  * checkpointed value of all FPR registers for the current
 686  * transaction.
 687  *
 688  * Userspace interface buffer layout:
 689  *
 690  * struct data {
 691  *      u64     vsx[32];
 692  * };
 693  */
 694 static int vsr_set(struct task_struct *target, const struct user_regset *regset,
 695                    unsigned int pos, unsigned int count,
 696                    const void *kbuf, const void __user *ubuf)
 697 {
 698         u64 buf[32];
 699         int ret,i;
 700
 701         flush_tmregs_to_thread(target);
 702         flush_fp_to_thread(target);
 703         flush_altivec_to_thread(target);
 704         flush_vsx_to_thread(target);
 705
 706         for (i = 0; i < 32 ; i++)
 707                 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET];
 708
 709         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 710                                  buf, 0, 32 * sizeof(double));
 711         if (!ret)
 712                 for (i = 0; i < 32 ; i++)
 713                         target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
 714
 715         return ret;
 716 }
 717 #endif /* CONFIG_VSX */
 718
 719 #ifdef CONFIG_SPE
 720
 721 /*
 722  * For get_evrregs/set_evrregs functions 'data' has the following layout:
 723  *
 724  * struct {
 725  *   u32 evr[32];
 726  *   u64 acc;
 727  *   u32 spefscr;
 728  * }
 729  */
 730
 731 static int evr_active(struct task_struct *target,
 732                       const struct user_regset *regset)
 733 {
 734         flush_spe_to_thread(target);
 735         return target->thread.used_spe ? regset->n : 0;
 736 }
 737
 738 static int evr_get(struct task_struct *target, const struct user_regset *regset,
 739                    unsigned int pos, unsigned int count,
 740                    void *kbuf, void __user *ubuf)
 741 {
 742         int ret;
 743
 744         flush_spe_to_thread(target);
 745
 746         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 747                                   &target->thread.evr,
 748                                   0, sizeof(target->thread.evr));
 749
 750         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 751                      offsetof(struct thread_struct, spefscr));
 752
 753         if (!ret)
 754                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 755                                           &target->thread.acc,
 756                                           sizeof(target->thread.evr), -1);
 757
 758         return ret;
 759 }
 760
 761 static int evr_set(struct task_struct *target, const struct user_regset *regset,
 762                    unsigned int pos, unsigned int count,
 763                    const void *kbuf, const void __user *ubuf)
 764 {
 765         int ret;
 766
 767         flush_spe_to_thread(target);
 768
 769         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 770                                  &target->thread.evr,
 771                                  0, sizeof(target->thread.evr));
 772
 773         BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
 774                      offsetof(struct thread_struct, spefscr));
 775
 776         if (!ret)
 777                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 778                                          &target->thread.acc,
 779                                          sizeof(target->thread.evr), -1);
 780
 781         return ret;
 782 }
 783 #endif /* CONFIG_SPE */
 784
 785 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 786 /**
 787  * tm_cgpr_active - get active number of registers in CGPR
 788  * @target:     The target task.
 789  * @regset:     The user regset structure.
 790  *
 791  * This function checks for the active number of available
 792  * regisers in transaction checkpointed GPR category.
 793  */
 794 static int tm_cgpr_active(struct task_struct *target,
 795                           const struct user_regset *regset)
 796 {
 797         if (!cpu_has_feature(CPU_FTR_TM))
 798                 return -ENODEV;
 799
 800         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
 801                 return 0;
 802
 803         return regset->n;
 804 }
 805
 806 /**
 807  * tm_cgpr_get - get CGPR registers
 808  * @target:     The target task.
 809  * @regset:     The user regset structure.
 810  * @pos:        The buffer position.
 811  * @count:      Number of bytes to copy.
 812  * @kbuf:       Kernel buffer to copy from.
 813  * @ubuf:       User buffer to copy into.
 814  *
 815  * This function gets transaction checkpointed GPR registers.
 816  *
 817  * When the transaction is active, 'ckpt_regs' holds all the checkpointed
 818  * GPR register values for the current transaction to fall back on if it
 819  * aborts in between. This function gets those checkpointed GPR registers.
 820  * The userspace interface buffer layout is as follows.
 821  *
 822  * struct data {
 823  *      struct pt_regs ckpt_regs;
 824  * };
 825  */
 826 static int tm_cgpr_get(struct task_struct *target,
 827                         const struct user_regset *regset,
 828                         unsigned int pos, unsigned int count,
 829                         void *kbuf, void __user *ubuf)
 830 {
 831         int ret;
 832
 833         if (!cpu_has_feature(CPU_FTR_TM))
 834                 return -ENODEV;
 835
 836         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
 837                 return -ENODATA;
 838
 839         flush_tmregs_to_thread(target);
 840         flush_fp_to_thread(target);
 841         flush_altivec_to_thread(target);
 842
 843         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 844                                   &target->thread.ckpt_regs,
 845                                   0, offsetof(struct pt_regs, msr));
 846         if (!ret) {
 847                 unsigned long msr = get_user_ckpt_msr(target);
 848
 849                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
 850                                           offsetof(struct pt_regs, msr),
 851                                           offsetof(struct pt_regs, msr) +
 852                                           sizeof(msr));
 853         }
 854
 855         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 856                      offsetof(struct pt_regs, msr) + sizeof(long));
 857
 858         if (!ret)
 859                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 860                                           &target->thread.ckpt_regs.orig_gpr3,
 861                                           offsetof(struct pt_regs, orig_gpr3),
 862                                           sizeof(struct pt_regs));
 863         if (!ret)
 864                 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
 865                                                sizeof(struct pt_regs), -1);
 866
 867         return ret;
 868 }
 869
 870 /*
 871  * tm_cgpr_set - set the CGPR registers
 872  * @target:     The target task.
 873  * @regset:     The user regset structure.
 874  * @pos:        The buffer position.
 875  * @count:      Number of bytes to copy.
 876  * @kbuf:       Kernel buffer to copy into.
 877  * @ubuf:       User buffer to copy from.
 878  *
 879  * This function sets in transaction checkpointed GPR registers.
 880  *
 881  * When the transaction is active, 'ckpt_regs' holds the checkpointed
 882  * GPR register values for the current transaction to fall back on if it
 883  * aborts in between. This function sets those checkpointed GPR registers.
 884  * The userspace interface buffer layout is as follows.
 885  *
 886  * struct data {
 887  *      struct pt_regs ckpt_regs;
 888  * };
 889  */
 890 static int tm_cgpr_set(struct task_struct *target,
 891                         const struct user_regset *regset,
 892                         unsigned int pos, unsigned int count,
 893                         const void *kbuf, const void __user *ubuf)
 894 {
 895         unsigned long reg;
 896         int ret;
 897
 898         if (!cpu_has_feature(CPU_FTR_TM))
 899                 return -ENODEV;
 900
 901         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
 902                 return -ENODATA;
 903
 904         flush_tmregs_to_thread(target);
 905         flush_fp_to_thread(target);
 906         flush_altivec_to_thread(target);
 907
 908         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 909                                  &target->thread.ckpt_regs,
 910                                  0, PT_MSR * sizeof(reg));
 911
 912         if (!ret && count > 0) {
 913                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 914                                          PT_MSR * sizeof(reg),
 915                                          (PT_MSR + 1) * sizeof(reg));
 916                 if (!ret)
 917                         ret = set_user_ckpt_msr(target, reg);
 918         }
 919
 920         BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
 921                      offsetof(struct pt_regs, msr) + sizeof(long));
 922
 923         if (!ret)
 924                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 925                                          &target->thread.ckpt_regs.orig_gpr3,
 926                                          PT_ORIG_R3 * sizeof(reg),
 927                                          (PT_MAX_PUT_REG + 1) * sizeof(reg));
 928
 929         if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
 930                 ret = user_regset_copyin_ignore(
 931                         &pos, &count, &kbuf, &ubuf,
 932                         (PT_MAX_PUT_REG + 1) * sizeof(reg),
 933                         PT_TRAP * sizeof(reg));
 934
 935         if (!ret && count > 0) {
 936                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
 937                                          PT_TRAP * sizeof(reg),
 938                                          (PT_TRAP + 1) * sizeof(reg));
 939                 if (!ret)
 940                         ret = set_user_ckpt_trap(target, reg);
 941         }
 942
 943         if (!ret)
 944                 ret = user_regset_copyin_ignore(
 945                         &pos, &count, &kbuf, &ubuf,
 946                         (PT_TRAP + 1) * sizeof(reg), -1);
 947
 948         return ret;
 949 }
 950
 951 /**
 952  * tm_cfpr_active - get active number of registers in CFPR
 953  * @target:     The target task.
 954  * @regset:     The user regset structure.
 955  *
 956  * This function checks for the active number of available
 957  * regisers in transaction checkpointed FPR category.
 958  */
 959 static int tm_cfpr_active(struct task_struct *target,
 960                                 const struct user_regset *regset)
 961 {
 962         if (!cpu_has_feature(CPU_FTR_TM))
 963                 return -ENODEV;
 964
 965         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
 966                 return 0;
 967
 968         return regset->n;
 969 }
 970
 971 /**
 972  * tm_cfpr_get - get CFPR registers
 973  * @target:     The target task.
 974  * @regset:     The user regset structure.
 975  * @pos:        The buffer position.
 976  * @count:      Number of bytes to copy.
 977  * @kbuf:       Kernel buffer to copy from.
 978  * @ubuf:       User buffer to copy into.
 979  *
 980  * This function gets in transaction checkpointed FPR registers.
 981  *
 982  * When the transaction is active 'ckfp_state' holds the checkpointed
 983  * values for the current transaction to fall back on if it aborts
 984  * in between. This function gets those checkpointed FPR registers.
 985  * The userspace interface buffer layout is as follows.
 986  *
 987  * struct data {
 988  *      u64     fpr[32];
 989  *      u64     fpscr;
 990  *};
 991  */
 992 static int tm_cfpr_get(struct task_struct *target,
 993                         const struct user_regset *regset,
 994                         unsigned int pos, unsigned int count,
 995                         void *kbuf, void __user *ubuf)
 996 {
 997         u64 buf[33];
 998         int i;
 999
1000         if (!cpu_has_feature(CPU_FTR_TM))
1001                 return -ENODEV;
1002
1003         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1004                 return -ENODATA;
1005
1006         flush_tmregs_to_thread(target);
1007         flush_fp_to_thread(target);
1008         flush_altivec_to_thread(target);
1009
1010         /* copy to local buffer then write that out */
1011         for (i = 0; i < 32 ; i++)
1012                 buf[i] = target->thread.TS_CKFPR(i);
1013         buf[32] = target->thread.ckfp_state.fpscr;
1014         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
1015 }
1016
1017 /**
1018  * tm_cfpr_set - set CFPR registers
1019  * @target:     The target task.
1020  * @regset:     The user regset structure.
1021  * @pos:        The buffer position.
1022  * @count:      Number of bytes to copy.
1023  * @kbuf:       Kernel buffer to copy into.
1024  * @ubuf:       User buffer to copy from.
1025  *
1026  * This function sets in transaction checkpointed FPR registers.
1027  *
1028  * When the transaction is active 'ckfp_state' holds the checkpointed
1029  * FPR register values for the current transaction to fall back on
1030  * if it aborts in between. This function sets these checkpointed
1031  * FPR registers. The userspace interface buffer layout is as follows.
1032  *
1033  * struct data {
1034  *      u64     fpr[32];
1035  *      u64     fpscr;
1036  *};
1037  */
1038 static int tm_cfpr_set(struct task_struct *target,
1039                         const struct user_regset *regset,
1040                         unsigned int pos, unsigned int count,
1041                         const void *kbuf, const void __user *ubuf)
1042 {
1043         u64 buf[33];
1044         int i;
1045
1046         if (!cpu_has_feature(CPU_FTR_TM))
1047                 return -ENODEV;
1048
1049         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1050                 return -ENODATA;
1051
1052         flush_tmregs_to_thread(target);
1053         flush_fp_to_thread(target);
1054         flush_altivec_to_thread(target);
1055
1056         for (i = 0; i < 32; i++)
1057                 buf[i] = target->thread.TS_CKFPR(i);
1058         buf[32] = target->thread.ckfp_state.fpscr;
1059
1060         /* copy to local buffer then write that out */
1061         i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
1062         if (i)
1063                 return i;
1064         for (i = 0; i < 32 ; i++)
1065                 target->thread.TS_CKFPR(i) = buf[i];
1066         target->thread.ckfp_state.fpscr = buf[32];
1067         return 0;
1068 }
1069
1070 /**
1071  * tm_cvmx_active - get active number of registers in CVMX
1072  * @target:     The target task.
1073  * @regset:     The user regset structure.
1074  *
1075  * This function checks for the active number of available
1076  * regisers in checkpointed VMX category.
1077  */
1078 static int tm_cvmx_active(struct task_struct *target,
1079                                 const struct user_regset *regset)
1080 {
1081         if (!cpu_has_feature(CPU_FTR_TM))
1082                 return -ENODEV;
1083
1084         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1085                 return 0;
1086
1087         return regset->n;
1088 }
1089
1090 /**
1091  * tm_cvmx_get - get CMVX registers
1092  * @target:     The target task.
1093  * @regset:     The user regset structure.
1094  * @pos:        The buffer position.
1095  * @count:      Number of bytes to copy.
1096  * @kbuf:       Kernel buffer to copy from.
1097  * @ubuf:       User buffer to copy into.
1098  *
1099  * This function gets in transaction checkpointed VMX registers.
1100  *
1101  * When the transaction is active 'ckvr_state' and 'ckvrsave' hold
1102  * the checkpointed values for the current transaction to fall
1103  * back on if it aborts in between. The userspace interface buffer
1104  * layout is as follows.
1105  *
1106  * struct data {
1107  *      vector128       vr[32];
1108  *      vector128       vscr;
1109  *      vector128       vrsave;
1110  *};
1111  */
1112 static int tm_cvmx_get(struct task_struct *target,
1113                         const struct user_regset *regset,
1114                         unsigned int pos, unsigned int count,
1115                         void *kbuf, void __user *ubuf)
1116 {
1117         int ret;
1118
1119         BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
1120
1121         if (!cpu_has_feature(CPU_FTR_TM))
1122                 return -ENODEV;
1123
1124         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1125                 return -ENODATA;
1126
1127         /* Flush the state */
1128         flush_tmregs_to_thread(target);
1129         flush_fp_to_thread(target);
1130         flush_altivec_to_thread(target);
1131
1132         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1133                                         &target->thread.ckvr_state, 0,
1134                                         33 * sizeof(vector128));
1135         if (!ret) {
1136                 /*
1137                  * Copy out only the low-order word of vrsave.
1138                  */
1139                 union {
1140                         elf_vrreg_t reg;
1141                         u32 word;
1142                 } vrsave;
1143                 memset(&vrsave, 0, sizeof(vrsave));
1144                 vrsave.word = target->thread.ckvrsave;
1145                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
1146                                                 33 * sizeof(vector128), -1);
1147         }
1148
1149         return ret;
1150 }
1151
1152 /**
1153  * tm_cvmx_set - set CMVX registers
1154  * @target:     The target task.
1155  * @regset:     The user regset structure.
1156  * @pos:        The buffer position.
1157  * @count:      Number of bytes to copy.
1158  * @kbuf:       Kernel buffer to copy into.
1159  * @ubuf:       User buffer to copy from.
1160  *
1161  * This function sets in transaction checkpointed VMX registers.
1162  *
1163  * When the transaction is active 'ckvr_state' and 'ckvrsave' hold
1164  * the checkpointed values for the current transaction to fall
1165  * back on if it aborts in between. The userspace interface buffer
1166  * layout is as follows.
1167  *
1168  * struct data {
1169  *      vector128       vr[32];
1170  *      vector128       vscr;
1171  *      vector128       vrsave;
1172  *};
1173  */
1174 static int tm_cvmx_set(struct task_struct *target,
1175                         const struct user_regset *regset,
1176                         unsigned int pos, unsigned int count,
1177                         const void *kbuf, const void __user *ubuf)
1178 {
1179         int ret;
1180
1181         BUILD_BUG_ON(TVSO(vscr) != TVSO(vr[32]));
1182
1183         if (!cpu_has_feature(CPU_FTR_TM))
1184                 return -ENODEV;
1185
1186         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1187                 return -ENODATA;
1188
1189         flush_tmregs_to_thread(target);
1190         flush_fp_to_thread(target);
1191         flush_altivec_to_thread(target);
1192
1193         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1194                                         &target->thread.ckvr_state, 0,
1195                                         33 * sizeof(vector128));
1196         if (!ret && count > 0) {
1197                 /*
1198                  * We use only the low-order word of vrsave.
1199                  */
1200                 union {
1201                         elf_vrreg_t reg;
1202                         u32 word;
1203                 } vrsave;
1204                 memset(&vrsave, 0, sizeof(vrsave));
1205                 vrsave.word = target->thread.ckvrsave;
1206                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
1207                                                 33 * sizeof(vector128), -1);
1208                 if (!ret)
1209                         target->thread.ckvrsave = vrsave.word;
1210         }
1211
1212         return ret;
1213 }
1214
1215 /**
1216  * tm_cvsx_active - get active number of registers in CVSX
1217  * @target:     The target task.
1218  * @regset:     The user regset structure.
1219  *
1220  * This function checks for the active number of available
1221  * regisers in transaction checkpointed VSX category.
1222  */
1223 static int tm_cvsx_active(struct task_struct *target,
1224                                 const struct user_regset *regset)
1225 {
1226         if (!cpu_has_feature(CPU_FTR_TM))
1227                 return -ENODEV;
1228
1229         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1230                 return 0;
1231
1232         flush_vsx_to_thread(target);
1233         return target->thread.used_vsr ? regset->n : 0;
1234 }
1235
1236 /**
1237  * tm_cvsx_get - get CVSX registers
1238  * @target:     The target task.
1239  * @regset:     The user regset structure.
1240  * @pos:        The buffer position.
1241  * @count:      Number of bytes to copy.
1242  * @kbuf:       Kernel buffer to copy from.
1243  * @ubuf:       User buffer to copy into.
1244  *
1245  * This function gets in transaction checkpointed VSX registers.
1246  *
1247  * When the transaction is active 'ckfp_state' holds the checkpointed
1248  * values for the current transaction to fall back on if it aborts
1249  * in between. This function gets those checkpointed VSX registers.
1250  * The userspace interface buffer layout is as follows.
1251  *
1252  * struct data {
1253  *      u64     vsx[32];
1254  *};
1255  */
1256 static int tm_cvsx_get(struct task_struct *target,
1257                         const struct user_regset *regset,
1258                         unsigned int pos, unsigned int count,
1259                         void *kbuf, void __user *ubuf)
1260 {
1261         u64 buf[32];
1262         int ret, i;
1263
1264         if (!cpu_has_feature(CPU_FTR_TM))
1265                 return -ENODEV;
1266
1267         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1268                 return -ENODATA;
1269
1270         /* Flush the state */
1271         flush_tmregs_to_thread(target);
1272         flush_fp_to_thread(target);
1273         flush_altivec_to_thread(target);
1274         flush_vsx_to_thread(target);
1275
1276         for (i = 0; i < 32 ; i++)
1277                 buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
1278         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1279                                   buf, 0, 32 * sizeof(double));
1280
1281         return ret;
1282 }
1283
1284 /**
1285  * tm_cvsx_set - set CFPR registers
1286  * @target:     The target task.
1287  * @regset:     The user regset structure.
1288  * @pos:        The buffer position.
1289  * @count:      Number of bytes to copy.
1290  * @kbuf:       Kernel buffer to copy into.
1291  * @ubuf:       User buffer to copy from.
1292  *
1293  * This function sets in transaction checkpointed VSX registers.
1294  *
1295  * When the transaction is active 'ckfp_state' holds the checkpointed
1296  * VSX register values for the current transaction to fall back on
1297  * if it aborts in between. This function sets these checkpointed
1298  * FPR registers. The userspace interface buffer layout is as follows.
1299  *
1300  * struct data {
1301  *      u64     vsx[32];
1302  *};
1303  */
1304 static int tm_cvsx_set(struct task_struct *target,
1305                         const struct user_regset *regset,
1306                         unsigned int pos, unsigned int count,
1307                         const void *kbuf, const void __user *ubuf)
1308 {
1309         u64 buf[32];
1310         int ret, i;
1311
1312         if (!cpu_has_feature(CPU_FTR_TM))
1313                 return -ENODEV;
1314
1315         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1316                 return -ENODATA;
1317
1318         /* Flush the state */
1319         flush_tmregs_to_thread(target);
1320         flush_fp_to_thread(target);
1321         flush_altivec_to_thread(target);
1322         flush_vsx_to_thread(target);
1323
1324         for (i = 0; i < 32 ; i++)
1325                 buf[i] = target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET];
1326
1327         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1328                                  buf, 0, 32 * sizeof(double));
1329         if (!ret)
1330                 for (i = 0; i < 32 ; i++)
1331                         target->thread.ckfp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i];
1332
1333         return ret;
1334 }
1335
1336 /**
1337  * tm_spr_active - get active number of registers in TM SPR
1338  * @target:     The target task.
1339  * @regset:     The user regset structure.
1340  *
1341  * This function checks the active number of available
1342  * regisers in the transactional memory SPR category.
1343  */
1344 static int tm_spr_active(struct task_struct *target,
1345                          const struct user_regset *regset)
1346 {
1347         if (!cpu_has_feature(CPU_FTR_TM))
1348                 return -ENODEV;
1349
1350         return regset->n;
1351 }
1352
1353 /**
1354  * tm_spr_get - get the TM related SPR registers
1355  * @target:     The target task.
1356  * @regset:     The user regset structure.
1357  * @pos:        The buffer position.
1358  * @count:      Number of bytes to copy.
1359  * @kbuf:       Kernel buffer to copy from.
1360  * @ubuf:       User buffer to copy into.
1361  *
1362  * This function gets transactional memory related SPR registers.
1363  * The userspace interface buffer layout is as follows.
1364  *
1365  * struct {
1366  *      u64             tm_tfhar;
1367  *      u64             tm_texasr;
1368  *      u64             tm_tfiar;
1369  * };
1370  */
1371 static int tm_spr_get(struct task_struct *target,
1372                       const struct user_regset *regset,
1373                       unsigned int pos, unsigned int count,
1374                       void *kbuf, void __user *ubuf)
1375 {
1376         int ret;
1377
1378         /* Build tests */
1379         BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
1380         BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
1381         BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
1382
1383         if (!cpu_has_feature(CPU_FTR_TM))
1384                 return -ENODEV;
1385
1386         /* Flush the states */
1387         flush_tmregs_to_thread(target);
1388         flush_fp_to_thread(target);
1389         flush_altivec_to_thread(target);
1390
1391         /* TFHAR register */
1392         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1393                                 &target->thread.tm_tfhar, 0, sizeof(u64));
1394
1395         /* TEXASR register */
1396         if (!ret)
1397                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1398                                 &target->thread.tm_texasr, sizeof(u64),
1399                                 2 * sizeof(u64));
1400
1401         /* TFIAR register */
1402         if (!ret)
1403                 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1404                                 &target->thread.tm_tfiar,
1405                                 2 * sizeof(u64), 3 * sizeof(u64));
1406         return ret;
1407 }
1408
1409 /**
1410  * tm_spr_set - set the TM related SPR registers
1411  * @target:     The target task.
1412  * @regset:     The user regset structure.
1413  * @pos:        The buffer position.
1414  * @count:      Number of bytes to copy.
1415  * @kbuf:       Kernel buffer to copy into.
1416  * @ubuf:       User buffer to copy from.
1417  *
1418  * This function sets transactional memory related SPR registers.
1419  * The userspace interface buffer layout is as follows.
1420  *
1421  * struct {
1422  *      u64             tm_tfhar;
1423  *      u64             tm_texasr;
1424  *      u64             tm_tfiar;
1425  * };
1426  */
1427 static int tm_spr_set(struct task_struct *target,
1428                       const struct user_regset *regset,
1429                       unsigned int pos, unsigned int count,
1430                       const void *kbuf, const void __user *ubuf)
1431 {
1432         int ret;
1433
1434         /* Build tests */
1435         BUILD_BUG_ON(TSO(tm_tfhar) + sizeof(u64) != TSO(tm_texasr));
1436         BUILD_BUG_ON(TSO(tm_texasr) + sizeof(u64) != TSO(tm_tfiar));
1437         BUILD_BUG_ON(TSO(tm_tfiar) + sizeof(u64) != TSO(ckpt_regs));
1438
1439         if (!cpu_has_feature(CPU_FTR_TM))
1440                 return -ENODEV;
1441
1442         /* Flush the states */
1443         flush_tmregs_to_thread(target);
1444         flush_fp_to_thread(target);
1445         flush_altivec_to_thread(target);
1446
1447         /* TFHAR register */
1448         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1449                                 &target->thread.tm_tfhar, 0, sizeof(u64));
1450
1451         /* TEXASR register */
1452         if (!ret)
1453                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1454                                 &target->thread.tm_texasr, sizeof(u64),
1455                                 2 * sizeof(u64));
1456
1457         /* TFIAR register */
1458         if (!ret)
1459                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1460                                 &target->thread.tm_tfiar,
1461                                  2 * sizeof(u64), 3 * sizeof(u64));
1462         return ret;
1463 }
1464
1465 static int tm_tar_active(struct task_struct *target,
1466                          const struct user_regset *regset)
1467 {
1468         if (!cpu_has_feature(CPU_FTR_TM))
1469                 return -ENODEV;
1470
1471         if (MSR_TM_ACTIVE(target->thread.regs->msr))
1472                 return regset->n;
1473
1474         return 0;
1475 }
1476
1477 static int tm_tar_get(struct task_struct *target,
1478                       const struct user_regset *regset,
1479                       unsigned int pos, unsigned int count,
1480                       void *kbuf, void __user *ubuf)
1481 {
1482         int ret;
1483
1484         if (!cpu_has_feature(CPU_FTR_TM))
1485                 return -ENODEV;
1486
1487         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1488                 return -ENODATA;
1489
1490         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1491                                 &target->thread.tm_tar, 0, sizeof(u64));
1492         return ret;
1493 }
1494
1495 static int tm_tar_set(struct task_struct *target,
1496                       const struct user_regset *regset,
1497                       unsigned int pos, unsigned int count,
1498                       const void *kbuf, const void __user *ubuf)
1499 {
1500         int ret;
1501
1502         if (!cpu_has_feature(CPU_FTR_TM))
1503                 return -ENODEV;
1504
1505         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1506                 return -ENODATA;
1507
1508         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1509                                 &target->thread.tm_tar, 0, sizeof(u64));
1510         return ret;
1511 }
1512
1513 static int tm_ppr_active(struct task_struct *target,
1514                          const struct user_regset *regset)
1515 {
1516         if (!cpu_has_feature(CPU_FTR_TM))
1517                 return -ENODEV;
1518
1519         if (MSR_TM_ACTIVE(target->thread.regs->msr))
1520                 return regset->n;
1521
1522         return 0;
1523 }
1524
1525
1526 static int tm_ppr_get(struct task_struct *target,
1527                       const struct user_regset *regset,
1528                       unsigned int pos, unsigned int count,
1529                       void *kbuf, void __user *ubuf)
1530 {
1531         int ret;
1532
1533         if (!cpu_has_feature(CPU_FTR_TM))
1534                 return -ENODEV;
1535
1536         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1537                 return -ENODATA;
1538
1539         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1540                                 &target->thread.tm_ppr, 0, sizeof(u64));
1541         return ret;
1542 }
1543
1544 static int tm_ppr_set(struct task_struct *target,
1545                       const struct user_regset *regset,
1546                       unsigned int pos, unsigned int count,
1547                       const void *kbuf, const void __user *ubuf)
1548 {
1549         int ret;
1550
1551         if (!cpu_has_feature(CPU_FTR_TM))
1552                 return -ENODEV;
1553
1554         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1555                 return -ENODATA;
1556
1557         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1558                                 &target->thread.tm_ppr, 0, sizeof(u64));
1559         return ret;
1560 }
1561
1562 static int tm_dscr_active(struct task_struct *target,
1563                          const struct user_regset *regset)
1564 {
1565         if (!cpu_has_feature(CPU_FTR_TM))
1566                 return -ENODEV;
1567
1568         if (MSR_TM_ACTIVE(target->thread.regs->msr))
1569                 return regset->n;
1570
1571         return 0;
1572 }
1573
1574 static int tm_dscr_get(struct task_struct *target,
1575                       const struct user_regset *regset,
1576                       unsigned int pos, unsigned int count,
1577                       void *kbuf, void __user *ubuf)
1578 {
1579         int ret;
1580
1581         if (!cpu_has_feature(CPU_FTR_TM))
1582                 return -ENODEV;
1583
1584         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1585                 return -ENODATA;
1586
1587         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1588                                 &target->thread.tm_dscr, 0, sizeof(u64));
1589         return ret;
1590 }
1591
1592 static int tm_dscr_set(struct task_struct *target,
1593                       const struct user_regset *regset,
1594                       unsigned int pos, unsigned int count,
1595                       const void *kbuf, const void __user *ubuf)
1596 {
1597         int ret;
1598
1599         if (!cpu_has_feature(CPU_FTR_TM))
1600                 return -ENODEV;
1601
1602         if (!MSR_TM_ACTIVE(target->thread.regs->msr))
1603                 return -ENODATA;
1604
1605         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1606                                 &target->thread.tm_dscr, 0, sizeof(u64));
1607         return ret;
1608 }
1609 #endif  /* CONFIG_PPC_TRANSACTIONAL_MEM */
1610
1611 #ifdef CONFIG_PPC64
1612 static int ppr_get(struct task_struct *target,
1613                       const struct user_regset *regset,
1614                       unsigned int pos, unsigned int count,
1615                       void *kbuf, void __user *ubuf)
1616 {
1617         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1618                                    &target->thread.ppr, 0, sizeof(u64));
1619 }
1620
1621 static int ppr_set(struct task_struct *target,
1622                       const struct user_regset *regset,
1623                       unsigned int pos, unsigned int count,
1624                       const void *kbuf, const void __user *ubuf)
1625 {
1626         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1627                                   &target->thread.ppr, 0, sizeof(u64));
1628 }
1629
1630 static int dscr_get(struct task_struct *target,
1631                       const struct user_regset *regset,
1632                       unsigned int pos, unsigned int count,
1633                       void *kbuf, void __user *ubuf)
1634 {
1635         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1636                                    &target->thread.dscr, 0, sizeof(u64));
1637 }
1638 static int dscr_set(struct task_struct *target,
1639                       const struct user_regset *regset,
1640                       unsigned int pos, unsigned int count,
1641                       const void *kbuf, const void __user *ubuf)
1642 {
1643         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1644                                   &target->thread.dscr, 0, sizeof(u64));
1645 }
1646 #endif
1647 #ifdef CONFIG_PPC_BOOK3S_64
1648 static int tar_get(struct task_struct *target,
1649                       const struct user_regset *regset,
1650                       unsigned int pos, unsigned int count,
1651                       void *kbuf, void __user *ubuf)
1652 {
1653         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1654                                    &target->thread.tar, 0, sizeof(u64));
1655 }
1656 static int tar_set(struct task_struct *target,
1657                       const struct user_regset *regset,
1658                       unsigned int pos, unsigned int count,
1659                       const void *kbuf, const void __user *ubuf)
1660 {
1661         return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1662                                   &target->thread.tar, 0, sizeof(u64));
1663 }
1664
1665 static int ebb_active(struct task_struct *target,
1666                          const struct user_regset *regset)
1667 {
1668         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1669                 return -ENODEV;
1670
1671         if (target->thread.used_ebb)
1672                 return regset->n;
1673
1674         return 0;
1675 }
1676
1677 static int ebb_get(struct task_struct *target,
1678                       const struct user_regset *regset,
1679                       unsigned int pos, unsigned int count,
1680                       void *kbuf, void __user *ubuf)
1681 {
1682         /* Build tests */
1683         BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
1684         BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
1685
1686         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1687                 return -ENODEV;
1688
1689         if (!target->thread.used_ebb)
1690                 return -ENODATA;
1691
1692         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1693                         &target->thread.ebbrr, 0, 3 * sizeof(unsigned long));
1694 }
1695
1696 static int ebb_set(struct task_struct *target,
1697                       const struct user_regset *regset,
1698                       unsigned int pos, unsigned int count,
1699                       const void *kbuf, const void __user *ubuf)
1700 {
1701         int ret = 0;
1702
1703         /* Build tests */
1704         BUILD_BUG_ON(TSO(ebbrr) + sizeof(unsigned long) != TSO(ebbhr));
1705         BUILD_BUG_ON(TSO(ebbhr) + sizeof(unsigned long) != TSO(bescr));
1706
1707         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1708                 return -ENODEV;
1709
1710         if (target->thread.used_ebb)
1711                 return -ENODATA;
1712
1713         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1714                         &target->thread.ebbrr, 0, sizeof(unsigned long));
1715
1716         if (!ret)
1717                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1718                         &target->thread.ebbhr, sizeof(unsigned long),
1719                         2 * sizeof(unsigned long));
1720
1721         if (!ret)
1722                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1723                         &target->thread.bescr,
1724                         2 * sizeof(unsigned long), 3 * sizeof(unsigned long));
1725
1726         return ret;
1727 }
1728 static int pmu_active(struct task_struct *target,
1729                          const struct user_regset *regset)
1730 {
1731         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1732                 return -ENODEV;
1733
1734         return regset->n;
1735 }
1736
1737 static int pmu_get(struct task_struct *target,
1738                       const struct user_regset *regset,
1739                       unsigned int pos, unsigned int count,
1740                       void *kbuf, void __user *ubuf)
1741 {
1742         /* Build tests */
1743         BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
1744         BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
1745         BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
1746         BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
1747
1748         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1749                 return -ENODEV;
1750
1751         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1752                         &target->thread.siar, 0,
1753                         5 * sizeof(unsigned long));
1754 }
1755
1756 static int pmu_set(struct task_struct *target,
1757                       const struct user_regset *regset,
1758                       unsigned int pos, unsigned int count,
1759                       const void *kbuf, const void __user *ubuf)
1760 {
1761         int ret = 0;
1762
1763         /* Build tests */
1764         BUILD_BUG_ON(TSO(siar) + sizeof(unsigned long) != TSO(sdar));
1765         BUILD_BUG_ON(TSO(sdar) + sizeof(unsigned long) != TSO(sier));
1766         BUILD_BUG_ON(TSO(sier) + sizeof(unsigned long) != TSO(mmcr2));
1767         BUILD_BUG_ON(TSO(mmcr2) + sizeof(unsigned long) != TSO(mmcr0));
1768
1769         if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1770                 return -ENODEV;
1771
1772         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1773                         &target->thread.siar, 0,
1774                         sizeof(unsigned long));
1775
1776         if (!ret)
1777                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1778                         &target->thread.sdar, sizeof(unsigned long),
1779                         2 * sizeof(unsigned long));
1780
1781         if (!ret)
1782                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1783                         &target->thread.sier, 2 * sizeof(unsigned long),
1784                         3 * sizeof(unsigned long));
1785
1786         if (!ret)
1787                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1788                         &target->thread.mmcr2, 3 * sizeof(unsigned long),
1789                         4 * sizeof(unsigned long));
1790
1791         if (!ret)
1792                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1793                         &target->thread.mmcr0, 4 * sizeof(unsigned long),
1794                         5 * sizeof(unsigned long));
1795         return ret;
1796 }
1797 #endif
1798
1799 #ifdef CONFIG_PPC_MEM_KEYS
1800 static int pkey_active(struct task_struct *target,
1801                        const struct user_regset *regset)
1802 {
1803         if (!arch_pkeys_enabled())
1804                 return -ENODEV;
1805
1806         return regset->n;
1807 }
1808
1809 static int pkey_get(struct task_struct *target,
1810                     const struct user_regset *regset,
1811                     unsigned int pos, unsigned int count,
1812                     void *kbuf, void __user *ubuf)
1813 {
1814         BUILD_BUG_ON(TSO(amr) + sizeof(unsigned long) != TSO(iamr));
1815         BUILD_BUG_ON(TSO(iamr) + sizeof(unsigned long) != TSO(uamor));
1816
1817         if (!arch_pkeys_enabled())
1818                 return -ENODEV;
1819
1820         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
1821                                    &target->thread.amr, 0,
1822                                    ELF_NPKEY * sizeof(unsigned long));
1823 }
1824
1825 static int pkey_set(struct task_struct *target,
1826                       const struct user_regset *regset,
1827                       unsigned int pos, unsigned int count,
1828                       const void *kbuf, const void __user *ubuf)
1829 {
1830         u64 new_amr;
1831         int ret;
1832
1833         if (!arch_pkeys_enabled())
1834                 return -ENODEV;
1835
1836         /* Only the AMR can be set from userspace */
1837         if (pos != 0 || count != sizeof(new_amr))
1838                 return -EINVAL;
1839
1840         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1841                                  &new_amr, 0, sizeof(new_amr));
1842         if (ret)
1843                 return ret;
1844
1845         /* UAMOR determines which bits of the AMR can be set from userspace. */
1846         target->thread.amr = (new_amr & target->thread.uamor) |
1847                 (target->thread.amr & ~target->thread.uamor);
1848
1849         return 0;
1850 }
1851 #endif /* CONFIG_PPC_MEM_KEYS */
1852
1853 /*
1854  * These are our native regset flavors.
1855  */
1856 enum powerpc_regset {
1857         REGSET_GPR,
1858         REGSET_FPR,
1859 #ifdef CONFIG_ALTIVEC
1860         REGSET_VMX,
1861 #endif
1862 #ifdef CONFIG_VSX
1863         REGSET_VSX,
1864 #endif
1865 #ifdef CONFIG_SPE
1866         REGSET_SPE,
1867 #endif
1868 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1869         REGSET_TM_CGPR,         /* TM checkpointed GPR registers */
1870         REGSET_TM_CFPR,         /* TM checkpointed FPR registers */
1871         REGSET_TM_CVMX,         /* TM checkpointed VMX registers */
1872         REGSET_TM_CVSX,         /* TM checkpointed VSX registers */
1873         REGSET_TM_SPR,          /* TM specific SPR registers */
1874         REGSET_TM_CTAR,         /* TM checkpointed TAR register */
1875         REGSET_TM_CPPR,         /* TM checkpointed PPR register */
1876         REGSET_TM_CDSCR,        /* TM checkpointed DSCR register */
1877 #endif
1878 #ifdef CONFIG_PPC64
1879         REGSET_PPR,             /* PPR register */
1880         REGSET_DSCR,            /* DSCR register */
1881 #endif
1882 #ifdef CONFIG_PPC_BOOK3S_64
1883         REGSET_TAR,             /* TAR register */
1884         REGSET_EBB,             /* EBB registers */
1885         REGSET_PMR,             /* Performance Monitor Registers */
1886 #endif
1887 #ifdef CONFIG_PPC_MEM_KEYS
1888         REGSET_PKEY,            /* AMR register */
1889 #endif
1890 };
1891
1892 static const struct user_regset native_regsets[] = {
1893         [REGSET_GPR] = {
1894                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
1895                 .size = sizeof(long), .align = sizeof(long),
1896                 .get = gpr_get, .set = gpr_set
1897         },
1898         [REGSET_FPR] = {
1899                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
1900                 .size = sizeof(double), .align = sizeof(double),
1901                 .get = fpr_get, .set = fpr_set
1902         },
1903 #ifdef CONFIG_ALTIVEC
1904         [REGSET_VMX] = {
1905                 .core_note_type = NT_PPC_VMX, .n = 34,
1906                 .size = sizeof(vector128), .align = sizeof(vector128),
1907                 .active = vr_active, .get = vr_get, .set = vr_set
1908         },
1909 #endif
1910 #ifdef CONFIG_VSX
1911         [REGSET_VSX] = {
1912                 .core_note_type = NT_PPC_VSX, .n = 32,
1913                 .size = sizeof(double), .align = sizeof(double),
1914                 .active = vsr_active, .get = vsr_get, .set = vsr_set
1915         },
1916 #endif
1917 #ifdef CONFIG_SPE
1918         [REGSET_SPE] = {
1919                 .core_note_type = NT_PPC_SPE, .n = 35,
1920                 .size = sizeof(u32), .align = sizeof(u32),
1921                 .active = evr_active, .get = evr_get, .set = evr_set
1922         },
1923 #endif
1924 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1925         [REGSET_TM_CGPR] = {
1926                 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
1927                 .size = sizeof(long), .align = sizeof(long),
1928                 .active = tm_cgpr_active, .get = tm_cgpr_get, .set = tm_cgpr_set
1929         },
1930         [REGSET_TM_CFPR] = {
1931                 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
1932                 .size = sizeof(double), .align = sizeof(double),
1933                 .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
1934         },
1935         [REGSET_TM_CVMX] = {
1936                 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
1937                 .size = sizeof(vector128), .align = sizeof(vector128),
1938                 .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
1939         },
1940         [REGSET_TM_CVSX] = {
1941                 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
1942                 .size = sizeof(double), .align = sizeof(double),
1943                 .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
1944         },
1945         [REGSET_TM_SPR] = {
1946                 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
1947                 .size = sizeof(u64), .align = sizeof(u64),
1948                 .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
1949         },
1950         [REGSET_TM_CTAR] = {
1951                 .core_note_type = NT_PPC_TM_CTAR, .n = 1,
1952                 .size = sizeof(u64), .align = sizeof(u64),
1953                 .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
1954         },
1955         [REGSET_TM_CPPR] = {
1956                 .core_note_type = NT_PPC_TM_CPPR, .n = 1,
1957                 .size = sizeof(u64), .align = sizeof(u64),
1958                 .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
1959         },
1960         [REGSET_TM_CDSCR] = {
1961                 .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
1962                 .size = sizeof(u64), .align = sizeof(u64),
1963                 .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
1964         },
1965 #endif
1966 #ifdef CONFIG_PPC64
1967         [REGSET_PPR] = {
1968                 .core_note_type = NT_PPC_PPR, .n = 1,
1969                 .size = sizeof(u64), .align = sizeof(u64),
1970                 .get = ppr_get, .set = ppr_set
1971         },
1972         [REGSET_DSCR] = {
1973                 .core_note_type = NT_PPC_DSCR, .n = 1,
1974                 .size = sizeof(u64), .align = sizeof(u64),
1975                 .get = dscr_get, .set = dscr_set
1976         },
1977 #endif
1978 #ifdef CONFIG_PPC_BOOK3S_64
1979         [REGSET_TAR] = {
1980                 .core_note_type = NT_PPC_TAR, .n = 1,
1981                 .size = sizeof(u64), .align = sizeof(u64),
1982                 .get = tar_get, .set = tar_set
1983         },
1984         [REGSET_EBB] = {
1985                 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
1986                 .size = sizeof(u64), .align = sizeof(u64),
1987                 .active = ebb_active, .get = ebb_get, .set = ebb_set
1988         },
1989         [REGSET_PMR] = {
1990                 .core_note_type = NT_PPC_PMU, .n = ELF_NPMU,
1991                 .size = sizeof(u64), .align = sizeof(u64),
1992                 .active = pmu_active, .get = pmu_get, .set = pmu_set
1993         },
1994 #endif
1995 #ifdef CONFIG_PPC_MEM_KEYS
1996         [REGSET_PKEY] = {
1997                 .core_note_type = NT_PPC_PKEY, .n = ELF_NPKEY,
1998                 .size = sizeof(u64), .align = sizeof(u64),
1999                 .active = pkey_active, .get = pkey_get, .set = pkey_set
2000         },
2001 #endif
2002 };
2003
2004 static const struct user_regset_view user_ppc_native_view = {
2005         .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
2006         .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
2007 };
2008
2009 #ifdef CONFIG_PPC64
2010 #include <linux/compat.h>
2011
2012 static int gpr32_get_common(struct task_struct *target,
2013                      const struct user_regset *regset,
2014                      unsigned int pos, unsigned int count,
2015                             void *kbuf, void __user *ubuf,
2016                             unsigned long *regs)
2017 {
2018         compat_ulong_t *k = kbuf;
2019         compat_ulong_t __user *u = ubuf;
2020         compat_ulong_t reg;
2021
2022         pos /= sizeof(reg);
2023         count /= sizeof(reg);
2024
2025         if (kbuf)
2026                 for (; count > 0 && pos < PT_MSR; --count)
2027                         *k++ = regs[pos++];
2028         else
2029                 for (; count > 0 && pos < PT_MSR; --count)
2030                         if (__put_user((compat_ulong_t) regs[pos++], u++))
2031                                 return -EFAULT;
2032
2033         if (count > 0 && pos == PT_MSR) {
2034                 reg = get_user_msr(target);
2035                 if (kbuf)
2036                         *k++ = reg;
2037                 else if (__put_user(reg, u++))
2038                         return -EFAULT;
2039                 ++pos;
2040                 --count;
2041         }
2042
2043         if (kbuf)
2044                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
2045                         *k++ = regs[pos++];
2046         else
2047                 for (; count > 0 && pos < PT_REGS_COUNT; --count)
2048                         if (__put_user((compat_ulong_t) regs[pos++], u++))
2049                                 return -EFAULT;
2050
2051         kbuf = k;
2052         ubuf = u;
2053         pos *= sizeof(reg);
2054         count *= sizeof(reg);
2055         return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
2056                                         PT_REGS_COUNT * sizeof(reg), -1);
2057 }
2058
2059 static int gpr32_set_common(struct task_struct *target,
2060                      const struct user_regset *regset,
2061                      unsigned int pos, unsigned int count,
2062                      const void *kbuf, const void __user *ubuf,
2063                      unsigned long *regs)
2064 {
2065         const compat_ulong_t *k = kbuf;
2066         const compat_ulong_t __user *u = ubuf;
2067         compat_ulong_t reg;
2068
2069         pos /= sizeof(reg);
2070         count /= sizeof(reg);
2071
2072         if (kbuf)
2073                 for (; count > 0 && pos < PT_MSR; --count)
2074                         regs[pos++] = *k++;
2075         else
2076                 for (; count > 0 && pos < PT_MSR; --count) {
2077                         if (__get_user(reg, u++))
2078                                 return -EFAULT;
2079                         regs[pos++] = reg;
2080                 }
2081
2082
2083         if (count > 0 && pos == PT_MSR) {
2084                 if (kbuf)
2085                         reg = *k++;
2086                 else if (__get_user(reg, u++))
2087                         return -EFAULT;
2088                 set_user_msr(target, reg);
2089                 ++pos;
2090                 --count;
2091         }
2092
2093         if (kbuf) {
2094                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
2095                         regs[pos++] = *k++;
2096                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
2097                         ++k;
2098         } else {
2099                 for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
2100                         if (__get_user(reg, u++))
2101                                 return -EFAULT;
2102                         regs[pos++] = reg;
2103                 }
2104                 for (; count > 0 && pos < PT_TRAP; --count, ++pos)
2105                         if (__get_user(reg, u++))
2106                                 return -EFAULT;
2107         }
2108
2109         if (count > 0 && pos == PT_TRAP) {
2110                 if (kbuf)
2111                         reg = *k++;
2112                 else if (__get_user(reg, u++))
2113                         return -EFAULT;
2114                 set_user_trap(target, reg);
2115                 ++pos;
2116                 --count;
2117         }
2118
2119         kbuf = k;
2120         ubuf = u;
2121         pos *= sizeof(reg);
2122         count *= sizeof(reg);
2123         return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
2124                                          (PT_TRAP + 1) * sizeof(reg), -1);
2125 }
2126
2127 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2128 static int tm_cgpr32_get(struct task_struct *target,
2129                      const struct user_regset *regset,
2130                      unsigned int pos, unsigned int count,
2131                      void *kbuf, void __user *ubuf)
2132 {
2133         return gpr32_get_common(target, regset, pos, count, kbuf, ubuf,
2134                         &target->thread.ckpt_regs.gpr[0]);
2135 }
2136
2137 static int tm_cgpr32_set(struct task_struct *target,
2138                      const struct user_regset *regset,
2139                      unsigned int pos, unsigned int count,
2140                      const void *kbuf, const void __user *ubuf)
2141 {
2142         return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
2143                         &target->thread.ckpt_regs.gpr[0]);
2144 }
2145 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
2146
2147 static int gpr32_get(struct task_struct *target,
2148                      const struct user_regset *regset,
2149                      unsigned int pos, unsigned int count,
2150                      void *kbuf, void __user *ubuf)
2151 {
2152         int i;
2153
2154         if (target->thread.regs == NULL)
2155                 return -EIO;
2156
2157         if (!FULL_REGS(target->thread.regs)) {
2158                 /*
2159                  * We have a partial register set.
2160                  * Fill 14-31 with bogus values.
2161                  */
2162                 for (i = 14; i < 32; i++)
2163                         target->thread.regs->gpr[i] = NV_REG_POISON;
2164         }
2165         return gpr32_get_common(target, regset, pos, count, kbuf, ubuf,
2166                         &target->thread.regs->gpr[0]);
2167 }
2168
2169 static int gpr32_set(struct task_struct *target,
2170                      const struct user_regset *regset,
2171                      unsigned int pos, unsigned int count,
2172                      const void *kbuf, const void __user *ubuf)
2173 {
2174         if (target->thread.regs == NULL)
2175                 return -EIO;
2176
2177         CHECK_FULL_REGS(target->thread.regs);
2178         return gpr32_set_common(target, regset, pos, count, kbuf, ubuf,
2179                         &target->thread.regs->gpr[0]);
2180 }
2181
2182 /*
2183  * These are the regset flavors matching the CONFIG_PPC32 native set.
2184  */
2185 static const struct user_regset compat_regsets[] = {
2186         [REGSET_GPR] = {
2187                 .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
2188                 .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
2189                 .get = gpr32_get, .set = gpr32_set
2190         },
2191         [REGSET_FPR] = {
2192                 .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
2193                 .size = sizeof(double), .align = sizeof(double),
2194                 .get = fpr_get, .set = fpr_set
2195         },
2196 #ifdef CONFIG_ALTIVEC
2197         [REGSET_VMX] = {
2198                 .core_note_type = NT_PPC_VMX, .n = 34,
2199                 .size = sizeof(vector128), .align = sizeof(vector128),
2200                 .active = vr_active, .get = vr_get, .set = vr_set
2201         },
2202 #endif
2203 #ifdef CONFIG_SPE
2204         [REGSET_SPE] = {
2205                 .core_note_type = NT_PPC_SPE, .n = 35,
2206                 .size = sizeof(u32), .align = sizeof(u32),
2207                 .active = evr_active, .get = evr_get, .set = evr_set
2208         },
2209 #endif
2210 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2211         [REGSET_TM_CGPR] = {
2212                 .core_note_type = NT_PPC_TM_CGPR, .n = ELF_NGREG,
2213                 .size = sizeof(long), .align = sizeof(long),
2214                 .active = tm_cgpr_active,
2215                 .get = tm_cgpr32_get, .set = tm_cgpr32_set
2216         },
2217         [REGSET_TM_CFPR] = {
2218                 .core_note_type = NT_PPC_TM_CFPR, .n = ELF_NFPREG,
2219                 .size = sizeof(double), .align = sizeof(double),
2220                 .active = tm_cfpr_active, .get = tm_cfpr_get, .set = tm_cfpr_set
2221         },
2222         [REGSET_TM_CVMX] = {
2223                 .core_note_type = NT_PPC_TM_CVMX, .n = ELF_NVMX,
2224                 .size = sizeof(vector128), .align = sizeof(vector128),
2225                 .active = tm_cvmx_active, .get = tm_cvmx_get, .set = tm_cvmx_set
2226         },
2227         [REGSET_TM_CVSX] = {
2228                 .core_note_type = NT_PPC_TM_CVSX, .n = ELF_NVSX,
2229                 .size = sizeof(double), .align = sizeof(double),
2230                 .active = tm_cvsx_active, .get = tm_cvsx_get, .set = tm_cvsx_set
2231         },
2232         [REGSET_TM_SPR] = {
2233                 .core_note_type = NT_PPC_TM_SPR, .n = ELF_NTMSPRREG,
2234                 .size = sizeof(u64), .align = sizeof(u64),
2235                 .active = tm_spr_active, .get = tm_spr_get, .set = tm_spr_set
2236         },
2237         [REGSET_TM_CTAR] = {
2238                 .core_note_type = NT_PPC_TM_CTAR, .n = 1,
2239                 .size = sizeof(u64), .align = sizeof(u64),
2240                 .active = tm_tar_active, .get = tm_tar_get, .set = tm_tar_set
2241         },
2242         [REGSET_TM_CPPR] = {
2243                 .core_note_type = NT_PPC_TM_CPPR, .n = 1,
2244                 .size = sizeof(u64), .align = sizeof(u64),
2245                 .active = tm_ppr_active, .get = tm_ppr_get, .set = tm_ppr_set
2246         },
2247         [REGSET_TM_CDSCR] = {
2248                 .core_note_type = NT_PPC_TM_CDSCR, .n = 1,
2249                 .size = sizeof(u64), .align = sizeof(u64),
2250                 .active = tm_dscr_active, .get = tm_dscr_get, .set = tm_dscr_set
2251         },
2252 #endif
2253 #ifdef CONFIG_PPC64
2254         [REGSET_PPR] = {
2255                 .core_note_type = NT_PPC_PPR, .n = 1,
2256                 .size = sizeof(u64), .align = sizeof(u64),
2257                 .get = ppr_get, .set = ppr_set
2258         },
2259         [REGSET_DSCR] = {
2260                 .core_note_type = NT_PPC_DSCR, .n = 1,
2261                 .size = sizeof(u64), .align = sizeof(u64),
2262                 .get = dscr_get, .set = dscr_set
2263         },
2264 #endif
2265 #ifdef CONFIG_PPC_BOOK3S_64
2266         [REGSET_TAR] = {
2267                 .core_note_type = NT_PPC_TAR, .n = 1,
2268                 .size = sizeof(u64), .align = sizeof(u64),
2269                 .get = tar_get, .set = tar_set
2270         },
2271         [REGSET_EBB] = {
2272                 .core_note_type = NT_PPC_EBB, .n = ELF_NEBB,
2273                 .size = sizeof(u64), .align = sizeof(u64),
2274                 .active = ebb_active, .get = ebb_get, .set = ebb_set
2275         },
2276 #endif
2277 };
2278
2279 static const struct user_regset_view user_ppc_compat_view = {
2280         .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
2281         .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
2282 };
2283 #endif  /* CONFIG_PPC64 */
2284
2285 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
2286 {
2287 #ifdef CONFIG_PPC64
2288         if (test_tsk_thread_flag(task, TIF_32BIT))
2289                 return &user_ppc_compat_view;
2290 #endif
2291         return &user_ppc_native_view;
2292 }
2293
2294
2295 void user_enable_single_step(struct task_struct *task)
2296 {
2297         struct pt_regs *regs = task->thread.regs;
2298
2299         if (regs != NULL) {
2300 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2301                 task->thread.debug.dbcr0 &= ~DBCR0_BT;
2302                 task->thread.debug.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2303                 regs->msr |= MSR_DE;
2304 #else
2305                 regs->msr &= ~MSR_BE;
2306                 regs->msr |= MSR_SE;
2307 #endif
2308         }
2309         set_tsk_thread_flag(task, TIF_SINGLESTEP);
2310 }
2311
2312 void user_enable_block_step(struct task_struct *task)
2313 {
2314         struct pt_regs *regs = task->thread.regs;
2315
2316         if (regs != NULL) {
2317 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2318                 task->thread.debug.dbcr0 &= ~DBCR0_IC;
2319                 task->thread.debug.dbcr0 = DBCR0_IDM | DBCR0_BT;
2320                 regs->msr |= MSR_DE;
2321 #else
2322                 regs->msr &= ~MSR_SE;
2323                 regs->msr |= MSR_BE;
2324 #endif
2325         }
2326         set_tsk_thread_flag(task, TIF_SINGLESTEP);
2327 }
2328
2329 void user_disable_single_step(struct task_struct *task)
2330 {
2331         struct pt_regs *regs = task->thread.regs;
2332
2333         if (regs != NULL) {
2334 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2335                 /*
2336                  * The logic to disable single stepping should be as
2337                  * simple as turning off the Instruction Complete flag.
2338                  * And, after doing so, if all debug flags are off, turn
2339                  * off DBCR0(IDM) and MSR(DE) .... Torez
2340                  */
2341                 task->thread.debug.dbcr0 &= ~(DBCR0_IC|DBCR0_BT);
2342                 /*
2343                  * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
2344                  */
2345                 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
2346                                         task->thread.debug.dbcr1)) {
2347                         /*
2348                          * All debug events were off.....
2349                          */
2350                         task->thread.debug.dbcr0 &= ~DBCR0_IDM;
2351                         regs->msr &= ~MSR_DE;
2352                 }
2353 #else
2354                 regs->msr &= ~(MSR_SE | MSR_BE);
2355 #endif
2356         }
2357         clear_tsk_thread_flag(task, TIF_SINGLESTEP);
2358 }
2359
2360 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2361 void ptrace_triggered(struct perf_event *bp,
2362                       struct perf_sample_data *data, struct pt_regs *regs)
2363 {
2364         struct perf_event_attr attr;
2365
2366         /*
2367          * Disable the breakpoint request here since ptrace has defined a
2368          * one-shot behaviour for breakpoint exceptions in PPC64.
2369          * The SIGTRAP signal is generated automatically for us in do_dabr().
2370          * We don't have to do anything about that here
2371          */
2372         attr = bp->attr;
2373         attr.disabled = true;
2374         modify_user_hw_breakpoint(bp, &attr);
2375 }
2376 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2377
2378 static int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
2379                                unsigned long data)
2380 {
2381 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2382         int ret;
2383         struct thread_struct *thread = &(task->thread);
2384         struct perf_event *bp;
2385         struct perf_event_attr attr;
2386 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2387 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
2388         bool set_bp = true;
2389         struct arch_hw_breakpoint hw_brk;
2390 #endif
2391
2392         /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
2393          *  For embedded processors we support one DAC and no IAC's at the
2394          *  moment.
2395          */
2396         if (addr > 0)
2397                 return -EINVAL;
2398
2399         /* The bottom 3 bits in dabr are flags */
2400         if ((data & ~0x7UL) >= TASK_SIZE)
2401                 return -EIO;
2402
2403 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
2404         /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
2405          *  It was assumed, on previous implementations, that 3 bits were
2406          *  passed together with the data address, fitting the design of the
2407          *  DABR register, as follows:
2408          *
2409          *  bit 0: Read flag
2410          *  bit 1: Write flag
2411          *  bit 2: Breakpoint translation
2412          *
2413          *  Thus, we use them here as so.
2414          */
2415
2416         /* Ensure breakpoint translation bit is set */
2417         if (data && !(data & HW_BRK_TYPE_TRANSLATE))
2418                 return -EIO;
2419         hw_brk.address = data & (~HW_BRK_TYPE_DABR);
2420         hw_brk.type = (data & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
2421         hw_brk.len = 8;
2422         set_bp = (data) && (hw_brk.type & HW_BRK_TYPE_RDWR);
2423 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2424         bp = thread->ptrace_bps[0];
2425         if (!set_bp) {
2426                 if (bp) {
2427                         unregister_hw_breakpoint(bp);
2428                         thread->ptrace_bps[0] = NULL;
2429                 }
2430                 return 0;
2431         }
2432         if (bp) {
2433                 attr = bp->attr;
2434                 attr.bp_addr = hw_brk.address;
2435                 arch_bp_generic_fields(hw_brk.type, &attr.bp_type);
2436
2437                 /* Enable breakpoint */
2438                 attr.disabled = false;
2439
2440                 ret =  modify_user_hw_breakpoint(bp, &attr);
2441                 if (ret) {
2442                         return ret;
2443                 }
2444                 thread->ptrace_bps[0] = bp;
2445                 thread->hw_brk = hw_brk;
2446                 return 0;
2447         }
2448
2449         /* Create a new breakpoint request if one doesn't exist already */
2450         hw_breakpoint_init(&attr);
2451         attr.bp_addr = hw_brk.address;
2452         attr.bp_len = 8;
2453         arch_bp_generic_fields(hw_brk.type,
2454                                &attr.bp_type);
2455
2456         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
2457                                                ptrace_triggered, NULL, task);
2458         if (IS_ERR(bp)) {
2459                 thread->ptrace_bps[0] = NULL;
2460                 return PTR_ERR(bp);
2461         }
2462
2463 #else /* !CONFIG_HAVE_HW_BREAKPOINT */
2464         if (set_bp && (!ppc_breakpoint_available()))
2465                 return -ENODEV;
2466 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2467         task->thread.hw_brk = hw_brk;
2468 #else /* CONFIG_PPC_ADV_DEBUG_REGS */
2469         /* As described above, it was assumed 3 bits were passed with the data
2470          *  address, but we will assume only the mode bits will be passed
2471          *  as to not cause alignment restrictions for DAC-based processors.
2472          */
2473
2474         /* DAC's hold the whole address without any mode flags */
2475         task->thread.debug.dac1 = data & ~0x3UL;
2476
2477         if (task->thread.debug.dac1 == 0) {
2478                 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
2479                 if (!DBCR_ACTIVE_EVENTS(task->thread.debug.dbcr0,
2480                                         task->thread.debug.dbcr1)) {
2481                         task->thread.regs->msr &= ~MSR_DE;
2482                         task->thread.debug.dbcr0 &= ~DBCR0_IDM;
2483                 }
2484                 return 0;
2485         }
2486
2487         /* Read or Write bits must be set */
2488
2489         if (!(data & 0x3UL))
2490                 return -EINVAL;
2491
2492         /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
2493            register */
2494         task->thread.debug.dbcr0 |= DBCR0_IDM;
2495
2496         /* Check for write and read flags and set DBCR0
2497            accordingly */
2498         dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
2499         if (data & 0x1UL)
2500                 dbcr_dac(task) |= DBCR_DAC1R;
2501         if (data & 0x2UL)
2502                 dbcr_dac(task) |= DBCR_DAC1W;
2503         task->thread.regs->msr |= MSR_DE;
2504 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
2505         return 0;
2506 }
2507
2508 /*
2509  * Called by kernel/ptrace.c when detaching..
2510  *
2511  * Make sure single step bits etc are not set.
2512  */
2513 void ptrace_disable(struct task_struct *child)
2514 {
2515         /* make sure the single step bit is not set. */
2516         user_disable_single_step(child);
2517 }
2518
2519 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2520 static long set_instruction_bp(struct task_struct *child,
2521                               struct ppc_hw_breakpoint *bp_info)
2522 {
2523         int slot;
2524         int slot1_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC1) != 0);
2525         int slot2_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC2) != 0);
2526         int slot3_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC3) != 0);
2527         int slot4_in_use = ((child->thread.debug.dbcr0 & DBCR0_IAC4) != 0);
2528
2529         if (dbcr_iac_range(child) & DBCR_IAC12MODE)
2530                 slot2_in_use = 1;
2531         if (dbcr_iac_range(child) & DBCR_IAC34MODE)
2532                 slot4_in_use = 1;
2533
2534         if (bp_info->addr >= TASK_SIZE)
2535                 return -EIO;
2536
2537         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
2538
2539                 /* Make sure range is valid. */
2540                 if (bp_info->addr2 >= TASK_SIZE)
2541                         return -EIO;
2542
2543                 /* We need a pair of IAC regsisters */
2544                 if ((!slot1_in_use) && (!slot2_in_use)) {
2545                         slot = 1;
2546                         child->thread.debug.iac1 = bp_info->addr;
2547                         child->thread.debug.iac2 = bp_info->addr2;
2548                         child->thread.debug.dbcr0 |= DBCR0_IAC1;
2549                         if (bp_info->addr_mode ==
2550                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2551                                 dbcr_iac_range(child) |= DBCR_IAC12X;
2552                         else
2553                                 dbcr_iac_range(child) |= DBCR_IAC12I;
2554 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
2555                 } else if ((!slot3_in_use) && (!slot4_in_use)) {
2556                         slot = 3;
2557                         child->thread.debug.iac3 = bp_info->addr;
2558                         child->thread.debug.iac4 = bp_info->addr2;
2559                         child->thread.debug.dbcr0 |= DBCR0_IAC3;
2560                         if (bp_info->addr_mode ==
2561                                         PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2562                                 dbcr_iac_range(child) |= DBCR_IAC34X;
2563                         else
2564                                 dbcr_iac_range(child) |= DBCR_IAC34I;
2565 #endif
2566                 } else
2567                         return -ENOSPC;
2568         } else {
2569                 /* We only need one.  If possible leave a pair free in
2570                  * case a range is needed later
2571                  */
2572                 if (!slot1_in_use) {
2573                         /*
2574                          * Don't use iac1 if iac1-iac2 are free and either
2575                          * iac3 or iac4 (but not both) are free
2576                          */
2577                         if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
2578                                 slot = 1;
2579                                 child->thread.debug.iac1 = bp_info->addr;
2580                                 child->thread.debug.dbcr0 |= DBCR0_IAC1;
2581                                 goto out;
2582                         }
2583                 }
2584                 if (!slot2_in_use) {
2585                         slot = 2;
2586                         child->thread.debug.iac2 = bp_info->addr;
2587                         child->thread.debug.dbcr0 |= DBCR0_IAC2;
2588 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
2589                 } else if (!slot3_in_use) {
2590                         slot = 3;
2591                         child->thread.debug.iac3 = bp_info->addr;
2592                         child->thread.debug.dbcr0 |= DBCR0_IAC3;
2593                 } else if (!slot4_in_use) {
2594                         slot = 4;
2595                         child->thread.debug.iac4 = bp_info->addr;
2596                         child->thread.debug.dbcr0 |= DBCR0_IAC4;
2597 #endif
2598                 } else
2599                         return -ENOSPC;
2600         }
2601 out:
2602         child->thread.debug.dbcr0 |= DBCR0_IDM;
2603         child->thread.regs->msr |= MSR_DE;
2604
2605         return slot;
2606 }
2607
2608 static int del_instruction_bp(struct task_struct *child, int slot)
2609 {
2610         switch (slot) {
2611         case 1:
2612                 if ((child->thread.debug.dbcr0 & DBCR0_IAC1) == 0)
2613                         return -ENOENT;
2614
2615                 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
2616                         /* address range - clear slots 1 & 2 */
2617                         child->thread.debug.iac2 = 0;
2618                         dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
2619                 }
2620                 child->thread.debug.iac1 = 0;
2621                 child->thread.debug.dbcr0 &= ~DBCR0_IAC1;
2622                 break;
2623         case 2:
2624                 if ((child->thread.debug.dbcr0 & DBCR0_IAC2) == 0)
2625                         return -ENOENT;
2626
2627                 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
2628                         /* used in a range */
2629                         return -EINVAL;
2630                 child->thread.debug.iac2 = 0;
2631                 child->thread.debug.dbcr0 &= ~DBCR0_IAC2;
2632                 break;
2633 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
2634         case 3:
2635                 if ((child->thread.debug.dbcr0 & DBCR0_IAC3) == 0)
2636                         return -ENOENT;
2637
2638                 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
2639                         /* address range - clear slots 3 & 4 */
2640                         child->thread.debug.iac4 = 0;
2641                         dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
2642                 }
2643                 child->thread.debug.iac3 = 0;
2644                 child->thread.debug.dbcr0 &= ~DBCR0_IAC3;
2645                 break;
2646         case 4:
2647                 if ((child->thread.debug.dbcr0 & DBCR0_IAC4) == 0)
2648                         return -ENOENT;
2649
2650                 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
2651                         /* Used in a range */
2652                         return -EINVAL;
2653                 child->thread.debug.iac4 = 0;
2654                 child->thread.debug.dbcr0 &= ~DBCR0_IAC4;
2655                 break;
2656 #endif
2657         default:
2658                 return -EINVAL;
2659         }
2660         return 0;
2661 }
2662
2663 static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
2664 {
2665         int byte_enable =
2666                 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
2667                 & 0xf;
2668         int condition_mode =
2669                 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
2670         int slot;
2671
2672         if (byte_enable && (condition_mode == 0))
2673                 return -EINVAL;
2674
2675         if (bp_info->addr >= TASK_SIZE)
2676                 return -EIO;
2677
2678         if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
2679                 slot = 1;
2680                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2681                         dbcr_dac(child) |= DBCR_DAC1R;
2682                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2683                         dbcr_dac(child) |= DBCR_DAC1W;
2684                 child->thread.debug.dac1 = (unsigned long)bp_info->addr;
2685 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2686                 if (byte_enable) {
2687                         child->thread.debug.dvc1 =
2688                                 (unsigned long)bp_info->condition_value;
2689                         child->thread.debug.dbcr2 |=
2690                                 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
2691                                  (condition_mode << DBCR2_DVC1M_SHIFT));
2692                 }
2693 #endif
2694 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2695         } else if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
2696                 /* Both dac1 and dac2 are part of a range */
2697                 return -ENOSPC;
2698 #endif
2699         } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
2700                 slot = 2;
2701                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2702                         dbcr_dac(child) |= DBCR_DAC2R;
2703                 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2704                         dbcr_dac(child) |= DBCR_DAC2W;
2705                 child->thread.debug.dac2 = (unsigned long)bp_info->addr;
2706 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2707                 if (byte_enable) {
2708                         child->thread.debug.dvc2 =
2709                                 (unsigned long)bp_info->condition_value;
2710                         child->thread.debug.dbcr2 |=
2711                                 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
2712                                  (condition_mode << DBCR2_DVC2M_SHIFT));
2713                 }
2714 #endif
2715         } else
2716                 return -ENOSPC;
2717         child->thread.debug.dbcr0 |= DBCR0_IDM;
2718         child->thread.regs->msr |= MSR_DE;
2719
2720         return slot + 4;
2721 }
2722
2723 static int del_dac(struct task_struct *child, int slot)
2724 {
2725         if (slot == 1) {
2726                 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0)
2727                         return -ENOENT;
2728
2729                 child->thread.debug.dac1 = 0;
2730                 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
2731 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2732                 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE) {
2733                         child->thread.debug.dac2 = 0;
2734                         child->thread.debug.dbcr2 &= ~DBCR2_DAC12MODE;
2735                 }
2736                 child->thread.debug.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
2737 #endif
2738 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2739                 child->thread.debug.dvc1 = 0;
2740 #endif
2741         } else if (slot == 2) {
2742                 if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0)
2743                         return -ENOENT;
2744
2745 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2746                 if (child->thread.debug.dbcr2 & DBCR2_DAC12MODE)
2747                         /* Part of a range */
2748                         return -EINVAL;
2749                 child->thread.debug.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
2750 #endif
2751 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
2752                 child->thread.debug.dvc2 = 0;
2753 #endif
2754                 child->thread.debug.dac2 = 0;
2755                 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
2756         } else
2757                 return -EINVAL;
2758
2759         return 0;
2760 }
2761 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
2762
2763 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2764 static int set_dac_range(struct task_struct *child,
2765                          struct ppc_hw_breakpoint *bp_info)
2766 {
2767         int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
2768
2769         /* We don't allow range watchpoints to be used with DVC */
2770         if (bp_info->condition_mode)
2771                 return -EINVAL;
2772
2773         /*
2774          * Best effort to verify the address range.  The user/supervisor bits
2775          * prevent trapping in kernel space, but let's fail on an obvious bad
2776          * range.  The simple test on the mask is not fool-proof, and any
2777          * exclusive range will spill over into kernel space.
2778          */
2779         if (bp_info->addr >= TASK_SIZE)
2780                 return -EIO;
2781         if (mode == PPC_BREAKPOINT_MODE_MASK) {
2782                 /*
2783                  * dac2 is a bitmask.  Don't allow a mask that makes a
2784                  * kernel space address from a valid dac1 value
2785                  */
2786                 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
2787                         return -EIO;
2788         } else {
2789                 /*
2790                  * For range breakpoints, addr2 must also be a valid address
2791                  */
2792                 if (bp_info->addr2 >= TASK_SIZE)
2793                         return -EIO;
2794         }
2795
2796         if (child->thread.debug.dbcr0 &
2797             (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
2798                 return -ENOSPC;
2799
2800         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2801                 child->thread.debug.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
2802         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2803                 child->thread.debug.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
2804         child->thread.debug.dac1 = bp_info->addr;
2805         child->thread.debug.dac2 = bp_info->addr2;
2806         if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
2807                 child->thread.debug.dbcr2  |= DBCR2_DAC12M;
2808         else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
2809                 child->thread.debug.dbcr2  |= DBCR2_DAC12MX;
2810         else    /* PPC_BREAKPOINT_MODE_MASK */
2811                 child->thread.debug.dbcr2  |= DBCR2_DAC12MM;
2812         child->thread.regs->msr |= MSR_DE;
2813
2814         return 5;
2815 }
2816 #endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
2817
2818 static long ppc_set_hwdebug(struct task_struct *child,
2819                      struct ppc_hw_breakpoint *bp_info)
2820 {
2821 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2822         int len = 0;
2823         struct thread_struct *thread = &(child->thread);
2824         struct perf_event *bp;
2825         struct perf_event_attr attr;
2826 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2827 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
2828         struct arch_hw_breakpoint brk;
2829 #endif
2830
2831         if (bp_info->version != 1)
2832                 return -ENOTSUPP;
2833 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2834         /*
2835          * Check for invalid flags and combinations
2836          */
2837         if ((bp_info->trigger_type == 0) ||
2838             (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
2839                                        PPC_BREAKPOINT_TRIGGER_RW)) ||
2840             (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
2841             (bp_info->condition_mode &
2842              ~(PPC_BREAKPOINT_CONDITION_MODE |
2843                PPC_BREAKPOINT_CONDITION_BE_ALL)))
2844                 return -EINVAL;
2845 #if CONFIG_PPC_ADV_DEBUG_DVCS == 0
2846         if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
2847                 return -EINVAL;
2848 #endif
2849
2850         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
2851                 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
2852                     (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
2853                         return -EINVAL;
2854                 return set_instruction_bp(child, bp_info);
2855         }
2856         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
2857                 return set_dac(child, bp_info);
2858
2859 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
2860         return set_dac_range(child, bp_info);
2861 #else
2862         return -EINVAL;
2863 #endif
2864 #else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
2865         /*
2866          * We only support one data breakpoint
2867          */
2868         if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
2869             (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
2870             bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
2871                 return -EINVAL;
2872
2873         if ((unsigned long)bp_info->addr >= TASK_SIZE)
2874                 return -EIO;
2875
2876         brk.address = bp_info->addr & ~7UL;
2877         brk.type = HW_BRK_TYPE_TRANSLATE;
2878         brk.len = 8;
2879         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
2880                 brk.type |= HW_BRK_TYPE_READ;
2881         if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
2882                 brk.type |= HW_BRK_TYPE_WRITE;
2883 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2884         /*
2885          * Check if the request is for 'range' breakpoints. We can
2886          * support it if range < 8 bytes.
2887          */
2888         if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
2889                 len = bp_info->addr2 - bp_info->addr;
2890         else if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
2891                 len = 1;
2892         else
2893                 return -EINVAL;
2894         bp = thread->ptrace_bps[0];
2895         if (bp)
2896                 return -ENOSPC;
2897
2898         /* Create a new breakpoint request if one doesn't exist already */
2899         hw_breakpoint_init(&attr);
2900         attr.bp_addr = (unsigned long)bp_info->addr & ~HW_BREAKPOINT_ALIGN;
2901         attr.bp_len = len;
2902         arch_bp_generic_fields(brk.type, &attr.bp_type);
2903
2904         thread->ptrace_bps[0] = bp = register_user_hw_breakpoint(&attr,
2905                                                ptrace_triggered, NULL, child);
2906         if (IS_ERR(bp)) {
2907                 thread->ptrace_bps[0] = NULL;
2908                 return PTR_ERR(bp);
2909         }
2910
2911         return 1;
2912 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2913
2914         if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT)
2915                 return -EINVAL;
2916
2917         if (child->thread.hw_brk.address)
2918                 return -ENOSPC;
2919
2920         if (!ppc_breakpoint_available())
2921                 return -ENODEV;
2922
2923         child->thread.hw_brk = brk;
2924
2925         return 1;
2926 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
2927 }
2928
2929 static long ppc_del_hwdebug(struct task_struct *child, long data)
2930 {
2931 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2932         int ret = 0;
2933         struct thread_struct *thread = &(child->thread);
2934         struct perf_event *bp;
2935 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2936 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
2937         int rc;
2938
2939         if (data <= 4)
2940                 rc = del_instruction_bp(child, (int)data);
2941         else
2942                 rc = del_dac(child, (int)data - 4);
2943
2944         if (!rc) {
2945                 if (!DBCR_ACTIVE_EVENTS(child->thread.debug.dbcr0,
2946                                         child->thread.debug.dbcr1)) {
2947                         child->thread.debug.dbcr0 &= ~DBCR0_IDM;
2948                         child->thread.regs->msr &= ~MSR_DE;
2949                 }
2950         }
2951         return rc;
2952 #else
2953         if (data != 1)
2954                 return -EINVAL;
2955
2956 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2957         bp = thread->ptrace_bps[0];
2958         if (bp) {
2959                 unregister_hw_breakpoint(bp);
2960                 thread->ptrace_bps[0] = NULL;
2961         } else
2962                 ret = -ENOENT;
2963         return ret;
2964 #else /* CONFIG_HAVE_HW_BREAKPOINT */
2965         if (child->thread.hw_brk.address == 0)
2966                 return -ENOENT;
2967
2968         child->thread.hw_brk.address = 0;
2969         child->thread.hw_brk.type = 0;
2970 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
2971
2972         return 0;
2973 #endif
2974 }
2975
2976 long arch_ptrace(struct task_struct *child, long request,
2977                  unsigned long addr, unsigned long data)
2978 {
2979         int ret = -EPERM;
2980         void __user *datavp = (void __user *) data;
2981         unsigned long __user *datalp = datavp;
2982
2983         switch (request) {
2984         /* read the word at location addr in the USER area. */
2985         case PTRACE_PEEKUSR: {
2986                 unsigned long index, tmp;
2987
2988                 ret = -EIO;
2989                 /* convert to index and check */
2990 #ifdef CONFIG_PPC32
2991                 index = addr >> 2;
2992                 if ((addr & 3) || (index > PT_FPSCR)
2993                     || (child->thread.regs == NULL))
2994 #else
2995                 index = addr >> 3;
2996                 if ((addr & 7) || (index > PT_FPSCR))
2997 #endif
2998                         break;
2999
3000                 CHECK_FULL_REGS(child->thread.regs);
3001                 if (index < PT_FPR0) {
3002                         ret = ptrace_get_reg(child, (int) index, &tmp);
3003                         if (ret)
3004                                 break;
3005                 } else {
3006                         unsigned int fpidx = index - PT_FPR0;
3007
3008                         flush_fp_to_thread(child);
3009                         if (fpidx < (PT_FPSCR - PT_FPR0))
3010                                 if (IS_ENABLED(CONFIG_PPC32)) {
3011                                         // On 32-bit the index we are passed refers to 32-bit words
3012                                         tmp = ((u32 *)child->thread.fp_state.fpr)[fpidx];
3013                                 } else {
3014                                         memcpy(&tmp, &child->thread.TS_FPR(fpidx),
3015                                                sizeof(long));
3016                                 }
3017                         else
3018                                 tmp = child->thread.fp_state.fpscr;
3019                 }
3020                 ret = put_user(tmp, datalp);
3021                 break;
3022         }
3023
3024         /* write the word at location addr in the USER area */
3025         case PTRACE_POKEUSR: {
3026                 unsigned long index;
3027
3028                 ret = -EIO;
3029                 /* convert to index and check */
3030 #ifdef CONFIG_PPC32
3031                 index = addr >> 2;
3032                 if ((addr & 3) || (index > PT_FPSCR)
3033                     || (child->thread.regs == NULL))
3034 #else
3035                 index = addr >> 3;
3036                 if ((addr & 7) || (index > PT_FPSCR))
3037 #endif
3038                         break;
3039
3040                 CHECK_FULL_REGS(child->thread.regs);
3041                 if (index < PT_FPR0) {
3042                         ret = ptrace_put_reg(child, index, data);
3043                 } else {
3044                         unsigned int fpidx = index - PT_FPR0;
3045
3046                         flush_fp_to_thread(child);
3047                         if (fpidx < (PT_FPSCR - PT_FPR0))
3048                                 if (IS_ENABLED(CONFIG_PPC32)) {
3049                                         // On 32-bit the index we are passed refers to 32-bit words
3050                                         ((u32 *)child->thread.fp_state.fpr)[fpidx] = data;
3051                                 } else {
3052                                         memcpy(&child->thread.TS_FPR(fpidx), &data,
3053                                                sizeof(long));
3054                                 }
3055                         else
3056                                 child->thread.fp_state.fpscr = data;
3057                         ret = 0;
3058                 }
3059                 break;
3060         }
3061
3062         case PPC_PTRACE_GETHWDBGINFO: {
3063                 struct ppc_debug_info dbginfo;
3064
3065                 dbginfo.version = 1;
3066 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
3067                 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
3068                 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
3069                 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
3070                 dbginfo.data_bp_alignment = 4;
3071                 dbginfo.sizeof_condition = 4;
3072                 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
3073                                    PPC_DEBUG_FEATURE_INSN_BP_MASK;
3074 #ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
3075                 dbginfo.features |=
3076                                    PPC_DEBUG_FEATURE_DATA_BP_RANGE |
3077                                    PPC_DEBUG_FEATURE_DATA_BP_MASK;
3078 #endif
3079 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
3080                 dbginfo.num_instruction_bps = 0;
3081                 if (ppc_breakpoint_available())
3082                         dbginfo.num_data_bps = 1;
3083                 else
3084                         dbginfo.num_data_bps = 0;
3085                 dbginfo.num_condition_regs = 0;
3086 #ifdef CONFIG_PPC64
3087                 dbginfo.data_bp_alignment = 8;
3088 #else
3089                 dbginfo.data_bp_alignment = 4;
3090 #endif
3091                 dbginfo.sizeof_condition = 0;
3092 #ifdef CONFIG_HAVE_HW_BREAKPOINT
3093                 dbginfo.features = PPC_DEBUG_FEATURE_DATA_BP_RANGE;
3094                 if (cpu_has_feature(CPU_FTR_DAWR))
3095                         dbginfo.features |= PPC_DEBUG_FEATURE_DATA_BP_DAWR;
3096 #else
3097                 dbginfo.features = 0;
3098 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
3099 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
3100
3101                 if (copy_to_user(datavp, &dbginfo,
3102                                  sizeof(struct ppc_debug_info)))
3103                         return -EFAULT;
3104                 return 0;
3105         }
3106
3107         case PPC_PTRACE_SETHWDEBUG: {
3108                 struct ppc_hw_breakpoint bp_info;
3109
3110                 if (copy_from_user(&bp_info, datavp,
3111                                    sizeof(struct ppc_hw_breakpoint)))
3112                         return -EFAULT;
3113                 return ppc_set_hwdebug(child, &bp_info);
3114         }
3115
3116         case PPC_PTRACE_DELHWDEBUG: {
3117                 ret = ppc_del_hwdebug(child, data);
3118                 break;
3119         }
3120
3121         case PTRACE_GET_DEBUGREG: {
3122 #ifndef CONFIG_PPC_ADV_DEBUG_REGS
3123                 unsigned long dabr_fake;
3124 #endif
3125                 ret = -EINVAL;
3126                 /* We only support one DABR and no IABRS at the moment */
3127                 if (addr > 0)
3128                         break;
3129 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
3130                 ret = put_user(child->thread.debug.dac1, datalp);
3131 #else
3132                 dabr_fake = ((child->thread.hw_brk.address & (~HW_BRK_TYPE_DABR)) |
3133                              (child->thread.hw_brk.type & HW_BRK_TYPE_DABR));
3134                 ret = put_user(dabr_fake, datalp);
3135 #endif
3136                 break;
3137         }
3138
3139         case PTRACE_SET_DEBUGREG:
3140                 ret = ptrace_set_debugreg(child, addr, data);
3141                 break;
3142
3143 #ifdef CONFIG_PPC64
3144         case PTRACE_GETREGS64:
3145 #endif
3146         case PTRACE_GETREGS:    /* Get all pt_regs from the child. */
3147                 return copy_regset_to_user(child, &user_ppc_native_view,
3148                                            REGSET_GPR,
3149                                            0, sizeof(struct pt_regs),
3150                                            datavp);
3151
3152 #ifdef CONFIG_PPC64
3153         case PTRACE_SETREGS64:
3154 #endif
3155         case PTRACE_SETREGS:    /* Set all gp regs in the child. */
3156                 return copy_regset_from_user(child, &user_ppc_native_view,
3157                                              REGSET_GPR,
3158                                              0, sizeof(struct pt_regs),
3159                                              datavp);
3160
3161         case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
3162                 return copy_regset_to_user(child, &user_ppc_native_view,
3163                                            REGSET_FPR,
3164                                            0, sizeof(elf_fpregset_t),
3165                                            datavp);
3166
3167         case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
3168                 return copy_regset_from_user(child, &user_ppc_native_view,
3169                                              REGSET_FPR,
3170                                              0, sizeof(elf_fpregset_t),
3171                                              datavp);
3172
3173 #ifdef CONFIG_ALTIVEC
3174         case PTRACE_GETVRREGS:
3175                 return copy_regset_to_user(child, &user_ppc_native_view,
3176                                            REGSET_VMX,
3177                                            0, (33 * sizeof(vector128) +
3178                                                sizeof(u32)),
3179                                            datavp);
3180
3181         case PTRACE_SETVRREGS:
3182                 return copy_regset_from_user(child, &user_ppc_native_view,
3183                                              REGSET_VMX,
3184                                              0, (33 * sizeof(vector128) +
3185                                                  sizeof(u32)),
3186                                              datavp);
3187 #endif
3188 #ifdef CONFIG_VSX
3189         case PTRACE_GETVSRREGS:
3190                 return copy_regset_to_user(child, &user_ppc_native_view,
3191                                            REGSET_VSX,
3192                                            0, 32 * sizeof(double),
3193                                            datavp);
3194
3195         case PTRACE_SETVSRREGS:
3196                 return copy_regset_from_user(child, &user_ppc_native_view,
3197                                              REGSET_VSX,
3198                                              0, 32 * sizeof(double),
3199                                              datavp);
3200 #endif
3201 #ifdef CONFIG_SPE
3202         case PTRACE_GETEVRREGS:
3203                 /* Get the child spe register state. */
3204                 return copy_regset_to_user(child, &user_ppc_native_view,
3205                                            REGSET_SPE, 0, 35 * sizeof(u32),
3206                                            datavp);
3207
3208         case PTRACE_SETEVRREGS:
3209                 /* Set the child spe register state. */
3210                 return copy_regset_from_user(child, &user_ppc_native_view,
3211                                              REGSET_SPE, 0, 35 * sizeof(u32),
3212                                              datavp);
3213 #endif
3214
3215         default:
3216                 ret = ptrace_request(child, request, addr, data);
3217                 break;
3218         }
3219         return ret;
3220 }
3221
3222 #ifdef CONFIG_SECCOMP
3223 static int do_seccomp(struct pt_regs *regs)
3224 {
3225         if (!test_thread_flag(TIF_SECCOMP))
3226                 return 0;
3227
3228         /*
3229          * The ABI we present to seccomp tracers is that r3 contains
3230          * the syscall return value and orig_gpr3 contains the first
3231          * syscall parameter. This is different to the ptrace ABI where
3232          * both r3 and orig_gpr3 contain the first syscall parameter.
3233          */
3234         regs->gpr[3] = -ENOSYS;
3235
3236         /*
3237          * We use the __ version here because we have already checked
3238          * TIF_SECCOMP. If this fails, there is nothing left to do, we
3239          * have already loaded -ENOSYS into r3, or seccomp has put
3240          * something else in r3 (via SECCOMP_RET_ERRNO/TRACE).
3241          */
3242         if (__secure_computing(NULL))
3243                 return -1;
3244
3245         /*
3246          * The syscall was allowed by seccomp, restore the register
3247          * state to what audit expects.
3248          * Note that we use orig_gpr3, which means a seccomp tracer can
3249          * modify the first syscall parameter (in orig_gpr3) and also
3250          * allow the syscall to proceed.
3251          */
3252         regs->gpr[3] = regs->orig_gpr3;
3253
3254         return 0;
3255 }
3256 #else
3257 static inline int do_seccomp(struct pt_regs *regs) { return 0; }
3258 #endif /* CONFIG_SECCOMP */
3259
3260 /**
3261  * do_syscall_trace_enter() - Do syscall tracing on kernel entry.
3262  * @regs: the pt_regs of the task to trace (current)
3263  *
3264  * Performs various types of tracing on syscall entry. This includes seccomp,
3265  * ptrace, syscall tracepoints and audit.
3266  *
3267  * The pt_regs are potentially visible to userspace via ptrace, so their
3268  * contents is ABI.
3269  *
3270  * One or more of the tracers may modify the contents of pt_regs, in particular
3271  * to modify arguments or even the syscall number itself.
3272  *
3273  * It's also possible that a tracer can choose to reject the system call. In
3274  * that case this function will return an illegal syscall number, and will put
3275  * an appropriate return value in regs->r3.
3276  *
3277  * Return: the (possibly changed) syscall number.
3278  */
3279 long do_syscall_trace_enter(struct pt_regs *regs)
3280 {
3281         user_exit();
3282
3283         /*
3284          * The tracer may decide to abort the syscall, if so tracehook
3285          * will return !0. Note that the tracer may also just change
3286          * regs->gpr[0] to an invalid syscall number, that is handled
3287          * below on the exit path.
3288          */
3289         if (test_thread_flag(TIF_SYSCALL_TRACE) &&
3290             tracehook_report_syscall_entry(regs))
3291                 goto skip;
3292
3293         /* Run seccomp after ptrace; allow it to set gpr[3]. */
3294         if (do_seccomp(regs))
3295                 return -1;
3296
3297         /* Avoid trace and audit when syscall is invalid. */
3298         if (regs->gpr[0] >= NR_syscalls)
3299                 goto skip;
3300
3301         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
3302                 trace_sys_enter(regs, regs->gpr[0]);
3303
3304 #ifdef CONFIG_PPC64
3305         if (!is_32bit_task())
3306                 audit_syscall_entry(regs->gpr[0], regs->gpr[3], regs->gpr[4],
3307                                     regs->gpr[5], regs->gpr[6]);
3308         else
3309 #endif
3310                 audit_syscall_entry(regs->gpr[0],
3311                                     regs->gpr[3] & 0xffffffff,
3312                                     regs->gpr[4] & 0xffffffff,
3313                                     regs->gpr[5] & 0xffffffff,
3314                                     regs->gpr[6] & 0xffffffff);
3315
3316         /* Return the possibly modified but valid syscall number */
3317         return regs->gpr[0];
3318
3319 skip:
3320         /*
3321          * If we are aborting explicitly, or if the syscall number is
3322          * now invalid, set the return value to -ENOSYS.
3323          */
3324         regs->gpr[3] = -ENOSYS;
3325         return -1;
3326 }
3327
3328 void do_syscall_trace_leave(struct pt_regs *regs)
3329 {
3330         int step;
3331
3332         audit_syscall_exit(regs);
3333
3334         if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
3335                 trace_sys_exit(regs, regs->result);
3336
3337         step = test_thread_flag(TIF_SINGLESTEP);
3338         if (step || test_thread_flag(TIF_SYSCALL_TRACE))
3339                 tracehook_report_syscall_exit(regs, step);
3340
3341         user_enter();
3342 }