arch/powerpc/kernel/security.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 //
   3 // Security related flags and so on.
   4 //
   5 // Copyright 2018, Michael Ellerman, IBM Corporation.
   6
   7 #include <linux/cpu.h>
   8 #include <linux/kernel.h>
   9 #include <linux/device.h>
  10 #include <linux/seq_buf.h>
  11
  12 #include <asm/debugfs.h>
  13 #include <asm/asm-prototypes.h>
  14 #include <asm/code-patching.h>
  15 #include <asm/security_features.h>
  16 #include <asm/setup.h>
  17
  18
  19 unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
  20
  21 enum count_cache_flush_type {
  22         COUNT_CACHE_FLUSH_NONE  = 0x1,
  23         COUNT_CACHE_FLUSH_SW    = 0x2,
  24         COUNT_CACHE_FLUSH_HW    = 0x4,
  25 };
  26 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
  27 static bool link_stack_flush_enabled;
  28
  29 bool barrier_nospec_enabled;
  30 static bool no_nospec;
  31 static bool btb_flush_enabled;
  32 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
  33 static bool no_spectrev2;
  34 #endif
  35
  36 static void enable_barrier_nospec(bool enable)
  37 {
  38         barrier_nospec_enabled = enable;
  39         do_barrier_nospec_fixups(enable);
  40 }
  41
  42 void setup_barrier_nospec(void)
  43 {
  44         bool enable;
  45
  46         /*
  47          * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
  48          * But there's a good reason not to. The two flags we check below are
  49          * both are enabled by default in the kernel, so if the hcall is not
  50          * functional they will be enabled.
  51          * On a system where the host firmware has been updated (so the ori
  52          * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
  53          * not been updated, we would like to enable the barrier. Dropping the
  54          * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
  55          * we potentially enable the barrier on systems where the host firmware
  56          * is not updated, but that's harmless as it's a no-op.
  57          */
  58         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
  59                  security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
  60
  61         if (!no_nospec && !cpu_mitigations_off())
  62                 enable_barrier_nospec(enable);
  63 }
  64
  65 static int __init handle_nospectre_v1(char *p)
  66 {
  67         no_nospec = true;
  68
  69         return 0;
  70 }
  71 early_param("nospectre_v1", handle_nospectre_v1);
  72
  73 #ifdef CONFIG_DEBUG_FS
  74 static int barrier_nospec_set(void *data, u64 val)
  75 {
  76         switch (val) {
  77         case 0:
  78         case 1:
  79                 break;
  80         default:
  81                 return -EINVAL;
  82         }
  83
  84         if (!!val == !!barrier_nospec_enabled)
  85                 return 0;
  86
  87         enable_barrier_nospec(!!val);
  88
  89         return 0;
  90 }
  91
  92 static int barrier_nospec_get(void *data, u64 *val)
  93 {
  94         *val = barrier_nospec_enabled ? 1 : 0;
  95         return 0;
  96 }
  97
  98 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
  99                         barrier_nospec_get, barrier_nospec_set, "%llu\n");
 100
 101 static __init int barrier_nospec_debugfs_init(void)
 102 {
 103         debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
 104                             &fops_barrier_nospec);
 105         return 0;
 106 }
 107 device_initcall(barrier_nospec_debugfs_init);
 108 #endif /* CONFIG_DEBUG_FS */
 109
 110 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3S_64)
 111 static int __init handle_nospectre_v2(char *p)
 112 {
 113         no_spectrev2 = true;
 114
 115         return 0;
 116 }
 117 early_param("nospectre_v2", handle_nospectre_v2);
 118 #endif /* CONFIG_PPC_FSL_BOOK3E || CONFIG_PPC_BOOK3S_64 */
 119
 120 #ifdef CONFIG_PPC_FSL_BOOK3E
 121 void setup_spectre_v2(void)
 122 {
 123         if (no_spectrev2 || cpu_mitigations_off())
 124                 do_btb_flush_fixups();
 125         else
 126                 btb_flush_enabled = true;
 127 }
 128 #endif /* CONFIG_PPC_FSL_BOOK3E */
 129
 130 #ifdef CONFIG_PPC_BOOK3S_64
 131 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
 132 {
 133         bool thread_priv;
 134
 135         thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
 136
 137         if (rfi_flush) {
 138                 struct seq_buf s;
 139                 seq_buf_init(&s, buf, PAGE_SIZE - 1);
 140
 141                 seq_buf_printf(&s, "Mitigation: RFI Flush");
 142                 if (thread_priv)
 143                         seq_buf_printf(&s, ", L1D private per thread");
 144
 145                 seq_buf_printf(&s, "\n");
 146
 147                 return s.len;
 148         }
 149
 150         if (thread_priv)
 151                 return sprintf(buf, "Vulnerable: L1D private per thread\n");
 152
 153         if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
 154             !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
 155                 return sprintf(buf, "Not affected\n");
 156
 157         return sprintf(buf, "Vulnerable\n");
 158 }
 159
 160 ssize_t cpu_show_l1tf(struct device *dev, struct device_attribute *attr, char *buf)
 161 {
 162         return cpu_show_meltdown(dev, attr, buf);
 163 }
 164 #endif
 165
 166 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
 167 {
 168         struct seq_buf s;
 169
 170         seq_buf_init(&s, buf, PAGE_SIZE - 1);
 171
 172         if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
 173                 if (barrier_nospec_enabled)
 174                         seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
 175                 else
 176                         seq_buf_printf(&s, "Vulnerable");
 177
 178                 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
 179                         seq_buf_printf(&s, ", ori31 speculation barrier enabled");
 180
 181                 seq_buf_printf(&s, "\n");
 182         } else
 183                 seq_buf_printf(&s, "Not affected\n");
 184
 185         return s.len;
 186 }
 187
 188 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
 189 {
 190         struct seq_buf s;
 191         bool bcs, ccd;
 192
 193         seq_buf_init(&s, buf, PAGE_SIZE - 1);
 194
 195         bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
 196         ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
 197
 198         if (bcs || ccd) {
 199                 seq_buf_printf(&s, "Mitigation: ");
 200
 201                 if (bcs)
 202                         seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
 203
 204                 if (bcs && ccd)
 205                         seq_buf_printf(&s, ", ");
 206
 207                 if (ccd)
 208                         seq_buf_printf(&s, "Indirect branch cache disabled");
 209
 210                 if (link_stack_flush_enabled)
 211                         seq_buf_printf(&s, ", Software link stack flush");
 212
 213         } else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
 214                 seq_buf_printf(&s, "Mitigation: Software count cache flush");
 215
 216                 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
 217                         seq_buf_printf(&s, " (hardware accelerated)");
 218
 219                 if (link_stack_flush_enabled)
 220                         seq_buf_printf(&s, ", Software link stack flush");
 221
 222         } else if (btb_flush_enabled) {
 223                 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
 224         } else {
 225                 seq_buf_printf(&s, "Vulnerable");
 226         }
 227
 228         seq_buf_printf(&s, "\n");
 229
 230         return s.len;
 231 }
 232
 233 #ifdef CONFIG_PPC_BOOK3S_64
 234 /*
 235  * Store-forwarding barrier support.
 236  */
 237
 238 static enum stf_barrier_type stf_enabled_flush_types;
 239 static bool no_stf_barrier;
 240 bool stf_barrier;
 241
 242 static int __init handle_no_stf_barrier(char *p)
 243 {
 244         pr_info("stf-barrier: disabled on command line.");
 245         no_stf_barrier = true;
 246         return 0;
 247 }
 248
 249 early_param("no_stf_barrier", handle_no_stf_barrier);
 250
 251 /* This is the generic flag used by other architectures */
 252 static int __init handle_ssbd(char *p)
 253 {
 254         if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
 255                 /* Until firmware tells us, we have the barrier with auto */
 256                 return 0;
 257         } else if (strncmp(p, "off", 3) == 0) {
 258                 handle_no_stf_barrier(NULL);
 259                 return 0;
 260         } else
 261                 return 1;
 262
 263         return 0;
 264 }
 265 early_param("spec_store_bypass_disable", handle_ssbd);
 266
 267 /* This is the generic flag used by other architectures */
 268 static int __init handle_no_ssbd(char *p)
 269 {
 270         handle_no_stf_barrier(NULL);
 271         return 0;
 272 }
 273 early_param("nospec_store_bypass_disable", handle_no_ssbd);
 274
 275 static void stf_barrier_enable(bool enable)
 276 {
 277         if (enable)
 278                 do_stf_barrier_fixups(stf_enabled_flush_types);
 279         else
 280                 do_stf_barrier_fixups(STF_BARRIER_NONE);
 281
 282         stf_barrier = enable;
 283 }
 284
 285 void setup_stf_barrier(void)
 286 {
 287         enum stf_barrier_type type;
 288         bool enable, hv;
 289
 290         hv = cpu_has_feature(CPU_FTR_HVMODE);
 291
 292         /* Default to fallback in case fw-features are not available */
 293         if (cpu_has_feature(CPU_FTR_ARCH_300))
 294                 type = STF_BARRIER_EIEIO;
 295         else if (cpu_has_feature(CPU_FTR_ARCH_207S))
 296                 type = STF_BARRIER_SYNC_ORI;
 297         else if (cpu_has_feature(CPU_FTR_ARCH_206))
 298                 type = STF_BARRIER_FALLBACK;
 299         else
 300                 type = STF_BARRIER_NONE;
 301
 302         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 303                 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
 304                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
 305
 306         if (type == STF_BARRIER_FALLBACK) {
 307                 pr_info("stf-barrier: fallback barrier available\n");
 308         } else if (type == STF_BARRIER_SYNC_ORI) {
 309                 pr_info("stf-barrier: hwsync barrier available\n");
 310         } else if (type == STF_BARRIER_EIEIO) {
 311                 pr_info("stf-barrier: eieio barrier available\n");
 312         }
 313
 314         stf_enabled_flush_types = type;
 315
 316         if (!no_stf_barrier && !cpu_mitigations_off())
 317                 stf_barrier_enable(enable);
 318 }
 319
 320 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
 321 {
 322         if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
 323                 const char *type;
 324                 switch (stf_enabled_flush_types) {
 325                 case STF_BARRIER_EIEIO:
 326                         type = "eieio";
 327                         break;
 328                 case STF_BARRIER_SYNC_ORI:
 329                         type = "hwsync";
 330                         break;
 331                 case STF_BARRIER_FALLBACK:
 332                         type = "fallback";
 333                         break;
 334                 default:
 335                         type = "unknown";
 336                 }
 337                 return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
 338         }
 339
 340         if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
 341             !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
 342                 return sprintf(buf, "Not affected\n");
 343
 344         return sprintf(buf, "Vulnerable\n");
 345 }
 346
 347 #ifdef CONFIG_DEBUG_FS
 348 static int stf_barrier_set(void *data, u64 val)
 349 {
 350         bool enable;
 351
 352         if (val == 1)
 353                 enable = true;
 354         else if (val == 0)
 355                 enable = false;
 356         else
 357                 return -EINVAL;
 358
 359         /* Only do anything if we're changing state */
 360         if (enable != stf_barrier)
 361                 stf_barrier_enable(enable);
 362
 363         return 0;
 364 }
 365
 366 static int stf_barrier_get(void *data, u64 *val)
 367 {
 368         *val = stf_barrier ? 1 : 0;
 369         return 0;
 370 }
 371
 372 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
 373
 374 static __init int stf_barrier_debugfs_init(void)
 375 {
 376         debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
 377         return 0;
 378 }
 379 device_initcall(stf_barrier_debugfs_init);
 380 #endif /* CONFIG_DEBUG_FS */
 381
 382 static void no_count_cache_flush(void)
 383 {
 384         count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
 385         pr_info("count-cache-flush: software flush disabled.\n");
 386 }
 387
 388 static void toggle_count_cache_flush(bool enable)
 389 {
 390         if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE) &&
 391             !security_ftr_enabled(SEC_FTR_FLUSH_LINK_STACK))
 392                 enable = false;
 393
 394         if (!enable) {
 395                 patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
 396 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 397                 patch_instruction_site(&patch__call_kvm_flush_link_stack, PPC_INST_NOP);
 398 #endif
 399                 pr_info("link-stack-flush: software flush disabled.\n");
 400                 link_stack_flush_enabled = false;
 401                 no_count_cache_flush();
 402                 return;
 403         }
 404
 405         // This enables the branch from _switch to flush_count_cache
 406         patch_branch_site(&patch__call_flush_count_cache,
 407                           (u64)&flush_count_cache, BRANCH_SET_LINK);
 408
 409 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 410         // This enables the branch from guest_exit_cont to kvm_flush_link_stack
 411         patch_branch_site(&patch__call_kvm_flush_link_stack,
 412                           (u64)&kvm_flush_link_stack, BRANCH_SET_LINK);
 413 #endif
 414
 415         pr_info("link-stack-flush: software flush enabled.\n");
 416         link_stack_flush_enabled = true;
 417
 418         // If we just need to flush the link stack, patch an early return
 419         if (!security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
 420                 patch_instruction_site(&patch__flush_link_stack_return, PPC_INST_BLR);
 421                 no_count_cache_flush();
 422                 return;
 423         }
 424
 425         if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
 426                 count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
 427                 pr_info("count-cache-flush: full software flush sequence enabled.\n");
 428                 return;
 429         }
 430
 431         patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
 432         count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
 433         pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
 434 }
 435
 436 void setup_count_cache_flush(void)
 437 {
 438         bool enable = true;
 439
 440         if (no_spectrev2 || cpu_mitigations_off()) {
 441                 if (security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED) ||
 442                     security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED))
 443                         pr_warn("Spectre v2 mitigations not fully under software control, can't disable\n");
 444
 445                 enable = false;
 446         }
 447
 448         /*
 449          * There's no firmware feature flag/hypervisor bit to tell us we need to
 450          * flush the link stack on context switch. So we set it here if we see
 451          * either of the Spectre v2 mitigations that aim to protect userspace.
 452          */
 453         if (security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED) ||
 454             security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE))
 455                 security_ftr_set(SEC_FTR_FLUSH_LINK_STACK);
 456
 457         toggle_count_cache_flush(enable);
 458 }
 459
 460 #ifdef CONFIG_DEBUG_FS
 461 static int count_cache_flush_set(void *data, u64 val)
 462 {
 463         bool enable;
 464
 465         if (val == 1)
 466                 enable = true;
 467         else if (val == 0)
 468                 enable = false;
 469         else
 470                 return -EINVAL;
 471
 472         toggle_count_cache_flush(enable);
 473
 474         return 0;
 475 }
 476
 477 static int count_cache_flush_get(void *data, u64 *val)
 478 {
 479         if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
 480                 *val = 0;
 481         else
 482                 *val = 1;
 483
 484         return 0;
 485 }
 486
 487 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
 488                         count_cache_flush_set, "%llu\n");
 489
 490 static __init int count_cache_flush_debugfs_init(void)
 491 {
 492         debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
 493                             NULL, &fops_count_cache_flush);
 494         return 0;
 495 }
 496 device_initcall(count_cache_flush_debugfs_init);
 497 #endif /* CONFIG_DEBUG_FS */
 498 #endif /* CONFIG_PPC_BOOK3S_64 */