arch/powerpc/lib/sstep.c

   1 /*
   2  * Single-step support.
   3  *
   4  * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/kprobes.h>
  13 #include <linux/ptrace.h>
  14 #include <linux/prefetch.h>
  15 #include <asm/sstep.h>
  16 #include <asm/processor.h>
  17 #include <asm/uaccess.h>
  18 #include <asm/cputable.h>
  19
  20 extern char system_call_common[];
  21
  22 #ifdef CONFIG_PPC64
  23 /* Bits in SRR1 that are copied from MSR */
  24 #define MSR_MASK        0xffffffff87c0ffffUL
  25 #else
  26 #define MSR_MASK        0x87c0ffff
  27 #endif
  28
  29 /* Bits in XER */
  30 #define XER_SO          0x80000000U
  31 #define XER_OV          0x40000000U
  32 #define XER_CA          0x20000000U
  33
  34 #ifdef CONFIG_PPC_FPU
  35 /*
  36  * Functions in ldstfp.S
  37  */
  38 extern int do_lfs(int rn, unsigned long ea);
  39 extern int do_lfd(int rn, unsigned long ea);
  40 extern int do_stfs(int rn, unsigned long ea);
  41 extern int do_stfd(int rn, unsigned long ea);
  42 extern int do_lvx(int rn, unsigned long ea);
  43 extern int do_stvx(int rn, unsigned long ea);
  44 extern int do_lxvd2x(int rn, unsigned long ea);
  45 extern int do_stxvd2x(int rn, unsigned long ea);
  46 #endif
  47
  48 /*
  49  * Emulate the truncation of 64 bit values in 32-bit mode.
  50  */
  51 static unsigned long truncate_if_32bit(unsigned long msr, unsigned long val)
  52 {
  53 #ifdef __powerpc64__
  54         if ((msr & MSR_64BIT) == 0)
  55                 val &= 0xffffffffUL;
  56 #endif
  57         return val;
  58 }
  59
  60 /*
  61  * Determine whether a conditional branch instruction would branch.
  62  */
  63 static int __kprobes branch_taken(unsigned int instr, struct pt_regs *regs)
  64 {
  65         unsigned int bo = (instr >> 21) & 0x1f;
  66         unsigned int bi;
  67
  68         if ((bo & 4) == 0) {
  69                 /* decrement counter */
  70                 --regs->ctr;
  71                 if (((bo >> 1) & 1) ^ (regs->ctr == 0))
  72                         return 0;
  73         }
  74         if ((bo & 0x10) == 0) {
  75                 /* check bit from CR */
  76                 bi = (instr >> 16) & 0x1f;
  77                 if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1))
  78                         return 0;
  79         }
  80         return 1;
  81 }
  82
  83
  84 static long __kprobes address_ok(struct pt_regs *regs, unsigned long ea, int nb)
  85 {
  86         if (!user_mode(regs))
  87                 return 1;
  88         return __access_ok(ea, nb, USER_DS);
  89 }
  90
  91 /*
  92  * Calculate effective address for a D-form instruction
  93  */
  94 static unsigned long __kprobes dform_ea(unsigned int instr, struct pt_regs *regs)
  95 {
  96         int ra;
  97         unsigned long ea;
  98
  99         ra = (instr >> 16) & 0x1f;
 100         ea = (signed short) instr;              /* sign-extend */
 101         if (ra)
 102                 ea += regs->gpr[ra];
 103
 104         return truncate_if_32bit(regs->msr, ea);
 105 }
 106
 107 #ifdef __powerpc64__
 108 /*
 109  * Calculate effective address for a DS-form instruction
 110  */
 111 static unsigned long __kprobes dsform_ea(unsigned int instr, struct pt_regs *regs)
 112 {
 113         int ra;
 114         unsigned long ea;
 115
 116         ra = (instr >> 16) & 0x1f;
 117         ea = (signed short) (instr & ~3);       /* sign-extend */
 118         if (ra)
 119                 ea += regs->gpr[ra];
 120
 121         return truncate_if_32bit(regs->msr, ea);
 122 }
 123 #endif /* __powerpc64 */
 124
 125 /*
 126  * Calculate effective address for an X-form instruction
 127  */
 128 static unsigned long __kprobes xform_ea(unsigned int instr,
 129                                         struct pt_regs *regs)
 130 {
 131         int ra, rb;
 132         unsigned long ea;
 133
 134         ra = (instr >> 16) & 0x1f;
 135         rb = (instr >> 11) & 0x1f;
 136         ea = regs->gpr[rb];
 137         if (ra)
 138                 ea += regs->gpr[ra];
 139
 140         return truncate_if_32bit(regs->msr, ea);
 141 }
 142
 143 /*
 144  * Return the largest power of 2, not greater than sizeof(unsigned long),
 145  * such that x is a multiple of it.
 146  */
 147 static inline unsigned long max_align(unsigned long x)
 148 {
 149         x |= sizeof(unsigned long);
 150         return x & -x;          /* isolates rightmost bit */
 151 }
 152
 153
 154 static inline unsigned long byterev_2(unsigned long x)
 155 {
 156         return ((x >> 8) & 0xff) | ((x & 0xff) << 8);
 157 }
 158
 159 static inline unsigned long byterev_4(unsigned long x)
 160 {
 161         return ((x >> 24) & 0xff) | ((x >> 8) & 0xff00) |
 162                 ((x & 0xff00) << 8) | ((x & 0xff) << 24);
 163 }
 164
 165 #ifdef __powerpc64__
 166 static inline unsigned long byterev_8(unsigned long x)
 167 {
 168         return (byterev_4(x) << 32) | byterev_4(x >> 32);
 169 }
 170 #endif
 171
 172 static int __kprobes read_mem_aligned(unsigned long *dest, unsigned long ea,
 173                                       int nb)
 174 {
 175         int err = 0;
 176         unsigned long x = 0;
 177
 178         switch (nb) {
 179         case 1:
 180                 err = __get_user(x, (unsigned char __user *) ea);
 181                 break;
 182         case 2:
 183                 err = __get_user(x, (unsigned short __user *) ea);
 184                 break;
 185         case 4:
 186                 err = __get_user(x, (unsigned int __user *) ea);
 187                 break;
 188 #ifdef __powerpc64__
 189         case 8:
 190                 err = __get_user(x, (unsigned long __user *) ea);
 191                 break;
 192 #endif
 193         }
 194         if (!err)
 195                 *dest = x;
 196         return err;
 197 }
 198
 199 static int __kprobes read_mem_unaligned(unsigned long *dest, unsigned long ea,
 200                                         int nb, struct pt_regs *regs)
 201 {
 202         int err;
 203         unsigned long x, b, c;
 204 #ifdef __LITTLE_ENDIAN__
 205         int len = nb; /* save a copy of the length for byte reversal */
 206 #endif
 207
 208         /* unaligned, do this in pieces */
 209         x = 0;
 210         for (; nb > 0; nb -= c) {
 211 #ifdef __LITTLE_ENDIAN__
 212                 c = 1;
 213 #endif
 214 #ifdef __BIG_ENDIAN__
 215                 c = max_align(ea);
 216 #endif
 217                 if (c > nb)
 218                         c = max_align(nb);
 219                 err = read_mem_aligned(&b, ea, c);
 220                 if (err)
 221                         return err;
 222                 x = (x << (8 * c)) + b;
 223                 ea += c;
 224         }
 225 #ifdef __LITTLE_ENDIAN__
 226         switch (len) {
 227         case 2:
 228                 *dest = byterev_2(x);
 229                 break;
 230         case 4:
 231                 *dest = byterev_4(x);
 232                 break;
 233 #ifdef __powerpc64__
 234         case 8:
 235                 *dest = byterev_8(x);
 236                 break;
 237 #endif
 238         }
 239 #endif
 240 #ifdef __BIG_ENDIAN__
 241         *dest = x;
 242 #endif
 243         return 0;
 244 }
 245
 246 /*
 247  * Read memory at address ea for nb bytes, return 0 for success
 248  * or -EFAULT if an error occurred.
 249  */
 250 static int __kprobes read_mem(unsigned long *dest, unsigned long ea, int nb,
 251                               struct pt_regs *regs)
 252 {
 253         if (!address_ok(regs, ea, nb))
 254                 return -EFAULT;
 255         if ((ea & (nb - 1)) == 0)
 256                 return read_mem_aligned(dest, ea, nb);
 257         return read_mem_unaligned(dest, ea, nb, regs);
 258 }
 259
 260 static int __kprobes write_mem_aligned(unsigned long val, unsigned long ea,
 261                                        int nb)
 262 {
 263         int err = 0;
 264
 265         switch (nb) {
 266         case 1:
 267                 err = __put_user(val, (unsigned char __user *) ea);
 268                 break;
 269         case 2:
 270                 err = __put_user(val, (unsigned short __user *) ea);
 271                 break;
 272         case 4:
 273                 err = __put_user(val, (unsigned int __user *) ea);
 274                 break;
 275 #ifdef __powerpc64__
 276         case 8:
 277                 err = __put_user(val, (unsigned long __user *) ea);
 278                 break;
 279 #endif
 280         }
 281         return err;
 282 }
 283
 284 static int __kprobes write_mem_unaligned(unsigned long val, unsigned long ea,
 285                                          int nb, struct pt_regs *regs)
 286 {
 287         int err;
 288         unsigned long c;
 289
 290 #ifdef __LITTLE_ENDIAN__
 291         switch (nb) {
 292         case 2:
 293                 val = byterev_2(val);
 294                 break;
 295         case 4:
 296                 val = byterev_4(val);
 297                 break;
 298 #ifdef __powerpc64__
 299         case 8:
 300                 val = byterev_8(val);
 301                 break;
 302 #endif
 303         }
 304 #endif
 305         /* unaligned or little-endian, do this in pieces */
 306         for (; nb > 0; nb -= c) {
 307 #ifdef __LITTLE_ENDIAN__
 308                 c = 1;
 309 #endif
 310 #ifdef __BIG_ENDIAN__
 311                 c = max_align(ea);
 312 #endif
 313                 if (c > nb)
 314                         c = max_align(nb);
 315                 err = write_mem_aligned(val >> (nb - c) * 8, ea, c);
 316                 if (err)
 317                         return err;
 318                 ea += c;
 319         }
 320         return 0;
 321 }
 322
 323 /*
 324  * Write memory at address ea for nb bytes, return 0 for success
 325  * or -EFAULT if an error occurred.
 326  */
 327 static int __kprobes write_mem(unsigned long val, unsigned long ea, int nb,
 328                                struct pt_regs *regs)
 329 {
 330         if (!address_ok(regs, ea, nb))
 331                 return -EFAULT;
 332         if ((ea & (nb - 1)) == 0)
 333                 return write_mem_aligned(val, ea, nb);
 334         return write_mem_unaligned(val, ea, nb, regs);
 335 }
 336
 337 #ifdef CONFIG_PPC_FPU
 338 /*
 339  * Check the address and alignment, and call func to do the actual
 340  * load or store.
 341  */
 342 static int __kprobes do_fp_load(int rn, int (*func)(int, unsigned long),
 343                                 unsigned long ea, int nb,
 344                                 struct pt_regs *regs)
 345 {
 346         int err;
 347         union {
 348                 double dbl;
 349                 unsigned long ul[2];
 350                 struct {
 351 #ifdef __BIG_ENDIAN__
 352                         unsigned _pad_;
 353                         unsigned word;
 354 #endif
 355 #ifdef __LITTLE_ENDIAN__
 356                         unsigned word;
 357                         unsigned _pad_;
 358 #endif
 359                 } single;
 360         } data;
 361         unsigned long ptr;
 362
 363         if (!address_ok(regs, ea, nb))
 364                 return -EFAULT;
 365         if ((ea & 3) == 0)
 366                 return (*func)(rn, ea);
 367         ptr = (unsigned long) &data.ul;
 368         if (sizeof(unsigned long) == 8 || nb == 4) {
 369                 err = read_mem_unaligned(&data.ul[0], ea, nb, regs);
 370                 if (nb == 4)
 371                         ptr = (unsigned long)&(data.single.word);
 372         } else {
 373                 /* reading a double on 32-bit */
 374                 err = read_mem_unaligned(&data.ul[0], ea, 4, regs);
 375                 if (!err)
 376                         err = read_mem_unaligned(&data.ul[1], ea + 4, 4, regs);
 377         }
 378         if (err)
 379                 return err;
 380         return (*func)(rn, ptr);
 381 }
 382
 383 static int __kprobes do_fp_store(int rn, int (*func)(int, unsigned long),
 384                                  unsigned long ea, int nb,
 385                                  struct pt_regs *regs)
 386 {
 387         int err;
 388         union {
 389                 double dbl;
 390                 unsigned long ul[2];
 391                 struct {
 392 #ifdef __BIG_ENDIAN__
 393                         unsigned _pad_;
 394                         unsigned word;
 395 #endif
 396 #ifdef __LITTLE_ENDIAN__
 397                         unsigned word;
 398                         unsigned _pad_;
 399 #endif
 400                 } single;
 401         } data;
 402         unsigned long ptr;
 403
 404         if (!address_ok(regs, ea, nb))
 405                 return -EFAULT;
 406         if ((ea & 3) == 0)
 407                 return (*func)(rn, ea);
 408         ptr = (unsigned long) &data.ul[0];
 409         if (sizeof(unsigned long) == 8 || nb == 4) {
 410                 if (nb == 4)
 411                         ptr = (unsigned long)&(data.single.word);
 412                 err = (*func)(rn, ptr);
 413                 if (err)
 414                         return err;
 415                 err = write_mem_unaligned(data.ul[0], ea, nb, regs);
 416         } else {
 417                 /* writing a double on 32-bit */
 418                 err = (*func)(rn, ptr);
 419                 if (err)
 420                         return err;
 421                 err = write_mem_unaligned(data.ul[0], ea, 4, regs);
 422                 if (!err)
 423                         err = write_mem_unaligned(data.ul[1], ea + 4, 4, regs);
 424         }
 425         return err;
 426 }
 427 #endif
 428
 429 #ifdef CONFIG_ALTIVEC
 430 /* For Altivec/VMX, no need to worry about alignment */
 431 static int __kprobes do_vec_load(int rn, int (*func)(int, unsigned long),
 432                                  unsigned long ea, struct pt_regs *regs)
 433 {
 434         if (!address_ok(regs, ea & ~0xfUL, 16))
 435                 return -EFAULT;
 436         return (*func)(rn, ea);
 437 }
 438
 439 static int __kprobes do_vec_store(int rn, int (*func)(int, unsigned long),
 440                                   unsigned long ea, struct pt_regs *regs)
 441 {
 442         if (!address_ok(regs, ea & ~0xfUL, 16))
 443                 return -EFAULT;
 444         return (*func)(rn, ea);
 445 }
 446 #endif /* CONFIG_ALTIVEC */
 447
 448 #ifdef CONFIG_VSX
 449 static int __kprobes do_vsx_load(int rn, int (*func)(int, unsigned long),
 450                                  unsigned long ea, struct pt_regs *regs)
 451 {
 452         int err;
 453         unsigned long val[2];
 454
 455         if (!address_ok(regs, ea, 16))
 456                 return -EFAULT;
 457         if ((ea & 3) == 0)
 458                 return (*func)(rn, ea);
 459         err = read_mem_unaligned(&val[0], ea, 8, regs);
 460         if (!err)
 461                 err = read_mem_unaligned(&val[1], ea + 8, 8, regs);
 462         if (!err)
 463                 err = (*func)(rn, (unsigned long) &val[0]);
 464         return err;
 465 }
 466
 467 static int __kprobes do_vsx_store(int rn, int (*func)(int, unsigned long),
 468                                  unsigned long ea, struct pt_regs *regs)
 469 {
 470         int err;
 471         unsigned long val[2];
 472
 473         if (!address_ok(regs, ea, 16))
 474                 return -EFAULT;
 475         if ((ea & 3) == 0)
 476                 return (*func)(rn, ea);
 477         err = (*func)(rn, (unsigned long) &val[0]);
 478         if (err)
 479                 return err;
 480         err = write_mem_unaligned(val[0], ea, 8, regs);
 481         if (!err)
 482                 err = write_mem_unaligned(val[1], ea + 8, 8, regs);
 483         return err;
 484 }
 485 #endif /* CONFIG_VSX */
 486
 487 #define __put_user_asmx(x, addr, err, op, cr)           \
 488         __asm__ __volatile__(                           \
 489                 "1:     " op " %2,0,%3\n"               \
 490                 "       mfcr    %1\n"                   \
 491                 "2:\n"                                  \
 492                 ".section .fixup,\"ax\"\n"              \
 493                 "3:     li      %0,%4\n"                \
 494                 "       b       2b\n"                   \
 495                 ".previous\n"                           \
 496                 ".section __ex_table,\"a\"\n"           \
 497                         PPC_LONG_ALIGN "\n"             \
 498                         PPC_LONG "1b,3b\n"              \
 499                 ".previous"                             \
 500                 : "=r" (err), "=r" (cr)                 \
 501                 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err))
 502
 503 #define __get_user_asmx(x, addr, err, op)               \
 504         __asm__ __volatile__(                           \
 505                 "1:     "op" %1,0,%2\n"                 \
 506                 "2:\n"                                  \
 507                 ".section .fixup,\"ax\"\n"              \
 508                 "3:     li      %0,%3\n"                \
 509                 "       b       2b\n"                   \
 510                 ".previous\n"                           \
 511                 ".section __ex_table,\"a\"\n"           \
 512                         PPC_LONG_ALIGN "\n"             \
 513                         PPC_LONG "1b,3b\n"              \
 514                 ".previous"                             \
 515                 : "=r" (err), "=r" (x)                  \
 516                 : "r" (addr), "i" (-EFAULT), "0" (err))
 517
 518 #define __cacheop_user_asmx(addr, err, op)              \
 519         __asm__ __volatile__(                           \
 520                 "1:     "op" 0,%1\n"                    \
 521                 "2:\n"                                  \
 522                 ".section .fixup,\"ax\"\n"              \
 523                 "3:     li      %0,%3\n"                \
 524                 "       b       2b\n"                   \
 525                 ".previous\n"                           \
 526                 ".section __ex_table,\"a\"\n"           \
 527                         PPC_LONG_ALIGN "\n"             \
 528                         PPC_LONG "1b,3b\n"              \
 529                 ".previous"                             \
 530                 : "=r" (err)                            \
 531                 : "r" (addr), "i" (-EFAULT), "0" (err))
 532
 533 static void __kprobes set_cr0(struct pt_regs *regs, int rd)
 534 {
 535         long val = regs->gpr[rd];
 536
 537         regs->ccr = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000);
 538 #ifdef __powerpc64__
 539         if (!(regs->msr & MSR_64BIT))
 540                 val = (int) val;
 541 #endif
 542         if (val < 0)
 543                 regs->ccr |= 0x80000000;
 544         else if (val > 0)
 545                 regs->ccr |= 0x40000000;
 546         else
 547                 regs->ccr |= 0x20000000;
 548 }
 549
 550 static void __kprobes add_with_carry(struct pt_regs *regs, int rd,
 551                                      unsigned long val1, unsigned long val2,
 552                                      unsigned long carry_in)
 553 {
 554         unsigned long val = val1 + val2;
 555
 556         if (carry_in)
 557                 ++val;
 558         regs->gpr[rd] = val;
 559 #ifdef __powerpc64__
 560         if (!(regs->msr & MSR_64BIT)) {
 561                 val = (unsigned int) val;
 562                 val1 = (unsigned int) val1;
 563         }
 564 #endif
 565         if (val < val1 || (carry_in && val == val1))
 566                 regs->xer |= XER_CA;
 567         else
 568                 regs->xer &= ~XER_CA;
 569 }
 570
 571 static void __kprobes do_cmp_signed(struct pt_regs *regs, long v1, long v2,
 572                                     int crfld)
 573 {
 574         unsigned int crval, shift;
 575
 576         crval = (regs->xer >> 31) & 1;          /* get SO bit */
 577         if (v1 < v2)
 578                 crval |= 8;
 579         else if (v1 > v2)
 580                 crval |= 4;
 581         else
 582                 crval |= 2;
 583         shift = (7 - crfld) * 4;
 584         regs->ccr = (regs->ccr & ~(0xf << shift)) | (crval << shift);
 585 }
 586
 587 static void __kprobes do_cmp_unsigned(struct pt_regs *regs, unsigned long v1,
 588                                       unsigned long v2, int crfld)
 589 {
 590         unsigned int crval, shift;
 591
 592         crval = (regs->xer >> 31) & 1;          /* get SO bit */
 593         if (v1 < v2)
 594                 crval |= 8;
 595         else if (v1 > v2)
 596                 crval |= 4;
 597         else
 598                 crval |= 2;
 599         shift = (7 - crfld) * 4;
 600         regs->ccr = (regs->ccr & ~(0xf << shift)) | (crval << shift);
 601 }
 602
 603 static int __kprobes trap_compare(long v1, long v2)
 604 {
 605         int ret = 0;
 606
 607         if (v1 < v2)
 608                 ret |= 0x10;
 609         else if (v1 > v2)
 610                 ret |= 0x08;
 611         else
 612                 ret |= 0x04;
 613         if ((unsigned long)v1 < (unsigned long)v2)
 614                 ret |= 0x02;
 615         else if ((unsigned long)v1 > (unsigned long)v2)
 616                 ret |= 0x01;
 617         return ret;
 618 }
 619
 620 /*
 621  * Elements of 32-bit rotate and mask instructions.
 622  */
 623 #define MASK32(mb, me)  ((0xffffffffUL >> (mb)) + \
 624                          ((signed long)-0x80000000L >> (me)) + ((me) >= (mb)))
 625 #ifdef __powerpc64__
 626 #define MASK64_L(mb)    (~0UL >> (mb))
 627 #define MASK64_R(me)    ((signed long)-0x8000000000000000L >> (me))
 628 #define MASK64(mb, me)  (MASK64_L(mb) + MASK64_R(me) + ((me) >= (mb)))
 629 #define DATA32(x)       (((x) & 0xffffffffUL) | (((x) & 0xffffffffUL) << 32))
 630 #else
 631 #define DATA32(x)       (x)
 632 #endif
 633 #define ROTATE(x, n)    ((n) ? (((x) << (n)) | ((x) >> (8 * sizeof(long) - (n)))) : (x))
 634
 635 /*
 636  * Decode an instruction, and execute it if that can be done just by
 637  * modifying *regs (i.e. integer arithmetic and logical instructions,
 638  * branches, and barrier instructions).
 639  * Returns 1 if the instruction has been executed, or 0 if not.
 640  * Sets *op to indicate what the instruction does.
 641  */
 642 int __kprobes analyse_instr(struct instruction_op *op, struct pt_regs *regs,
 643                             unsigned int instr)
 644 {
 645         unsigned int opcode, ra, rb, rd, spr, u;
 646         unsigned long int imm;
 647         unsigned long int val, val2;
 648         unsigned int mb, me, sh;
 649         long ival;
 650
 651         op->type = COMPUTE;
 652
 653         opcode = instr >> 26;
 654         switch (opcode) {
 655         case 16:        /* bc */
 656                 op->type = BRANCH;
 657                 imm = (signed short)(instr & 0xfffc);
 658                 if ((instr & 2) == 0)
 659                         imm += regs->nip;
 660                 regs->nip += 4;
 661                 regs->nip = truncate_if_32bit(regs->msr, regs->nip);
 662                 if (instr & 1)
 663                         regs->link = regs->nip;
 664                 if (branch_taken(instr, regs))
 665                         regs->nip = truncate_if_32bit(regs->msr, imm);
 666                 return 1;
 667 #ifdef CONFIG_PPC64
 668         case 17:        /* sc */
 669                 if ((instr & 0xfe2) == 2)
 670                         op->type = SYSCALL;
 671                 else
 672                         op->type = UNKNOWN;
 673                 return 0;
 674 #endif
 675         case 18:        /* b */
 676                 op->type = BRANCH;
 677                 imm = instr & 0x03fffffc;
 678                 if (imm & 0x02000000)
 679                         imm -= 0x04000000;
 680                 if ((instr & 2) == 0)
 681                         imm += regs->nip;
 682                 if (instr & 1)
 683                         regs->link = truncate_if_32bit(regs->msr, regs->nip + 4);
 684                 imm = truncate_if_32bit(regs->msr, imm);
 685                 regs->nip = imm;
 686                 return 1;
 687         case 19:
 688                 switch ((instr >> 1) & 0x3ff) {
 689                 case 0:         /* mcrf */
 690                         rd = 7 - ((instr >> 23) & 0x7);
 691                         ra = 7 - ((instr >> 18) & 0x7);
 692                         rd *= 4;
 693                         ra *= 4;
 694                         val = (regs->ccr >> ra) & 0xf;
 695                         regs->ccr = (regs->ccr & ~(0xfUL << rd)) | (val << rd);
 696                         goto instr_done;
 697
 698                 case 16:        /* bclr */
 699                 case 528:       /* bcctr */
 700                         op->type = BRANCH;
 701                         imm = (instr & 0x400)? regs->ctr: regs->link;
 702                         regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
 703                         imm = truncate_if_32bit(regs->msr, imm);
 704                         if (instr & 1)
 705                                 regs->link = regs->nip;
 706                         if (branch_taken(instr, regs))
 707                                 regs->nip = imm;
 708                         return 1;
 709
 710                 case 18:        /* rfid, scary */
 711                         if (regs->msr & MSR_PR)
 712                                 goto priv;
 713                         op->type = RFI;
 714                         return 0;
 715
 716                 case 150:       /* isync */
 717                         op->type = BARRIER;
 718                         isync();
 719                         goto instr_done;
 720
 721                 case 33:        /* crnor */
 722                 case 129:       /* crandc */
 723                 case 193:       /* crxor */
 724                 case 225:       /* crnand */
 725                 case 257:       /* crand */
 726                 case 289:       /* creqv */
 727                 case 417:       /* crorc */
 728                 case 449:       /* cror */
 729                         ra = (instr >> 16) & 0x1f;
 730                         rb = (instr >> 11) & 0x1f;
 731                         rd = (instr >> 21) & 0x1f;
 732                         ra = (regs->ccr >> (31 - ra)) & 1;
 733                         rb = (regs->ccr >> (31 - rb)) & 1;
 734                         val = (instr >> (6 + ra * 2 + rb)) & 1;
 735                         regs->ccr = (regs->ccr & ~(1UL << (31 - rd))) |
 736                                 (val << (31 - rd));
 737                         goto instr_done;
 738                 }
 739                 break;
 740         case 31:
 741                 switch ((instr >> 1) & 0x3ff) {
 742                 case 598:       /* sync */
 743                         op->type = BARRIER;
 744 #ifdef __powerpc64__
 745                         switch ((instr >> 21) & 3) {
 746                         case 1:         /* lwsync */
 747                                 asm volatile("lwsync" : : : "memory");
 748                                 goto instr_done;
 749                         case 2:         /* ptesync */
 750                                 asm volatile("ptesync" : : : "memory");
 751                                 goto instr_done;
 752                         }
 753 #endif
 754                         mb();
 755                         goto instr_done;
 756
 757                 case 854:       /* eieio */
 758                         op->type = BARRIER;
 759                         eieio();
 760                         goto instr_done;
 761                 }
 762                 break;
 763         }
 764
 765         /* Following cases refer to regs->gpr[], so we need all regs */
 766         if (!FULL_REGS(regs))
 767                 return 0;
 768
 769         rd = (instr >> 21) & 0x1f;
 770         ra = (instr >> 16) & 0x1f;
 771         rb = (instr >> 11) & 0x1f;
 772
 773         switch (opcode) {
 774 #ifdef __powerpc64__
 775         case 2:         /* tdi */
 776                 if (rd & trap_compare(regs->gpr[ra], (short) instr))
 777                         goto trap;
 778                 goto instr_done;
 779 #endif
 780         case 3:         /* twi */
 781                 if (rd & trap_compare((int)regs->gpr[ra], (short) instr))
 782                         goto trap;
 783                 goto instr_done;
 784
 785         case 7:         /* mulli */
 786                 regs->gpr[rd] = regs->gpr[ra] * (short) instr;
 787                 goto instr_done;
 788
 789         case 8:         /* subfic */
 790                 imm = (short) instr;
 791                 add_with_carry(regs, rd, ~regs->gpr[ra], imm, 1);
 792                 goto instr_done;
 793
 794         case 10:        /* cmpli */
 795                 imm = (unsigned short) instr;
 796                 val = regs->gpr[ra];
 797 #ifdef __powerpc64__
 798                 if ((rd & 1) == 0)
 799                         val = (unsigned int) val;
 800 #endif
 801                 do_cmp_unsigned(regs, val, imm, rd >> 2);
 802                 goto instr_done;
 803
 804         case 11:        /* cmpi */
 805                 imm = (short) instr;
 806                 val = regs->gpr[ra];
 807 #ifdef __powerpc64__
 808                 if ((rd & 1) == 0)
 809                         val = (int) val;
 810 #endif
 811                 do_cmp_signed(regs, val, imm, rd >> 2);
 812                 goto instr_done;
 813
 814         case 12:        /* addic */
 815                 imm = (short) instr;
 816                 add_with_carry(regs, rd, regs->gpr[ra], imm, 0);
 817                 goto instr_done;
 818
 819         case 13:        /* addic. */
 820                 imm = (short) instr;
 821                 add_with_carry(regs, rd, regs->gpr[ra], imm, 0);
 822                 set_cr0(regs, rd);
 823                 goto instr_done;
 824
 825         case 14:        /* addi */
 826                 imm = (short) instr;
 827                 if (ra)
 828                         imm += regs->gpr[ra];
 829                 regs->gpr[rd] = imm;
 830                 goto instr_done;
 831
 832         case 15:        /* addis */
 833                 imm = ((short) instr) << 16;
 834                 if (ra)
 835                         imm += regs->gpr[ra];
 836                 regs->gpr[rd] = imm;
 837                 goto instr_done;
 838
 839         case 20:        /* rlwimi */
 840                 mb = (instr >> 6) & 0x1f;
 841                 me = (instr >> 1) & 0x1f;
 842                 val = DATA32(regs->gpr[rd]);
 843                 imm = MASK32(mb, me);
 844                 regs->gpr[ra] = (regs->gpr[ra] & ~imm) | (ROTATE(val, rb) & imm);
 845                 goto logical_done;
 846
 847         case 21:        /* rlwinm */
 848                 mb = (instr >> 6) & 0x1f;
 849                 me = (instr >> 1) & 0x1f;
 850                 val = DATA32(regs->gpr[rd]);
 851                 regs->gpr[ra] = ROTATE(val, rb) & MASK32(mb, me);
 852                 goto logical_done;
 853
 854         case 23:        /* rlwnm */
 855                 mb = (instr >> 6) & 0x1f;
 856                 me = (instr >> 1) & 0x1f;
 857                 rb = regs->gpr[rb] & 0x1f;
 858                 val = DATA32(regs->gpr[rd]);
 859                 regs->gpr[ra] = ROTATE(val, rb) & MASK32(mb, me);
 860                 goto logical_done;
 861
 862         case 24:        /* ori */
 863                 imm = (unsigned short) instr;
 864                 regs->gpr[ra] = regs->gpr[rd] | imm;
 865                 goto instr_done;
 866
 867         case 25:        /* oris */
 868                 imm = (unsigned short) instr;
 869                 regs->gpr[ra] = regs->gpr[rd] | (imm << 16);
 870                 goto instr_done;
 871
 872         case 26:        /* xori */
 873                 imm = (unsigned short) instr;
 874                 regs->gpr[ra] = regs->gpr[rd] ^ imm;
 875                 goto instr_done;
 876
 877         case 27:        /* xoris */
 878                 imm = (unsigned short) instr;
 879                 regs->gpr[ra] = regs->gpr[rd] ^ (imm << 16);
 880                 goto instr_done;
 881
 882         case 28:        /* andi. */
 883                 imm = (unsigned short) instr;
 884                 regs->gpr[ra] = regs->gpr[rd] & imm;
 885                 set_cr0(regs, ra);
 886                 goto instr_done;
 887
 888         case 29:        /* andis. */
 889                 imm = (unsigned short) instr;
 890                 regs->gpr[ra] = regs->gpr[rd] & (imm << 16);
 891                 set_cr0(regs, ra);
 892                 goto instr_done;
 893
 894 #ifdef __powerpc64__
 895         case 30:        /* rld* */
 896                 mb = ((instr >> 6) & 0x1f) | (instr & 0x20);
 897                 val = regs->gpr[rd];
 898                 if ((instr & 0x10) == 0) {
 899                         sh = rb | ((instr & 2) << 4);
 900                         val = ROTATE(val, sh);
 901                         switch ((instr >> 2) & 3) {
 902                         case 0:         /* rldicl */
 903                                 regs->gpr[ra] = val & MASK64_L(mb);
 904                                 goto logical_done;
 905                         case 1:         /* rldicr */
 906                                 regs->gpr[ra] = val & MASK64_R(mb);
 907                                 goto logical_done;
 908                         case 2:         /* rldic */
 909                                 regs->gpr[ra] = val & MASK64(mb, 63 - sh);
 910                                 goto logical_done;
 911                         case 3:         /* rldimi */
 912                                 imm = MASK64(mb, 63 - sh);
 913                                 regs->gpr[ra] = (regs->gpr[ra] & ~imm) |
 914                                         (val & imm);
 915                                 goto logical_done;
 916                         }
 917                 } else {
 918                         sh = regs->gpr[rb] & 0x3f;
 919                         val = ROTATE(val, sh);
 920                         switch ((instr >> 1) & 7) {
 921                         case 0:         /* rldcl */
 922                                 regs->gpr[ra] = val & MASK64_L(mb);
 923                                 goto logical_done;
 924                         case 1:         /* rldcr */
 925                                 regs->gpr[ra] = val & MASK64_R(mb);
 926                                 goto logical_done;
 927                         }
 928                 }
 929 #endif
 930
 931         case 31:
 932                 switch ((instr >> 1) & 0x3ff) {
 933                 case 4:         /* tw */
 934                         if (rd == 0x1f ||
 935                             (rd & trap_compare((int)regs->gpr[ra],
 936                                                (int)regs->gpr[rb])))
 937                                 goto trap;
 938                         goto instr_done;
 939 #ifdef __powerpc64__
 940                 case 68:        /* td */
 941                         if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb]))
 942                                 goto trap;
 943                         goto instr_done;
 944 #endif
 945                 case 83:        /* mfmsr */
 946                         if (regs->msr & MSR_PR)
 947                                 goto priv;
 948                         op->type = MFMSR;
 949                         op->reg = rd;
 950                         return 0;
 951                 case 146:       /* mtmsr */
 952                         if (regs->msr & MSR_PR)
 953                                 goto priv;
 954                         op->type = MTMSR;
 955                         op->reg = rd;
 956                         op->val = 0xffffffff & ~(MSR_ME | MSR_LE);
 957                         return 0;
 958 #ifdef CONFIG_PPC64
 959                 case 178:       /* mtmsrd */
 960                         if (regs->msr & MSR_PR)
 961                                 goto priv;
 962                         op->type = MTMSR;
 963                         op->reg = rd;
 964                         /* only MSR_EE and MSR_RI get changed if bit 15 set */
 965                         /* mtmsrd doesn't change MSR_HV, MSR_ME or MSR_LE */
 966                         imm = (instr & 0x10000)? 0x8002: 0xefffffffffffeffeUL;
 967                         op->val = imm;
 968                         return 0;
 969 #endif
 970
 971                 case 19:        /* mfcr */
 972                         if ((instr >> 20) & 1) {
 973                                 imm = 0xf0000000UL;
 974                                 for (sh = 0; sh < 8; ++sh) {
 975                                         if (instr & (0x80000 >> sh)) {
 976                                                 regs->gpr[rd] = regs->ccr & imm;
 977                                                 break;
 978                                         }
 979                                         imm >>= 4;
 980                                 }
 981
 982                                 goto instr_done;
 983                         }
 984
 985                         regs->gpr[rd] = regs->ccr;
 986                         regs->gpr[rd] &= 0xffffffffUL;
 987                         goto instr_done;
 988
 989                 case 144:       /* mtcrf */
 990                         imm = 0xf0000000UL;
 991                         val = regs->gpr[rd];
 992                         for (sh = 0; sh < 8; ++sh) {
 993                                 if (instr & (0x80000 >> sh))
 994                                         regs->ccr = (regs->ccr & ~imm) |
 995                                                 (val & imm);
 996                                 imm >>= 4;
 997                         }
 998                         goto instr_done;
 999
1000                 case 339:       /* mfspr */
1001                         spr = ((instr >> 16) & 0x1f) | ((instr >> 6) & 0x3e0);
1002                         switch (spr) {
1003                         case SPRN_XER:  /* mfxer */
1004                                 regs->gpr[rd] = regs->xer;
1005                                 regs->gpr[rd] &= 0xffffffffUL;
1006                                 goto instr_done;
1007                         case SPRN_LR:   /* mflr */
1008                                 regs->gpr[rd] = regs->link;
1009                                 goto instr_done;
1010                         case SPRN_CTR:  /* mfctr */
1011                                 regs->gpr[rd] = regs->ctr;
1012                                 goto instr_done;
1013                         default:
1014                                 op->type = MFSPR;
1015                                 op->reg = rd;
1016                                 op->spr = spr;
1017                                 return 0;
1018                         }
1019                         break;
1020
1021                 case 467:       /* mtspr */
1022                         spr = ((instr >> 16) & 0x1f) | ((instr >> 6) & 0x3e0);
1023                         switch (spr) {
1024                         case SPRN_XER:  /* mtxer */
1025                                 regs->xer = (regs->gpr[rd] & 0xffffffffUL);
1026                                 goto instr_done;
1027                         case SPRN_LR:   /* mtlr */
1028                                 regs->link = regs->gpr[rd];
1029                                 goto instr_done;
1030                         case SPRN_CTR:  /* mtctr */
1031                                 regs->ctr = regs->gpr[rd];
1032                                 goto instr_done;
1033                         default:
1034                                 op->type = MTSPR;
1035                                 op->val = regs->gpr[rd];
1036                                 op->spr = spr;
1037                                 return 0;
1038                         }
1039                         break;
1040
1041 /*
1042  * Compare instructions
1043  */
1044                 case 0: /* cmp */
1045                         val = regs->gpr[ra];
1046                         val2 = regs->gpr[rb];
1047 #ifdef __powerpc64__
1048                         if ((rd & 1) == 0) {
1049                                 /* word (32-bit) compare */
1050                                 val = (int) val;
1051                                 val2 = (int) val2;
1052                         }
1053 #endif
1054                         do_cmp_signed(regs, val, val2, rd >> 2);
1055                         goto instr_done;
1056
1057                 case 32:        /* cmpl */
1058                         val = regs->gpr[ra];
1059                         val2 = regs->gpr[rb];
1060 #ifdef __powerpc64__
1061                         if ((rd & 1) == 0) {
1062                                 /* word (32-bit) compare */
1063                                 val = (unsigned int) val;
1064                                 val2 = (unsigned int) val2;
1065                         }
1066 #endif
1067                         do_cmp_unsigned(regs, val, val2, rd >> 2);
1068                         goto instr_done;
1069
1070 /*
1071  * Arithmetic instructions
1072  */
1073                 case 8: /* subfc */
1074                         add_with_carry(regs, rd, ~regs->gpr[ra],
1075                                        regs->gpr[rb], 1);
1076                         goto arith_done;
1077 #ifdef __powerpc64__
1078                 case 9: /* mulhdu */
1079                         asm("mulhdu %0,%1,%2" : "=r" (regs->gpr[rd]) :
1080                             "r" (regs->gpr[ra]), "r" (regs->gpr[rb]));
1081                         goto arith_done;
1082 #endif
1083                 case 10:        /* addc */
1084                         add_with_carry(regs, rd, regs->gpr[ra],
1085                                        regs->gpr[rb], 0);
1086                         goto arith_done;
1087
1088                 case 11:        /* mulhwu */
1089                         asm("mulhwu %0,%1,%2" : "=r" (regs->gpr[rd]) :
1090                             "r" (regs->gpr[ra]), "r" (regs->gpr[rb]));
1091                         goto arith_done;
1092
1093                 case 40:        /* subf */
1094                         regs->gpr[rd] = regs->gpr[rb] - regs->gpr[ra];
1095                         goto arith_done;
1096 #ifdef __powerpc64__
1097                 case 73:        /* mulhd */
1098                         asm("mulhd %0,%1,%2" : "=r" (regs->gpr[rd]) :
1099                             "r" (regs->gpr[ra]), "r" (regs->gpr[rb]));
1100                         goto arith_done;
1101 #endif
1102                 case 75:        /* mulhw */
1103                         asm("mulhw %0,%1,%2" : "=r" (regs->gpr[rd]) :
1104                             "r" (regs->gpr[ra]), "r" (regs->gpr[rb]));
1105                         goto arith_done;
1106
1107                 case 104:       /* neg */
1108                         regs->gpr[rd] = -regs->gpr[ra];
1109                         goto arith_done;
1110
1111                 case 136:       /* subfe */
1112                         add_with_carry(regs, rd, ~regs->gpr[ra], regs->gpr[rb],
1113                                        regs->xer & XER_CA);
1114                         goto arith_done;
1115
1116                 case 138:       /* adde */
1117                         add_with_carry(regs, rd, regs->gpr[ra], regs->gpr[rb],
1118                                        regs->xer & XER_CA);
1119                         goto arith_done;
1120
1121                 case 200:       /* subfze */
1122                         add_with_carry(regs, rd, ~regs->gpr[ra], 0L,
1123                                        regs->xer & XER_CA);
1124                         goto arith_done;
1125
1126                 case 202:       /* addze */
1127                         add_with_carry(regs, rd, regs->gpr[ra], 0L,
1128                                        regs->xer & XER_CA);
1129                         goto arith_done;
1130
1131                 case 232:       /* subfme */
1132                         add_with_carry(regs, rd, ~regs->gpr[ra], -1L,
1133                                        regs->xer & XER_CA);
1134                         goto arith_done;
1135 #ifdef __powerpc64__
1136                 case 233:       /* mulld */
1137                         regs->gpr[rd] = regs->gpr[ra] * regs->gpr[rb];
1138                         goto arith_done;
1139 #endif
1140                 case 234:       /* addme */
1141                         add_with_carry(regs, rd, regs->gpr[ra], -1L,
1142                                        regs->xer & XER_CA);
1143                         goto arith_done;
1144
1145                 case 235:       /* mullw */
1146                         regs->gpr[rd] = (unsigned int) regs->gpr[ra] *
1147                                 (unsigned int) regs->gpr[rb];
1148                         goto arith_done;
1149
1150                 case 266:       /* add */
1151                         regs->gpr[rd] = regs->gpr[ra] + regs->gpr[rb];
1152                         goto arith_done;
1153 #ifdef __powerpc64__
1154                 case 457:       /* divdu */
1155                         regs->gpr[rd] = regs->gpr[ra] / regs->gpr[rb];
1156                         goto arith_done;
1157 #endif
1158                 case 459:       /* divwu */
1159                         regs->gpr[rd] = (unsigned int) regs->gpr[ra] /
1160                                 (unsigned int) regs->gpr[rb];
1161                         goto arith_done;
1162 #ifdef __powerpc64__
1163                 case 489:       /* divd */
1164                         regs->gpr[rd] = (long int) regs->gpr[ra] /
1165                                 (long int) regs->gpr[rb];
1166                         goto arith_done;
1167 #endif
1168                 case 491:       /* divw */
1169                         regs->gpr[rd] = (int) regs->gpr[ra] /
1170                                 (int) regs->gpr[rb];
1171                         goto arith_done;
1172
1173
1174 /*
1175  * Logical instructions
1176  */
1177                 case 26:        /* cntlzw */
1178                         asm("cntlzw %0,%1" : "=r" (regs->gpr[ra]) :
1179                             "r" (regs->gpr[rd]));
1180                         goto logical_done;
1181 #ifdef __powerpc64__
1182                 case 58:        /* cntlzd */
1183                         asm("cntlzd %0,%1" : "=r" (regs->gpr[ra]) :
1184                             "r" (regs->gpr[rd]));
1185                         goto logical_done;
1186 #endif
1187                 case 28:        /* and */
1188                         regs->gpr[ra] = regs->gpr[rd] & regs->gpr[rb];
1189                         goto logical_done;
1190
1191                 case 60:        /* andc */
1192                         regs->gpr[ra] = regs->gpr[rd] & ~regs->gpr[rb];
1193                         goto logical_done;
1194
1195                 case 124:       /* nor */
1196                         regs->gpr[ra] = ~(regs->gpr[rd] | regs->gpr[rb]);
1197                         goto logical_done;
1198
1199                 case 284:       /* xor */
1200                         regs->gpr[ra] = ~(regs->gpr[rd] ^ regs->gpr[rb]);
1201                         goto logical_done;
1202
1203                 case 316:       /* xor */
1204                         regs->gpr[ra] = regs->gpr[rd] ^ regs->gpr[rb];
1205                         goto logical_done;
1206
1207                 case 412:       /* orc */
1208                         regs->gpr[ra] = regs->gpr[rd] | ~regs->gpr[rb];
1209                         goto logical_done;
1210
1211                 case 444:       /* or */
1212                         regs->gpr[ra] = regs->gpr[rd] | regs->gpr[rb];
1213                         goto logical_done;
1214
1215                 case 476:       /* nand */
1216                         regs->gpr[ra] = ~(regs->gpr[rd] & regs->gpr[rb]);
1217                         goto logical_done;
1218
1219                 case 922:       /* extsh */
1220                         regs->gpr[ra] = (signed short) regs->gpr[rd];
1221                         goto logical_done;
1222
1223                 case 954:       /* extsb */
1224                         regs->gpr[ra] = (signed char) regs->gpr[rd];
1225                         goto logical_done;
1226 #ifdef __powerpc64__
1227                 case 986:       /* extsw */
1228                         regs->gpr[ra] = (signed int) regs->gpr[rd];
1229                         goto logical_done;
1230 #endif
1231
1232 /*
1233  * Shift instructions
1234  */
1235                 case 24:        /* slw */
1236                         sh = regs->gpr[rb] & 0x3f;
1237                         if (sh < 32)
1238                                 regs->gpr[ra] = (regs->gpr[rd] << sh) & 0xffffffffUL;
1239                         else
1240                                 regs->gpr[ra] = 0;
1241                         goto logical_done;
1242
1243                 case 536:       /* srw */
1244                         sh = regs->gpr[rb] & 0x3f;
1245                         if (sh < 32)
1246                                 regs->gpr[ra] = (regs->gpr[rd] & 0xffffffffUL) >> sh;
1247                         else
1248                                 regs->gpr[ra] = 0;
1249                         goto logical_done;
1250
1251                 case 792:       /* sraw */
1252                         sh = regs->gpr[rb] & 0x3f;
1253                         ival = (signed int) regs->gpr[rd];
1254                         regs->gpr[ra] = ival >> (sh < 32 ? sh : 31);
1255                         if (ival < 0 && (sh >= 32 || (ival & ((1ul << sh) - 1)) != 0))
1256                                 regs->xer |= XER_CA;
1257                         else
1258                                 regs->xer &= ~XER_CA;
1259                         goto logical_done;
1260
1261                 case 824:       /* srawi */
1262                         sh = rb;
1263                         ival = (signed int) regs->gpr[rd];
1264                         regs->gpr[ra] = ival >> sh;
1265                         if (ival < 0 && (ival & ((1ul << sh) - 1)) != 0)
1266                                 regs->xer |= XER_CA;
1267                         else
1268                                 regs->xer &= ~XER_CA;
1269                         goto logical_done;
1270
1271 #ifdef __powerpc64__
1272                 case 27:        /* sld */
1273                         sh = regs->gpr[rb] & 0x7f;
1274                         if (sh < 64)
1275                                 regs->gpr[ra] = regs->gpr[rd] << sh;
1276                         else
1277                                 regs->gpr[ra] = 0;
1278                         goto logical_done;
1279
1280                 case 539:       /* srd */
1281                         sh = regs->gpr[rb] & 0x7f;
1282                         if (sh < 64)
1283                                 regs->gpr[ra] = regs->gpr[rd] >> sh;
1284                         else
1285                                 regs->gpr[ra] = 0;
1286                         goto logical_done;
1287
1288                 case 794:       /* srad */
1289                         sh = regs->gpr[rb] & 0x7f;
1290                         ival = (signed long int) regs->gpr[rd];
1291                         regs->gpr[ra] = ival >> (sh < 64 ? sh : 63);
1292                         if (ival < 0 && (sh >= 64 || (ival & ((1ul << sh) - 1)) != 0))
1293                                 regs->xer |= XER_CA;
1294                         else
1295                                 regs->xer &= ~XER_CA;
1296                         goto logical_done;
1297
1298                 case 826:       /* sradi with sh_5 = 0 */
1299                 case 827:       /* sradi with sh_5 = 1 */
1300                         sh = rb | ((instr & 2) << 4);
1301                         ival = (signed long int) regs->gpr[rd];
1302                         regs->gpr[ra] = ival >> sh;
1303                         if (ival < 0 && (ival & ((1ul << sh) - 1)) != 0)
1304                                 regs->xer |= XER_CA;
1305                         else
1306                                 regs->xer &= ~XER_CA;
1307                         goto logical_done;
1308 #endif /* __powerpc64__ */
1309
1310 /*
1311  * Cache instructions
1312  */
1313                 case 54:        /* dcbst */
1314                         op->type = MKOP(CACHEOP, DCBST, 0);
1315                         op->ea = xform_ea(instr, regs);
1316                         return 0;
1317
1318                 case 86:        /* dcbf */
1319                         op->type = MKOP(CACHEOP, DCBF, 0);
1320                         op->ea = xform_ea(instr, regs);
1321                         return 0;
1322
1323                 case 246:       /* dcbtst */
1324                         op->type = MKOP(CACHEOP, DCBTST, 0);
1325                         op->ea = xform_ea(instr, regs);
1326                         op->reg = rd;
1327                         return 0;
1328
1329                 case 278:       /* dcbt */
1330                         op->type = MKOP(CACHEOP, DCBTST, 0);
1331                         op->ea = xform_ea(instr, regs);
1332                         op->reg = rd;
1333                         return 0;
1334
1335                 case 982:       /* icbi */
1336                         op->type = MKOP(CACHEOP, ICBI, 0);
1337                         op->ea = xform_ea(instr, regs);
1338                         return 0;
1339                 }
1340                 break;
1341         }
1342
1343         /*
1344          * Loads and stores.
1345          */
1346         op->type = UNKNOWN;
1347         op->update_reg = ra;
1348         op->reg = rd;
1349         op->val = regs->gpr[rd];
1350         u = (instr >> 20) & UPDATE;
1351
1352         switch (opcode) {
1353         case 31:
1354                 u = instr & UPDATE;
1355                 op->ea = xform_ea(instr, regs);
1356                 switch ((instr >> 1) & 0x3ff) {
1357                 case 20:        /* lwarx */
1358                         op->type = MKOP(LARX, 0, 4);
1359                         break;
1360
1361                 case 150:       /* stwcx. */
1362                         op->type = MKOP(STCX, 0, 4);
1363                         break;
1364
1365 #ifdef __powerpc64__
1366                 case 84:        /* ldarx */
1367                         op->type = MKOP(LARX, 0, 8);
1368                         break;
1369
1370                 case 214:       /* stdcx. */
1371                         op->type = MKOP(STCX, 0, 8);
1372                         break;
1373
1374                 case 21:        /* ldx */
1375                 case 53:        /* ldux */
1376                         op->type = MKOP(LOAD, u, 8);
1377                         break;
1378 #endif
1379
1380                 case 23:        /* lwzx */
1381                 case 55:        /* lwzux */
1382                         op->type = MKOP(LOAD, u, 4);
1383                         break;
1384
1385                 case 87:        /* lbzx */
1386                 case 119:       /* lbzux */
1387                         op->type = MKOP(LOAD, u, 1);
1388                         break;
1389
1390 #ifdef CONFIG_ALTIVEC
1391                 case 103:       /* lvx */
1392                 case 359:       /* lvxl */
1393                         if (!(regs->msr & MSR_VEC))
1394                                 goto vecunavail;
1395                         op->type = MKOP(LOAD_VMX, 0, 16);
1396                         break;
1397
1398                 case 231:       /* stvx */
1399                 case 487:       /* stvxl */
1400                         if (!(regs->msr & MSR_VEC))
1401                                 goto vecunavail;
1402                         op->type = MKOP(STORE_VMX, 0, 16);
1403                         break;
1404 #endif /* CONFIG_ALTIVEC */
1405
1406 #ifdef __powerpc64__
1407                 case 149:       /* stdx */
1408                 case 181:       /* stdux */
1409                         op->type = MKOP(STORE, u, 8);
1410                         break;
1411 #endif
1412
1413                 case 151:       /* stwx */
1414                 case 183:       /* stwux */
1415                         op->type = MKOP(STORE, u, 4);
1416                         break;
1417
1418                 case 215:       /* stbx */
1419                 case 247:       /* stbux */
1420                         op->type = MKOP(STORE, u, 1);
1421                         break;
1422
1423                 case 279:       /* lhzx */
1424                 case 311:       /* lhzux */
1425                         op->type = MKOP(LOAD, u, 2);
1426                         break;
1427
1428 #ifdef __powerpc64__
1429                 case 341:       /* lwax */
1430                 case 373:       /* lwaux */
1431                         op->type = MKOP(LOAD, SIGNEXT | u, 4);
1432                         break;
1433 #endif
1434
1435                 case 343:       /* lhax */
1436                 case 375:       /* lhaux */
1437                         op->type = MKOP(LOAD, SIGNEXT | u, 2);
1438                         break;
1439
1440                 case 407:       /* sthx */
1441                 case 439:       /* sthux */
1442                         op->type = MKOP(STORE, u, 2);
1443                         break;
1444
1445 #ifdef __powerpc64__
1446                 case 532:       /* ldbrx */
1447                         op->type = MKOP(LOAD, BYTEREV, 8);
1448                         break;
1449
1450 #endif
1451                 case 533:       /* lswx */
1452                         op->type = MKOP(LOAD_MULTI, 0, regs->xer & 0x7f);
1453                         break;
1454
1455                 case 534:       /* lwbrx */
1456                         op->type = MKOP(LOAD, BYTEREV, 4);
1457                         break;
1458
1459                 case 597:       /* lswi */
1460                         if (rb == 0)
1461                                 rb = 32;        /* # bytes to load */
1462                         op->type = MKOP(LOAD_MULTI, 0, rb);
1463                         op->ea = 0;
1464                         if (ra)
1465                                 op->ea = truncate_if_32bit(regs->msr,
1466                                                            regs->gpr[ra]);
1467                         break;
1468
1469 #ifdef CONFIG_PPC_FPU
1470                 case 535:       /* lfsx */
1471                 case 567:       /* lfsux */
1472                         if (!(regs->msr & MSR_FP))
1473                                 goto fpunavail;
1474                         op->type = MKOP(LOAD_FP, u, 4);
1475                         break;
1476
1477                 case 599:       /* lfdx */
1478                 case 631:       /* lfdux */
1479                         if (!(regs->msr & MSR_FP))
1480                                 goto fpunavail;
1481                         op->type = MKOP(LOAD_FP, u, 8);
1482                         break;
1483
1484                 case 663:       /* stfsx */
1485                 case 695:       /* stfsux */
1486                         if (!(regs->msr & MSR_FP))
1487                                 goto fpunavail;
1488                         op->type = MKOP(STORE_FP, u, 4);
1489                         break;
1490
1491                 case 727:       /* stfdx */
1492                 case 759:       /* stfdux */
1493                         if (!(regs->msr & MSR_FP))
1494                                 goto fpunavail;
1495                         op->type = MKOP(STORE_FP, u, 8);
1496                         break;
1497 #endif
1498
1499 #ifdef __powerpc64__
1500                 case 660:       /* stdbrx */
1501                         op->type = MKOP(STORE, BYTEREV, 8);
1502                         op->val = byterev_8(regs->gpr[rd]);
1503                         break;
1504
1505 #endif
1506                 case 661:       /* stswx */
1507                         op->type = MKOP(STORE_MULTI, 0, regs->xer & 0x7f);
1508                         break;
1509
1510                 case 662:       /* stwbrx */
1511                         op->type = MKOP(STORE, BYTEREV, 4);
1512                         op->val = byterev_4(regs->gpr[rd]);
1513                         break;
1514
1515                 case 725:
1516                         if (rb == 0)
1517                                 rb = 32;        /* # bytes to store */
1518                         op->type = MKOP(STORE_MULTI, 0, rb);
1519                         op->ea = 0;
1520                         if (ra)
1521                                 op->ea = truncate_if_32bit(regs->msr,
1522                                                            regs->gpr[ra]);
1523                         break;
1524
1525                 case 790:       /* lhbrx */
1526                         op->type = MKOP(LOAD, BYTEREV, 2);
1527                         break;
1528
1529                 case 918:       /* sthbrx */
1530                         op->type = MKOP(STORE, BYTEREV, 2);
1531                         op->val = byterev_2(regs->gpr[rd]);
1532                         break;
1533
1534 #ifdef CONFIG_VSX
1535                 case 844:       /* lxvd2x */
1536                 case 876:       /* lxvd2ux */
1537                         if (!(regs->msr & MSR_VSX))
1538                                 goto vsxunavail;
1539                         op->reg = rd | ((instr & 1) << 5);
1540                         op->type = MKOP(LOAD_VSX, u, 16);
1541                         break;
1542
1543                 case 972:       /* stxvd2x */
1544                 case 1004:      /* stxvd2ux */
1545                         if (!(regs->msr & MSR_VSX))
1546                                 goto vsxunavail;
1547                         op->reg = rd | ((instr & 1) << 5);
1548                         op->type = MKOP(STORE_VSX, u, 16);
1549                         break;
1550
1551 #endif /* CONFIG_VSX */
1552                 }
1553                 break;
1554
1555         case 32:        /* lwz */
1556         case 33:        /* lwzu */
1557                 op->type = MKOP(LOAD, u, 4);
1558                 op->ea = dform_ea(instr, regs);
1559                 break;
1560
1561         case 34:        /* lbz */
1562         case 35:        /* lbzu */
1563                 op->type = MKOP(LOAD, u, 1);
1564                 op->ea = dform_ea(instr, regs);
1565                 break;
1566
1567         case 36:        /* stw */
1568         case 37:        /* stwu */
1569                 op->type = MKOP(STORE, u, 4);
1570                 op->ea = dform_ea(instr, regs);
1571                 break;
1572
1573         case 38:        /* stb */
1574         case 39:        /* stbu */
1575                 op->type = MKOP(STORE, u, 1);
1576                 op->ea = dform_ea(instr, regs);
1577                 break;
1578
1579         case 40:        /* lhz */
1580         case 41:        /* lhzu */
1581                 op->type = MKOP(LOAD, u, 2);
1582                 op->ea = dform_ea(instr, regs);
1583                 break;
1584
1585         case 42:        /* lha */
1586         case 43:        /* lhau */
1587                 op->type = MKOP(LOAD, SIGNEXT | u, 2);
1588                 op->ea = dform_ea(instr, regs);
1589                 break;
1590
1591         case 44:        /* sth */
1592         case 45:        /* sthu */
1593                 op->type = MKOP(STORE, u, 2);
1594                 op->ea = dform_ea(instr, regs);
1595                 break;
1596
1597         case 46:        /* lmw */
1598                 if (ra >= rd)
1599                         break;          /* invalid form, ra in range to load */
1600                 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd));
1601                 op->ea = dform_ea(instr, regs);
1602                 break;
1603
1604         case 47:        /* stmw */
1605                 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd));
1606                 op->ea = dform_ea(instr, regs);
1607                 break;
1608
1609 #ifdef CONFIG_PPC_FPU
1610         case 48:        /* lfs */
1611         case 49:        /* lfsu */
1612                 if (!(regs->msr & MSR_FP))
1613                         goto fpunavail;
1614                 op->type = MKOP(LOAD_FP, u, 4);
1615                 op->ea = dform_ea(instr, regs);
1616                 break;
1617
1618         case 50:        /* lfd */
1619         case 51:        /* lfdu */
1620                 if (!(regs->msr & MSR_FP))
1621                         goto fpunavail;
1622                 op->type = MKOP(LOAD_FP, u, 8);
1623                 op->ea = dform_ea(instr, regs);
1624                 break;
1625
1626         case 52:        /* stfs */
1627         case 53:        /* stfsu */
1628                 if (!(regs->msr & MSR_FP))
1629                         goto fpunavail;
1630                 op->type = MKOP(STORE_FP, u, 4);
1631                 op->ea = dform_ea(instr, regs);
1632                 break;
1633
1634         case 54:        /* stfd */
1635         case 55:        /* stfdu */
1636                 if (!(regs->msr & MSR_FP))
1637                         goto fpunavail;
1638                 op->type = MKOP(STORE_FP, u, 8);
1639                 op->ea = dform_ea(instr, regs);
1640                 break;
1641 #endif
1642
1643 #ifdef __powerpc64__
1644         case 58:        /* ld[u], lwa */
1645                 op->ea = dsform_ea(instr, regs);
1646                 switch (instr & 3) {
1647                 case 0:         /* ld */
1648                         op->type = MKOP(LOAD, 0, 8);
1649                         break;
1650                 case 1:         /* ldu */
1651                         op->type = MKOP(LOAD, UPDATE, 8);
1652                         break;
1653                 case 2:         /* lwa */
1654                         op->type = MKOP(LOAD, SIGNEXT, 4);
1655                         break;
1656                 }
1657                 break;
1658
1659         case 62:        /* std[u] */
1660                 op->ea = dsform_ea(instr, regs);
1661                 switch (instr & 3) {
1662                 case 0:         /* std */
1663                         op->type = MKOP(STORE, 0, 8);
1664                         break;
1665                 case 1:         /* stdu */
1666                         op->type = MKOP(STORE, UPDATE, 8);
1667                         break;
1668                 }
1669                 break;
1670 #endif /* __powerpc64__ */
1671
1672         }
1673         return 0;
1674
1675  logical_done:
1676         if (instr & 1)
1677                 set_cr0(regs, ra);
1678         goto instr_done;
1679
1680  arith_done:
1681         if (instr & 1)
1682                 set_cr0(regs, rd);
1683
1684  instr_done:
1685         regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
1686         return 1;
1687
1688  priv:
1689         op->type = INTERRUPT | 0x700;
1690         op->val = SRR1_PROGPRIV;
1691         return 0;
1692
1693  trap:
1694         op->type = INTERRUPT | 0x700;
1695         op->val = SRR1_PROGTRAP;
1696         return 0;
1697
1698 #ifdef CONFIG_PPC_FPU
1699  fpunavail:
1700         op->type = INTERRUPT | 0x800;
1701         return 0;
1702 #endif
1703
1704 #ifdef CONFIG_ALTIVEC
1705  vecunavail:
1706         op->type = INTERRUPT | 0xf20;
1707         return 0;
1708 #endif
1709
1710 #ifdef CONFIG_VSX
1711  vsxunavail:
1712         op->type = INTERRUPT | 0xf40;
1713         return 0;
1714 #endif
1715 }
1716 EXPORT_SYMBOL_GPL(analyse_instr);
1717
1718 /*
1719  * For PPC32 we always use stwu with r1 to change the stack pointer.
1720  * So this emulated store may corrupt the exception frame, now we
1721  * have to provide the exception frame trampoline, which is pushed
1722  * below the kprobed function stack. So we only update gpr[1] but
1723  * don't emulate the real store operation. We will do real store
1724  * operation safely in exception return code by checking this flag.
1725  */
1726 static __kprobes int handle_stack_update(unsigned long ea, struct pt_regs *regs)
1727 {
1728 #ifdef CONFIG_PPC32
1729         /*
1730          * Check if we will touch kernel stack overflow
1731          */
1732         if (ea - STACK_INT_FRAME_SIZE <= current->thread.ksp_limit) {
1733                 printk(KERN_CRIT "Can't kprobe this since kernel stack would overflow.\n");
1734                 return -EINVAL;
1735         }
1736 #endif /* CONFIG_PPC32 */
1737         /*
1738          * Check if we already set since that means we'll
1739          * lose the previous value.
1740          */
1741         WARN_ON(test_thread_flag(TIF_EMULATE_STACK_STORE));
1742         set_thread_flag(TIF_EMULATE_STACK_STORE);
1743         return 0;
1744 }
1745
1746 static __kprobes void do_signext(unsigned long *valp, int size)
1747 {
1748         switch (size) {
1749         case 2:
1750                 *valp = (signed short) *valp;
1751                 break;
1752         case 4:
1753                 *valp = (signed int) *valp;
1754                 break;
1755         }
1756 }
1757
1758 static __kprobes void do_byterev(unsigned long *valp, int size)
1759 {
1760         switch (size) {
1761         case 2:
1762                 *valp = byterev_2(*valp);
1763                 break;
1764         case 4:
1765                 *valp = byterev_4(*valp);
1766                 break;
1767 #ifdef __powerpc64__
1768         case 8:
1769                 *valp = byterev_8(*valp);
1770                 break;
1771 #endif
1772         }
1773 }
1774
1775 /*
1776  * Emulate instructions that cause a transfer of control,
1777  * loads and stores, and a few other instructions.
1778  * Returns 1 if the step was emulated, 0 if not,
1779  * or -1 if the instruction is one that should not be stepped,
1780  * such as an rfid, or a mtmsrd that would clear MSR_RI.
1781  */
1782 int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
1783 {
1784         struct instruction_op op;
1785         int r, err, size;
1786         unsigned long val;
1787         unsigned int cr;
1788         int i, rd, nb;
1789
1790         r = analyse_instr(&op, regs, instr);
1791         if (r != 0)
1792                 return r;
1793
1794         err = 0;
1795         size = GETSIZE(op.type);
1796         switch (op.type & INSTR_TYPE_MASK) {
1797         case CACHEOP:
1798                 if (!address_ok(regs, op.ea, 8))
1799                         return 0;
1800                 switch (op.type & CACHEOP_MASK) {
1801                 case DCBST:
1802                         __cacheop_user_asmx(op.ea, err, "dcbst");
1803                         break;
1804                 case DCBF:
1805                         __cacheop_user_asmx(op.ea, err, "dcbf");
1806                         break;
1807                 case DCBTST:
1808                         if (op.reg == 0)
1809                                 prefetchw((void *) op.ea);
1810                         break;
1811                 case DCBT:
1812                         if (op.reg == 0)
1813                                 prefetch((void *) op.ea);
1814                         break;
1815                 case ICBI:
1816                         __cacheop_user_asmx(op.ea, err, "icbi");
1817                         break;
1818                 }
1819                 if (err)
1820                         return 0;
1821                 goto instr_done;
1822
1823         case LARX:
1824                 if (op.ea & (size - 1))
1825                         break;          /* can't handle misaligned */
1826                 err = -EFAULT;
1827                 if (!address_ok(regs, op.ea, size))
1828                         goto ldst_done;
1829                 err = 0;
1830                 switch (size) {
1831                 case 4:
1832                         __get_user_asmx(val, op.ea, err, "lwarx");
1833                         break;
1834                 case 8:
1835                         __get_user_asmx(val, op.ea, err, "ldarx");
1836                         break;
1837                 default:
1838                         return 0;
1839                 }
1840                 if (!err)
1841                         regs->gpr[op.reg] = val;
1842                 goto ldst_done;
1843
1844         case STCX:
1845                 if (op.ea & (size - 1))
1846                         break;          /* can't handle misaligned */
1847                 err = -EFAULT;
1848                 if (!address_ok(regs, op.ea, size))
1849                         goto ldst_done;
1850                 err = 0;
1851                 switch (size) {
1852                 case 4:
1853                         __put_user_asmx(op.val, op.ea, err, "stwcx.", cr);
1854                         break;
1855                 case 8:
1856                         __put_user_asmx(op.val, op.ea, err, "stdcx.", cr);
1857                         break;
1858                 default:
1859                         return 0;
1860                 }
1861                 if (!err)
1862                         regs->ccr = (regs->ccr & 0x0fffffff) |
1863                                 (cr & 0xe0000000) |
1864                                 ((regs->xer >> 3) & 0x10000000);
1865                 goto ldst_done;
1866
1867         case LOAD:
1868                 err = read_mem(&regs->gpr[op.reg], op.ea, size, regs);
1869                 if (!err) {
1870                         if (op.type & SIGNEXT)
1871                                 do_signext(&regs->gpr[op.reg], size);
1872                         if (op.type & BYTEREV)
1873                                 do_byterev(&regs->gpr[op.reg], size);
1874                 }
1875                 goto ldst_done;
1876
1877 #ifdef CONFIG_PPC_FPU
1878         case LOAD_FP:
1879                 if (size == 4)
1880                         err = do_fp_load(op.reg, do_lfs, op.ea, size, regs);
1881                 else
1882                         err = do_fp_load(op.reg, do_lfd, op.ea, size, regs);
1883                 goto ldst_done;
1884 #endif
1885 #ifdef CONFIG_ALTIVEC
1886         case LOAD_VMX:
1887                 err = do_vec_load(op.reg, do_lvx, op.ea & ~0xfUL, regs);
1888                 goto ldst_done;
1889 #endif
1890 #ifdef CONFIG_VSX
1891         case LOAD_VSX:
1892                 err = do_vsx_load(op.reg, do_lxvd2x, op.ea, regs);
1893                 goto ldst_done;
1894 #endif
1895         case LOAD_MULTI:
1896                 if (regs->msr & MSR_LE)
1897                         return 0;
1898                 rd = op.reg;
1899                 for (i = 0; i < size; i += 4) {
1900                         nb = size - i;
1901                         if (nb > 4)
1902                                 nb = 4;
1903                         err = read_mem(&regs->gpr[rd], op.ea, nb, regs);
1904                         if (err)
1905                                 return 0;
1906                         if (nb < 4)     /* left-justify last bytes */
1907                                 regs->gpr[rd] <<= 32 - 8 * nb;
1908                         op.ea += 4;
1909                         ++rd;
1910                 }
1911                 goto instr_done;
1912
1913         case STORE:
1914                 if ((op.type & UPDATE) && size == sizeof(long) &&
1915                     op.reg == 1 && op.update_reg == 1 &&
1916                     !(regs->msr & MSR_PR) &&
1917                     op.ea >= regs->gpr[1] - STACK_INT_FRAME_SIZE) {
1918                         err = handle_stack_update(op.ea, regs);
1919                         goto ldst_done;
1920                 }
1921                 err = write_mem(op.val, op.ea, size, regs);
1922                 goto ldst_done;
1923
1924 #ifdef CONFIG_PPC_FPU
1925         case STORE_FP:
1926                 if (size == 4)
1927                         err = do_fp_store(op.reg, do_stfs, op.ea, size, regs);
1928                 else
1929                         err = do_fp_store(op.reg, do_stfd, op.ea, size, regs);
1930                 goto ldst_done;
1931 #endif
1932 #ifdef CONFIG_ALTIVEC
1933         case STORE_VMX:
1934                 err = do_vec_store(op.reg, do_stvx, op.ea & ~0xfUL, regs);
1935                 goto ldst_done;
1936 #endif
1937 #ifdef CONFIG_VSX
1938         case STORE_VSX:
1939                 err = do_vsx_store(op.reg, do_stxvd2x, op.ea, regs);
1940                 goto ldst_done;
1941 #endif
1942         case STORE_MULTI:
1943                 if (regs->msr & MSR_LE)
1944                         return 0;
1945                 rd = op.reg;
1946                 for (i = 0; i < size; i += 4) {
1947                         val = regs->gpr[rd];
1948                         nb = size - i;
1949                         if (nb > 4)
1950                                 nb = 4;
1951                         else
1952                                 val >>= 32 - 8 * nb;
1953                         err = write_mem(val, op.ea, nb, regs);
1954                         if (err)
1955                                 return 0;
1956                         op.ea += 4;
1957                         ++rd;
1958                 }
1959                 goto instr_done;
1960
1961         case MFMSR:
1962                 regs->gpr[op.reg] = regs->msr & MSR_MASK;
1963                 goto instr_done;
1964
1965         case MTMSR:
1966                 val = regs->gpr[op.reg];
1967                 if ((val & MSR_RI) == 0)
1968                         /* can't step mtmsr[d] that would clear MSR_RI */
1969                         return -1;
1970                 /* here op.val is the mask of bits to change */
1971                 regs->msr = (regs->msr & ~op.val) | (val & op.val);
1972                 goto instr_done;
1973
1974 #ifdef CONFIG_PPC64
1975         case SYSCALL:   /* sc */
1976                 /*
1977                  * N.B. this uses knowledge about how the syscall
1978                  * entry code works.  If that is changed, this will
1979                  * need to be changed also.
1980                  */
1981                 if (regs->gpr[0] == 0x1ebe &&
1982                     cpu_has_feature(CPU_FTR_REAL_LE)) {
1983                         regs->msr ^= MSR_LE;
1984                         goto instr_done;
1985                 }
1986                 regs->gpr[9] = regs->gpr[13];
1987                 regs->gpr[10] = MSR_KERNEL;
1988                 regs->gpr[11] = regs->nip + 4;
1989                 regs->gpr[12] = regs->msr & MSR_MASK;
1990                 regs->gpr[13] = (unsigned long) get_paca();
1991                 regs->nip = (unsigned long) &system_call_common;
1992                 regs->msr = MSR_KERNEL;
1993                 return 1;
1994
1995         case RFI:
1996                 return -1;
1997 #endif
1998         }
1999         return 0;
2000
2001  ldst_done:
2002         if (err)
2003                 return 0;
2004         if (op.type & UPDATE)
2005                 regs->gpr[op.update_reg] = op.ea;
2006
2007  instr_done:
2008         regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
2009         return 1;
2010 }