arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/tm.h>
  40 #include <asm/setup.h>
  41 #include <asm/security_features.h>
  42
  43 #include "powernv.h"
  44
  45
  46 static bool fw_feature_is(const char *state, const char *name,
  47                           struct device_node *fw_features)
  48 {
  49         struct device_node *np;
  50         bool rc = false;
  51
  52         np = of_get_child_by_name(fw_features, name);
  53         if (np) {
  54                 rc = of_property_read_bool(np, state);
  55                 of_node_put(np);
  56         }
  57
  58         return rc;
  59 }
  60
  61 static void init_fw_feat_flags(struct device_node *np)
  62 {
  63         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  64                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  65
  66         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  67                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  71
  72         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  73                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  74
  75         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  76                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  79                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  80
  81         if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
  82                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
  83
  84         if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
  85                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
  86
  87         /*
  88          * The features below are enabled by default, so we instead look to see
  89          * if firmware has *disabled* them, and clear them if so.
  90          */
  91         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  92                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  93
  94         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  95                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  96
  97         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  98                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  99
 100         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
 101                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 102 }
 103
 104 static void pnv_setup_rfi_flush(void)
 105 {
 106         struct device_node *np, *fw_features;
 107         enum l1d_flush_type type;
 108         bool enable;
 109
 110         /* Default to fallback in case fw-features are not available */
 111         type = L1D_FLUSH_FALLBACK;
 112
 113         np = of_find_node_by_name(NULL, "ibm,opal");
 114         fw_features = of_get_child_by_name(np, "fw-features");
 115         of_node_put(np);
 116
 117         if (fw_features) {
 118                 init_fw_feat_flags(fw_features);
 119                 of_node_put(fw_features);
 120
 121                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 122                         type = L1D_FLUSH_MTTRIG;
 123
 124                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 125                         type = L1D_FLUSH_ORI;
 126         }
 127
 128         /*
 129          * If we are non-Power9 bare metal, we don't need to flush on kernel
 130          * entry or after user access: they fix a P9 specific vulnerability.
 131          */
 132         if (!pvr_version_is(PVR_POWER9)) {
 133                 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
 134                 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
 135         }
 136
 137         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 138                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 139                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 140
 141         setup_rfi_flush(type, enable);
 142         setup_count_cache_flush();
 143
 144         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 145                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
 146         setup_entry_flush(enable);
 147
 148         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 149                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
 150         setup_uaccess_flush(enable);
 151 }
 152
 153 static void __init pnv_setup_arch(void)
 154 {
 155         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 156
 157         pnv_setup_rfi_flush();
 158         setup_stf_barrier();
 159
 160         /* Initialize SMP */
 161         pnv_smp_init();
 162
 163         /* Setup PCI */
 164         pnv_pci_init();
 165
 166         /* Setup RTC and NVRAM callbacks */
 167         if (firmware_has_feature(FW_FEATURE_OPAL))
 168                 opal_nvram_init();
 169
 170         /* Enable NAP mode */
 171         powersave_nap = 1;
 172
 173         /* XXX PMCS */
 174
 175         pnv_rng_init();
 176 }
 177
 178 static void __init pnv_init(void)
 179 {
 180         /*
 181          * Initialize the LPC bus now so that legacy serial
 182          * ports can be found on it
 183          */
 184         opal_lpc_init();
 185
 186 #ifdef CONFIG_HVC_OPAL
 187         if (firmware_has_feature(FW_FEATURE_OPAL))
 188                 hvc_opal_init_early();
 189         else
 190 #endif
 191                 add_preferred_console("hvc", 0, NULL);
 192 }
 193
 194 static void __init pnv_init_IRQ(void)
 195 {
 196         /* Try using a XIVE if available, otherwise use a XICS */
 197         if (!xive_native_init())
 198                 xics_init();
 199
 200         WARN_ON(!ppc_md.get_irq);
 201 }
 202
 203 static void pnv_show_cpuinfo(struct seq_file *m)
 204 {
 205         struct device_node *root;
 206         const char *model = "";
 207
 208         root = of_find_node_by_path("/");
 209         if (root)
 210                 model = of_get_property(root, "model", NULL);
 211         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 212         if (firmware_has_feature(FW_FEATURE_OPAL))
 213                 seq_printf(m, "firmware\t: OPAL\n");
 214         else
 215                 seq_printf(m, "firmware\t: BML\n");
 216         of_node_put(root);
 217         if (radix_enabled())
 218                 seq_printf(m, "MMU\t\t: Radix\n");
 219         else
 220                 seq_printf(m, "MMU\t\t: Hash\n");
 221 }
 222
 223 static void pnv_prepare_going_down(void)
 224 {
 225         /*
 226          * Disable all notifiers from OPAL, we can't
 227          * service interrupts anymore anyway
 228          */
 229         opal_event_shutdown();
 230
 231         /* Print flash update message if one is scheduled. */
 232         opal_flash_update_print_message();
 233
 234         smp_send_stop();
 235
 236         hard_irq_disable();
 237 }
 238
 239 static void  __noreturn pnv_restart(char *cmd)
 240 {
 241         long rc = OPAL_BUSY;
 242
 243         pnv_prepare_going_down();
 244
 245         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 246                 rc = opal_cec_reboot();
 247                 if (rc == OPAL_BUSY_EVENT)
 248                         opal_poll_events(NULL);
 249                 else
 250                         mdelay(10);
 251         }
 252         for (;;)
 253                 opal_poll_events(NULL);
 254 }
 255
 256 static void __noreturn pnv_power_off(void)
 257 {
 258         long rc = OPAL_BUSY;
 259
 260         pnv_prepare_going_down();
 261
 262         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 263                 rc = opal_cec_power_down(0);
 264                 if (rc == OPAL_BUSY_EVENT)
 265                         opal_poll_events(NULL);
 266                 else
 267                         mdelay(10);
 268         }
 269         for (;;)
 270                 opal_poll_events(NULL);
 271 }
 272
 273 static void __noreturn pnv_halt(void)
 274 {
 275         pnv_power_off();
 276 }
 277
 278 static void pnv_progress(char *s, unsigned short hex)
 279 {
 280 }
 281
 282 static void pnv_shutdown(void)
 283 {
 284         /* Let the PCI code clear up IODA tables */
 285         pnv_pci_shutdown();
 286
 287         /*
 288          * Stop OPAL activity: Unregister all OPAL interrupts so they
 289          * don't fire up while we kexec and make sure all potentially
 290          * DMA'ing ops are complete (such as dump retrieval).
 291          */
 292         opal_shutdown();
 293 }
 294
 295 #ifdef CONFIG_KEXEC_CORE
 296 static void pnv_kexec_wait_secondaries_down(void)
 297 {
 298         int my_cpu, i, notified = -1;
 299
 300         my_cpu = get_cpu();
 301
 302         for_each_online_cpu(i) {
 303                 uint8_t status;
 304                 int64_t rc, timeout = 1000;
 305
 306                 if (i == my_cpu)
 307                         continue;
 308
 309                 for (;;) {
 310                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 311                                                    &status);
 312                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 313                                 break;
 314                         barrier();
 315                         if (i != notified) {
 316                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 317                                        "(physical %d) to enter OPAL\n",
 318                                        i, paca_ptrs[i]->hw_cpu_id);
 319                                 notified = i;
 320                         }
 321
 322                         /*
 323                          * On crash secondaries might be unreachable or hung,
 324                          * so timeout if we've waited too long
 325                          * */
 326                         mdelay(1);
 327                         if (timeout-- == 0) {
 328                                 printk(KERN_ERR "kexec: timed out waiting for "
 329                                        "cpu %d (physical %d) to enter OPAL\n",
 330                                        i, paca_ptrs[i]->hw_cpu_id);
 331                                 break;
 332                         }
 333                 }
 334         }
 335 }
 336
 337 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 338 {
 339         u64 reinit_flags;
 340
 341         if (xive_enabled())
 342                 xive_teardown_cpu();
 343         else
 344                 xics_kexec_teardown_cpu(secondary);
 345
 346         /* On OPAL, we return all CPUs to firmware */
 347         if (!firmware_has_feature(FW_FEATURE_OPAL))
 348                 return;
 349
 350         if (secondary) {
 351                 /* Return secondary CPUs to firmware on OPAL v3 */
 352                 mb();
 353                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 354                 mb();
 355
 356                 /* Return the CPU to OPAL */
 357                 opal_return_cpu();
 358         } else {
 359                 /* Primary waits for the secondaries to have reached OPAL */
 360                 pnv_kexec_wait_secondaries_down();
 361
 362                 /* Switch XIVE back to emulation mode */
 363                 if (xive_enabled())
 364                         xive_shutdown();
 365
 366                 /*
 367                  * We might be running as little-endian - now that interrupts
 368                  * are disabled, reset the HILE bit to big-endian so we don't
 369                  * take interrupts in the wrong endian later
 370                  *
 371                  * We reinit to enable both radix and hash on P9 to ensure
 372                  * the mode used by the next kernel is always supported.
 373                  */
 374                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 375                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 376                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 377                                 OPAL_REINIT_CPUS_MMU_HASH;
 378                 opal_reinit_cpus(reinit_flags);
 379         }
 380 }
 381 #endif /* CONFIG_KEXEC_CORE */
 382
 383 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 384 static unsigned long pnv_memory_block_size(void)
 385 {
 386         return 256UL * 1024 * 1024;
 387 }
 388 #endif
 389
 390 static void __init pnv_setup_machdep_opal(void)
 391 {
 392         ppc_md.get_boot_time = opal_get_boot_time;
 393         ppc_md.restart = pnv_restart;
 394         pm_power_off = pnv_power_off;
 395         ppc_md.halt = pnv_halt;
 396         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 397         ppc_md.machine_check_exception = opal_machine_check;
 398         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 399         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 400         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 401 }
 402
 403 static int __init pnv_probe(void)
 404 {
 405         if (!of_machine_is_compatible("ibm,powernv"))
 406                 return 0;
 407
 408         if (firmware_has_feature(FW_FEATURE_OPAL))
 409                 pnv_setup_machdep_opal();
 410
 411         pr_debug("PowerNV detected !\n");
 412
 413         pnv_init();
 414
 415         return 1;
 416 }
 417
 418 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 419 void __init pnv_tm_init(void)
 420 {
 421         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 422             !pvr_version_is(PVR_POWER9) ||
 423             early_cpu_has_feature(CPU_FTR_TM))
 424                 return;
 425
 426         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 427                 return;
 428
 429         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 430         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 431         /* Make sure "normal" HTM is off (it should be) */
 432         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 433         /* Turn on no suspend mode, and HTM no SC */
 434         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 435                                             PPC_FEATURE2_HTM_NOSC;
 436         tm_suspend_disabled = true;
 437 }
 438 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 439
 440 /*
 441  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 442  * /proc/cpuinfo
 443  */
 444 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 445 {
 446         unsigned long ret_freq;
 447
 448         ret_freq = cpufreq_get(cpu) * 1000ul;
 449
 450         /*
 451          * If the backend cpufreq driver does not exist,
 452          * then fallback to old way of reporting the clockrate.
 453          */
 454         if (!ret_freq)
 455                 ret_freq = ppc_proc_freq;
 456         return ret_freq;
 457 }
 458
 459 define_machine(powernv) {
 460         .name                   = "PowerNV",
 461         .probe                  = pnv_probe,
 462         .setup_arch             = pnv_setup_arch,
 463         .init_IRQ               = pnv_init_IRQ,
 464         .show_cpuinfo           = pnv_show_cpuinfo,
 465         .get_proc_freq          = pnv_get_proc_freq,
 466         .progress               = pnv_progress,
 467         .machine_shutdown       = pnv_shutdown,
 468         .power_save             = NULL,
 469         .calibrate_decr         = generic_calibrate_decr,
 470 #ifdef CONFIG_KEXEC_CORE
 471         .kexec_cpu_down         = pnv_kexec_cpu_down,
 472 #endif
 473 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 474         .memory_block_size      = pnv_memory_block_size,
 475 #endif
 476 };