3 * Copyright IBM Corp. 1999
4 * Author(s): Hartmut Penner (hp@de.ibm.com),
5 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Derived from "include/asm-i386/processor.h"
8 * Copyright (C) 1994, Linus Torvalds
11 #ifndef __ASM_S390_PROCESSOR_H
12 #define __ASM_S390_PROCESSOR_H
14 #include <linux/const.h>
16 #define CIF_MCCK_PENDING 0 /* machine check handling is pending */
17 #define CIF_ASCE 1 /* user asce needs fixup / uaccess */
18 #define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
19 #define CIF_FPU 3 /* restore FPU registers */
20 #define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
22 #define _CIF_MCCK_PENDING _BITUL(CIF_MCCK_PENDING)
23 #define _CIF_ASCE _BITUL(CIF_ASCE)
24 #define _CIF_NOHZ_DELAY _BITUL(CIF_NOHZ_DELAY)
25 #define _CIF_FPU _BITUL(CIF_FPU)
26 #define _CIF_IGNORE_IRQ _BITUL(CIF_IGNORE_IRQ)
30 #include <linux/linkage.h>
31 #include <linux/irqflags.h>
34 #include <asm/ptrace.h>
35 #include <asm/setup.h>
36 #include <asm/runtime_instr.h>
37 #include <asm/fpu/types.h>
38 #include <asm/fpu/internal.h>
40 static inline void set_cpu_flag(int flag)
42 S390_lowcore.cpu_flags |= (1UL << flag);
45 static inline void clear_cpu_flag(int flag)
47 S390_lowcore.cpu_flags &= ~(1UL << flag);
50 static inline int test_cpu_flag(int flag)
52 return !!(S390_lowcore.cpu_flags & (1UL << flag));
55 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
58 * Default implementation of macro that returns current
59 * instruction pointer ("program counter").
61 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
63 static inline void get_cpu_id(struct cpuid *ptr)
65 asm volatile("stidp %0" : "=Q" (*ptr));
68 extern void s390_adjust_jiffies(void);
69 extern const struct seq_operations cpuinfo_op;
70 extern int sysctl_ieee_emulation_warnings;
71 extern void execve_tail(void);
72 extern void __bpon(void);
75 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
78 #define TASK_SIZE_OF(tsk) ((tsk)->mm ? \
79 (tsk)->mm->context.asce_limit : TASK_MAX_SIZE)
80 #define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
81 (1UL << 30) : (1UL << 41))
82 #define TASK_SIZE TASK_SIZE_OF(current)
83 #define TASK_MAX_SIZE (1UL << 53)
85 #define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
86 #define STACK_TOP_MAX (1UL << 42)
88 #define HAVE_ARCH_PICK_MMAP_LAYOUT
97 struct thread_struct {
98 struct fpu fpu; /* FP and VX register save area */
99 unsigned int acrs[NUM_ACRS];
100 unsigned long ksp; /* kernel stack pointer */
101 mm_segment_t mm_segment;
102 unsigned long gmap_addr; /* address of last gmap fault. */
103 unsigned int gmap_pfault; /* signal of a pending guest pfault */
104 struct per_regs per_user; /* User specified PER registers */
105 struct per_event per_event; /* Cause of the last PER trap */
106 unsigned long per_flags; /* Flags to control debug behavior */
107 /* pfault_wait is used to block the process on a pfault event */
108 unsigned long pfault_wait;
109 struct list_head list;
110 /* cpu runtime instrumentation */
111 struct runtime_instr_cb *ri_cb;
112 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
115 /* Flag to disable transactions. */
116 #define PER_FLAG_NO_TE 1UL
117 /* Flag to enable random transaction aborts. */
118 #define PER_FLAG_TE_ABORT_RAND 2UL
119 /* Flag to specify random transaction abort mode:
120 * - abort each transaction at a random instruction before TEND if set.
121 * - abort random transactions at a random instruction if cleared.
123 #define PER_FLAG_TE_ABORT_RAND_TEND 4UL
125 typedef struct thread_struct thread_struct;
128 * Stack layout of a C stack frame.
132 unsigned long back_chain;
133 unsigned long empty1[5];
134 unsigned long gprs[10];
135 unsigned int empty2[8];
139 unsigned long empty1[5];
140 unsigned int empty2[8];
141 unsigned long gprs[10];
142 unsigned long back_chain;
146 #define ARCH_MIN_TASKALIGN 8
148 extern __vector128 init_task_fpu_regs[__NUM_VXRS];
149 #define INIT_THREAD { \
150 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
151 .fpu.regs = (void *)&init_task_fpu_regs, \
155 * Do necessary setup to start up a new thread.
157 #define start_thread(regs, new_psw, new_stackp) do { \
158 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
159 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
160 regs->gprs[15] = new_stackp; \
164 #define start_thread31(regs, new_psw, new_stackp) do { \
165 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
166 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
167 regs->gprs[15] = new_stackp; \
168 crst_table_downgrade(current->mm); \
172 /* Forward declaration, a strange C thing */
177 void show_cacheinfo(struct seq_file *m);
179 /* Free all resources held by a thread. */
180 extern void release_thread(struct task_struct *);
183 * Return saved PC of a blocked thread.
185 extern unsigned long thread_saved_pc(struct task_struct *t);
187 unsigned long get_wchan(struct task_struct *p);
188 #define task_pt_regs(tsk) ((struct pt_regs *) \
189 (task_stack_page(tsk) + THREAD_SIZE) - 1)
190 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
191 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
193 /* Has task runtime instrumentation enabled ? */
194 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
196 static inline unsigned short stap(void)
198 unsigned short cpu_address;
200 asm volatile("stap %0" : "=m" (cpu_address));
205 * Give up the time slice of the virtual PU.
207 void cpu_relax(void);
209 #define cpu_relax_lowlatency() barrier()
211 static inline void psw_set_key(unsigned int key)
213 asm volatile("spka 0(%0)" : : "d" (key));
217 * Set PSW to specified value.
219 static inline void __load_psw(psw_t psw)
221 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
225 * Set PSW mask to specified value, while leaving the
226 * PSW addr pointing to the next instruction.
228 static inline void __load_psw_mask(unsigned long mask)
237 " stg %0,%O1+8(%R1)\n"
240 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
244 * Extract current PSW mask
246 static inline unsigned long __extract_psw(void)
248 unsigned int reg1, reg2;
250 asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
251 return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
254 static inline void local_mcck_enable(void)
256 __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
259 static inline void local_mcck_disable(void)
261 __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
265 * Rewind PSW instruction address by specified number of bytes.
267 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
271 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
272 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
274 return (psw.addr - ilc) & mask;
278 * Function to stop a processor until the next interrupt occurs
280 void enabled_wait(void);
283 * Function to drop a processor into disabled wait state
285 static inline void __noreturn disabled_wait(unsigned long code)
289 psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
296 * Basic Machine Check/Program Check Handler.
299 extern void s390_base_mcck_handler(void);
300 extern void s390_base_pgm_handler(void);
301 extern void s390_base_ext_handler(void);
303 extern void (*s390_base_mcck_handler_fn)(void);
304 extern void (*s390_base_pgm_handler_fn)(void);
305 extern void (*s390_base_ext_handler_fn)(void);
307 #define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
309 extern int memcpy_real(void *, void *, size_t);
310 extern void memcpy_absolute(void *, void *, size_t);
312 #define mem_assign_absolute(dest, val) { \
313 __typeof__(dest) __tmp = (val); \
315 BUILD_BUG_ON(sizeof(__tmp) != sizeof(val)); \
316 memcpy_absolute(&(dest), &__tmp, sizeof(__tmp)); \
319 extern int s390_isolate_bp(void);
320 extern int s390_isolate_bp_guest(void);
322 #endif /* __ASSEMBLY__ */
324 #endif /* __ASM_S390_PROCESSOR_H */