2 * Copyright IBM Corp 2000, 2011
3 * Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
7 #include <linux/linkage.h>
8 #include <asm/asm-offsets.h>
9 #include <asm/nospec-insn.h>
17 # Prerequisites to run this function:
18 # - Prefix register is set to zero
19 # - Original prefix register is stored in "dump_prefix_page"
20 # - Lowcore protection is off
23 /* Save register one and load save area base */
24 stg %r1,__LC_SAVE_AREA_RESTART
25 lghi %r1,SAVE_AREA_BASE
26 /* General purpose registers */
27 stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
28 lg %r2,__LC_SAVE_AREA_RESTART
29 stg %r2,__LC_GPREGS_SAVE_AREA-SAVE_AREA_BASE+8(%r1)
30 /* Control registers */
31 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
32 /* Access registers */
33 stam %a0,%a15,__LC_AREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
34 /* Floating point registers */
35 std %f0, 0x00 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
36 std %f1, 0x08 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
37 std %f2, 0x10 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
38 std %f3, 0x18 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
39 std %f4, 0x20 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
40 std %f5, 0x28 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
41 std %f6, 0x30 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
42 std %f7, 0x38 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
43 std %f8, 0x40 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
44 std %f9, 0x48 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
45 std %f10,0x50 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
46 std %f11,0x58 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
47 std %f12,0x60 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
48 std %f13,0x68 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
49 std %f14,0x70 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
50 std %f15,0x78 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
51 /* Floating point control register */
52 stfpc __LC_FP_CREG_SAVE_AREA-SAVE_AREA_BASE(%r1)
54 stpt __LC_CPU_TIMER_SAVE_AREA-SAVE_AREA_BASE(%r1)
55 /* Saved prefix register */
56 larl %r2,dump_prefix_page
57 mvc __LC_PREFIX_SAVE_AREA-SAVE_AREA_BASE(4,%r1),0(%r2)
58 /* Clock comparator - seven bytes */
61 mvc __LC_CLOCK_COMP_SAVE_AREA-SAVE_AREA_BASE + 1(7,%r1),1(%r2)
62 /* Program status word */
64 st %r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 0(%r1)
65 st %r3,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 4(%r1)
67 stg %r2,__LC_PSW_SAVE_AREA-SAVE_AREA_BASE + 8(%r1)
72 .Lclkcmp: .quad 0x0000000000000000
77 # Parameter: r2 = schid of reipl device
82 .Lpg0: lpswe .Lnewpsw-.Lpg0(%r13)
83 .Lpg1: brasl %r14,store_status
85 lctlg %c6,%c6,.Lall-.Lpg0(%r13)
87 mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
88 stsch .Lschib-.Lpg0(%r13)
89 oi .Lschib+5-.Lpg0(%r13),0x84
90 .Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
91 msch .Lschib-.Lpg0(%r13)
93 .Lssch: ssch .Liplorb-.Lpg0(%r13)
96 bas %r14,.Ldisab-.Lpg0(%r13)
97 .L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
98 .Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13)
99 .Lcont: c %r1,__LC_SUBCHANNEL_ID
101 clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
103 tsch .Liplirb-.Lpg0(%r13)
104 tm .Liplirb+9-.Lpg0(%r13),0xbf
106 bas %r14,.Ldisab-.Lpg0(%r13)
107 .L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
109 bas %r14,.Ldisab-.Lpg0(%r13)
110 .L003: st %r1,__LC_SUBCHANNEL_ID
111 lhi %r1,0 # mode 0 = esa
112 slr %r0,%r0 # set cpuid to zero
113 sigp %r1,%r0,SIGP_SET_ARCHITECTURE # switch to esa mode
116 srl %r14,1 # need to kill hi bit to avoid specification exceptions.
117 st %r14,.Ldispsw+12-.Lpg0(%r13)
118 lpswe .Ldispsw-.Lpg0(%r13)
120 .Lall: .quad 0x00000000ff000000
123 * These addresses have to be 31 bit otherwise
124 * the sigp will throw a specifcation exception
125 * when switching to ESA mode as bit 31 be set
127 * Bit 31 of the addresses has to be 0 for the
128 * 31bit lpswe instruction a fact they appear to have
129 * omitted from the pop.
131 .Lnewpsw: .quad 0x0000000080000000
133 .Lpcnew: .quad 0x0000000080000000
135 .Lionew: .quad 0x0000000080000000
137 .Lwaitpsw: .quad 0x0202000080000000
139 .Ldispsw: .quad 0x0002000080000000
140 .quad 0x0000000000000000
141 .Liplccws: .long 0x02000000,0x60000018
142 .long 0x08000008,0x20000001
143 .Liplorb: .long 0x0049504c,0x0040ff80
144 .long 0x00000000+.Liplccws
145 .Lschib: .long 0x00000000,0x00000000
146 .long 0x00000000,0x00000000
147 .long 0x00000000,0x00000000
148 .long 0x00000000,0x00000000
149 .long 0x00000000,0x00000000
150 .long 0x00000000,0x00000000
151 .Liplirb: .long 0x00000000,0x00000000
152 .long 0x00000000,0x00000000
153 .long 0x00000000,0x00000000
154 .long 0x00000000,0x00000000
155 .long 0x00000000,0x00000000
156 .long 0x00000000,0x00000000
157 .long 0x00000000,0x00000000
158 .long 0x00000000,0x00000000