arch/sh/kernel/cpu/sh3/setup-sh770x.c

   1 /*
   2  * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
   3  *
   4  *  Copyright (C) 2007  Magnus Damm
   5  *  Copyright (C) 2009  Paul Mundt
   6  *
   7  * Based on setup-sh7709.c
   8  *
   9  *  Copyright (C) 2006  Paul Mundt
  10  *
  11  * This file is subject to the terms and conditions of the GNU General Public
  12  * License.  See the file "COPYING" in the main directory of this archive
  13  * for more details.
  14  */
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <linux/irq.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/serial.h>
  20 #include <linux/serial_sci.h>
  21 #include <linux/sh_timer.h>
  22 #include <linux/sh_intc.h>
  23 #include <cpu/serial.h>
  24
  25 enum {
  26         UNUSED = 0,
  27
  28         /* interrupt sources */
  29         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
  30         PINT07, PINT815,
  31         DMAC, SCIF0, SCIF2, SCI, ADC_ADI,
  32         LCDC, PCC0, PCC1,
  33         TMU0, TMU1, TMU2,
  34         RTC, WDT, REF,
  35 };
  36
  37 static struct intc_vect vectors[] __initdata = {
  38         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
  39         INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
  40         INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
  41         INTC_VECT(RTC, 0x4c0),
  42         INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
  43         INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
  44         INTC_VECT(WDT, 0x560),
  45         INTC_VECT(REF, 0x580),
  46         INTC_VECT(REF, 0x5a0),
  47 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
  48     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  49     defined(CONFIG_CPU_SUBTYPE_SH7709)
  50         /* IRQ0->5 are handled in setup-sh3.c */
  51         INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
  52         INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
  53         INTC_VECT(ADC_ADI, 0x980),
  54         INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
  55         INTC_VECT(SCIF2, 0x940), INTC_VECT(SCIF2, 0x960),
  56 #endif
  57 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  58     defined(CONFIG_CPU_SUBTYPE_SH7709)
  59         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
  60         INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
  61         INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
  62 #endif
  63 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
  64         INTC_VECT(LCDC, 0x9a0),
  65         INTC_VECT(PCC0, 0x9c0), INTC_VECT(PCC1, 0x9e0),
  66 #endif
  67 };
  68
  69 static struct intc_prio_reg prio_registers[] __initdata = {
  70         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
  71         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
  72 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
  73     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  74     defined(CONFIG_CPU_SUBTYPE_SH7709)
  75         { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
  76         { 0xa4000018, 0, 16, 4, /* IPRD */ { 0, 0, IRQ5, IRQ4 } },
  77         { 0xa400001a, 0, 16, 4, /* IPRE */ { DMAC, 0, SCIF2, ADC_ADI } },
  78 #endif
  79 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
  80     defined(CONFIG_CPU_SUBTYPE_SH7709)
  81         { 0xa4000018, 0, 16, 4, /* IPRD */ { PINT07, PINT815, } },
  82         { 0xa400001a, 0, 16, 4, /* IPRE */ { 0, SCIF0 } },
  83 #endif
  84 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
  85         { 0xa400001c, 0, 16, 4, /* IPRF */ { 0, LCDC, PCC0, PCC1, } },
  86 #endif
  87 };
  88
  89 static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, NULL,
  90                          NULL, prio_registers, NULL);
  91
  92 static struct resource rtc_resources[] = {
  93         [0] =   {
  94                 .start  = 0xfffffec0,
  95                 .end    = 0xfffffec0 + 0x1e,
  96                 .flags  = IORESOURCE_IO,
  97         },
  98         [1] =   {
  99                 .start  = evt2irq(0x480),
 100                 .flags  = IORESOURCE_IRQ,
 101         },
 102 };
 103
 104 static struct platform_device rtc_device = {
 105         .name           = "sh-rtc",
 106         .id             = -1,
 107         .num_resources  = ARRAY_SIZE(rtc_resources),
 108         .resource       = rtc_resources,
 109 };
 110
 111 static struct plat_sci_port scif0_platform_data = {
 112         .type           = PORT_SCI,
 113         .ops            = &sh770x_sci_port_ops,
 114 };
 115
 116 static struct resource scif0_resources[] = {
 117         DEFINE_RES_MEM(0xfffffe80, 0x10),
 118         DEFINE_RES_IRQ(evt2irq(0x4e0)),
 119 };
 120
 121 static struct platform_device scif0_device = {
 122         .name           = "sh-sci",
 123         .id             = 0,
 124         .resource       = scif0_resources,
 125         .num_resources  = ARRAY_SIZE(scif0_resources),
 126         .dev            = {
 127                 .platform_data  = &scif0_platform_data,
 128         },
 129 };
 130 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 131     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 132     defined(CONFIG_CPU_SUBTYPE_SH7709)
 133 static struct plat_sci_port scif1_platform_data = {
 134         .type           = PORT_SCIF,
 135         .ops            = &sh770x_sci_port_ops,
 136         .regtype        = SCIx_SH3_SCIF_REGTYPE,
 137 };
 138
 139 static struct resource scif1_resources[] = {
 140         DEFINE_RES_MEM(0xa4000150, 0x10),
 141         DEFINE_RES_IRQ(evt2irq(0x900)),
 142 };
 143
 144 static struct platform_device scif1_device = {
 145         .name           = "sh-sci",
 146         .id             = 1,
 147         .resource       = scif1_resources,
 148         .num_resources  = ARRAY_SIZE(scif1_resources),
 149         .dev            = {
 150                 .platform_data  = &scif1_platform_data,
 151         },
 152 };
 153 #endif
 154 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 155     defined(CONFIG_CPU_SUBTYPE_SH7709)
 156 static struct plat_sci_port scif2_platform_data = {
 157         .type           = PORT_IRDA,
 158         .ops            = &sh770x_sci_port_ops,
 159 };
 160
 161 static struct resource scif2_resources[] = {
 162         DEFINE_RES_MEM(0xa4000140, 0x10),
 163         DEFINE_RES_IRQ(evt2irq(0x880)),
 164 };
 165
 166 static struct platform_device scif2_device = {
 167         .name           = "sh-sci",
 168         .id             = 2,
 169         .resource       = scif2_resources,
 170         .num_resources  = ARRAY_SIZE(scif2_resources),
 171         .dev            = {
 172                 .platform_data  = &scif2_platform_data,
 173         },
 174 };
 175 #endif
 176
 177 static struct sh_timer_config tmu0_platform_data = {
 178         .channels_mask = 7,
 179 };
 180
 181 static struct resource tmu0_resources[] = {
 182         DEFINE_RES_MEM(0xfffffe90, 0x2c),
 183         DEFINE_RES_IRQ(evt2irq(0x400)),
 184         DEFINE_RES_IRQ(evt2irq(0x420)),
 185         DEFINE_RES_IRQ(evt2irq(0x440)),
 186 };
 187
 188 static struct platform_device tmu0_device = {
 189         .name           = "sh-tmu-sh3",
 190         .id             = 0,
 191         .dev = {
 192                 .platform_data  = &tmu0_platform_data,
 193         },
 194         .resource       = tmu0_resources,
 195         .num_resources  = ARRAY_SIZE(tmu0_resources),
 196 };
 197
 198 static struct platform_device *sh770x_devices[] __initdata = {
 199         &scif0_device,
 200 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 201     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 202     defined(CONFIG_CPU_SUBTYPE_SH7709)
 203         &scif1_device,
 204 #endif
 205 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 206     defined(CONFIG_CPU_SUBTYPE_SH7709)
 207         &scif2_device,
 208 #endif
 209         &tmu0_device,
 210         &rtc_device,
 211 };
 212
 213 static int __init sh770x_devices_setup(void)
 214 {
 215         return platform_add_devices(sh770x_devices,
 216                 ARRAY_SIZE(sh770x_devices));
 217 }
 218 arch_initcall(sh770x_devices_setup);
 219
 220 static struct platform_device *sh770x_early_devices[] __initdata = {
 221         &scif0_device,
 222 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 223     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 224     defined(CONFIG_CPU_SUBTYPE_SH7709)
 225         &scif1_device,
 226 #endif
 227 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 228     defined(CONFIG_CPU_SUBTYPE_SH7709)
 229         &scif2_device,
 230 #endif
 231         &tmu0_device,
 232 };
 233
 234 void __init plat_early_device_setup(void)
 235 {
 236         early_platform_add_devices(sh770x_early_devices,
 237                                    ARRAY_SIZE(sh770x_early_devices));
 238 }
 239
 240 void __init plat_irq_setup(void)
 241 {
 242         register_intc_controller(&intc_desc);
 243 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
 244     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
 245     defined(CONFIG_CPU_SUBTYPE_SH7709)
 246         plat_irq_setup_sh3();
 247 #endif
 248 }