GNU Linux-libre 4.19.286-gnu1
[releases.git] / arch / sh / kernel / hw_breakpoint.c
1 /*
2  * arch/sh/kernel/hw_breakpoint.c
3  *
4  * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
5  *
6  * Copyright (C) 2009 - 2010  Paul Mundt
7  *
8  * This file is subject to the terms and conditions of the GNU General Public
9  * License.  See the file "COPYING" in the main directory of this archive
10  * for more details.
11  */
12 #include <linux/init.h>
13 #include <linux/perf_event.h>
14 #include <linux/sched/signal.h>
15 #include <linux/hw_breakpoint.h>
16 #include <linux/percpu.h>
17 #include <linux/kallsyms.h>
18 #include <linux/notifier.h>
19 #include <linux/kprobes.h>
20 #include <linux/kdebug.h>
21 #include <linux/io.h>
22 #include <linux/clk.h>
23 #include <asm/hw_breakpoint.h>
24 #include <asm/mmu_context.h>
25 #include <asm/ptrace.h>
26 #include <asm/traps.h>
27
28 /*
29  * Stores the breakpoints currently in use on each breakpoint address
30  * register for each cpus
31  */
32 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
33
34 /*
35  * A dummy placeholder for early accesses until the CPUs get a chance to
36  * register their UBCs later in the boot process.
37  */
38 static struct sh_ubc ubc_dummy = { .num_events = 0 };
39
40 static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
41
42 /*
43  * Install a perf counter breakpoint.
44  *
45  * We seek a free UBC channel and use it for this breakpoint.
46  *
47  * Atomic: we hold the counter->ctx->lock and we only handle variables
48  * and registers local to this cpu.
49  */
50 int arch_install_hw_breakpoint(struct perf_event *bp)
51 {
52         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
53         int i;
54
55         for (i = 0; i < sh_ubc->num_events; i++) {
56                 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
57
58                 if (!*slot) {
59                         *slot = bp;
60                         break;
61                 }
62         }
63
64         if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
65                 return -EBUSY;
66
67         clk_enable(sh_ubc->clk);
68         sh_ubc->enable(info, i);
69
70         return 0;
71 }
72
73 /*
74  * Uninstall the breakpoint contained in the given counter.
75  *
76  * First we search the debug address register it uses and then we disable
77  * it.
78  *
79  * Atomic: we hold the counter->ctx->lock and we only handle variables
80  * and registers local to this cpu.
81  */
82 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
83 {
84         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
85         int i;
86
87         for (i = 0; i < sh_ubc->num_events; i++) {
88                 struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
89
90                 if (*slot == bp) {
91                         *slot = NULL;
92                         break;
93                 }
94         }
95
96         if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
97                 return;
98
99         sh_ubc->disable(info, i);
100         clk_disable(sh_ubc->clk);
101 }
102
103 static int get_hbp_len(u16 hbp_len)
104 {
105         unsigned int len_in_bytes = 0;
106
107         switch (hbp_len) {
108         case SH_BREAKPOINT_LEN_1:
109                 len_in_bytes = 1;
110                 break;
111         case SH_BREAKPOINT_LEN_2:
112                 len_in_bytes = 2;
113                 break;
114         case SH_BREAKPOINT_LEN_4:
115                 len_in_bytes = 4;
116                 break;
117         case SH_BREAKPOINT_LEN_8:
118                 len_in_bytes = 8;
119                 break;
120         }
121         return len_in_bytes;
122 }
123
124 /*
125  * Check for virtual address in kernel space.
126  */
127 int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint *hw)
128 {
129         unsigned int len;
130         unsigned long va;
131
132         va = hw->address;
133         len = get_hbp_len(hw->len);
134
135         return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
136 }
137
138 int arch_bp_generic_fields(int sh_len, int sh_type,
139                            int *gen_len, int *gen_type)
140 {
141         /* Len */
142         switch (sh_len) {
143         case SH_BREAKPOINT_LEN_1:
144                 *gen_len = HW_BREAKPOINT_LEN_1;
145                 break;
146         case SH_BREAKPOINT_LEN_2:
147                 *gen_len = HW_BREAKPOINT_LEN_2;
148                 break;
149         case SH_BREAKPOINT_LEN_4:
150                 *gen_len = HW_BREAKPOINT_LEN_4;
151                 break;
152         case SH_BREAKPOINT_LEN_8:
153                 *gen_len = HW_BREAKPOINT_LEN_8;
154                 break;
155         default:
156                 return -EINVAL;
157         }
158
159         /* Type */
160         switch (sh_type) {
161         case SH_BREAKPOINT_READ:
162                 *gen_type = HW_BREAKPOINT_R;
163                 break;
164         case SH_BREAKPOINT_WRITE:
165                 *gen_type = HW_BREAKPOINT_W;
166                 break;
167         case SH_BREAKPOINT_RW:
168                 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
169                 break;
170         default:
171                 return -EINVAL;
172         }
173
174         return 0;
175 }
176
177 static int arch_build_bp_info(struct perf_event *bp,
178                               const struct perf_event_attr *attr,
179                               struct arch_hw_breakpoint *hw)
180 {
181         hw->address = attr->bp_addr;
182
183         /* Len */
184         switch (attr->bp_len) {
185         case HW_BREAKPOINT_LEN_1:
186                 hw->len = SH_BREAKPOINT_LEN_1;
187                 break;
188         case HW_BREAKPOINT_LEN_2:
189                 hw->len = SH_BREAKPOINT_LEN_2;
190                 break;
191         case HW_BREAKPOINT_LEN_4:
192                 hw->len = SH_BREAKPOINT_LEN_4;
193                 break;
194         case HW_BREAKPOINT_LEN_8:
195                 hw->len = SH_BREAKPOINT_LEN_8;
196                 break;
197         default:
198                 return -EINVAL;
199         }
200
201         /* Type */
202         switch (attr->bp_type) {
203         case HW_BREAKPOINT_R:
204                 hw->type = SH_BREAKPOINT_READ;
205                 break;
206         case HW_BREAKPOINT_W:
207                 hw->type = SH_BREAKPOINT_WRITE;
208                 break;
209         case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
210                 hw->type = SH_BREAKPOINT_RW;
211                 break;
212         default:
213                 return -EINVAL;
214         }
215
216         return 0;
217 }
218
219 /*
220  * Validate the arch-specific HW Breakpoint register settings
221  */
222 int hw_breakpoint_arch_parse(struct perf_event *bp,
223                              const struct perf_event_attr *attr,
224                              struct arch_hw_breakpoint *hw)
225 {
226         unsigned int align;
227         int ret;
228
229         ret = arch_build_bp_info(bp, attr, hw);
230         if (ret)
231                 return ret;
232
233         ret = -EINVAL;
234
235         switch (hw->len) {
236         case SH_BREAKPOINT_LEN_1:
237                 align = 0;
238                 break;
239         case SH_BREAKPOINT_LEN_2:
240                 align = 1;
241                 break;
242         case SH_BREAKPOINT_LEN_4:
243                 align = 3;
244                 break;
245         case SH_BREAKPOINT_LEN_8:
246                 align = 7;
247                 break;
248         default:
249                 return ret;
250         }
251
252         /*
253          * Check that the low-order bits of the address are appropriate
254          * for the alignment implied by len.
255          */
256         if (hw->address & align)
257                 return -EINVAL;
258
259         return 0;
260 }
261
262 /*
263  * Release the user breakpoints used by ptrace
264  */
265 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
266 {
267         int i;
268         struct thread_struct *t = &tsk->thread;
269
270         for (i = 0; i < sh_ubc->num_events; i++) {
271                 unregister_hw_breakpoint(t->ptrace_bps[i]);
272                 t->ptrace_bps[i] = NULL;
273         }
274 }
275
276 static int __kprobes hw_breakpoint_handler(struct die_args *args)
277 {
278         int cpu, i, rc = NOTIFY_STOP;
279         struct perf_event *bp;
280         unsigned int cmf, resume_mask;
281
282         /*
283          * Do an early return if none of the channels triggered.
284          */
285         cmf = sh_ubc->triggered_mask();
286         if (unlikely(!cmf))
287                 return NOTIFY_DONE;
288
289         /*
290          * By default, resume all of the active channels.
291          */
292         resume_mask = sh_ubc->active_mask();
293
294         /*
295          * Disable breakpoints during exception handling.
296          */
297         sh_ubc->disable_all();
298
299         cpu = get_cpu();
300         for (i = 0; i < sh_ubc->num_events; i++) {
301                 unsigned long event_mask = (1 << i);
302
303                 if (likely(!(cmf & event_mask)))
304                         continue;
305
306                 /*
307                  * The counter may be concurrently released but that can only
308                  * occur from a call_rcu() path. We can then safely fetch
309                  * the breakpoint, use its callback, touch its counter
310                  * while we are in an rcu_read_lock() path.
311                  */
312                 rcu_read_lock();
313
314                 bp = per_cpu(bp_per_reg[i], cpu);
315                 if (bp)
316                         rc = NOTIFY_DONE;
317
318                 /*
319                  * Reset the condition match flag to denote completion of
320                  * exception handling.
321                  */
322                 sh_ubc->clear_triggered_mask(event_mask);
323
324                 /*
325                  * bp can be NULL due to concurrent perf counter
326                  * removing.
327                  */
328                 if (!bp) {
329                         rcu_read_unlock();
330                         break;
331                 }
332
333                 /*
334                  * Don't restore the channel if the breakpoint is from
335                  * ptrace, as it always operates in one-shot mode.
336                  */
337                 if (bp->overflow_handler == ptrace_triggered)
338                         resume_mask &= ~(1 << i);
339
340                 perf_bp_event(bp, args->regs);
341
342                 /* Deliver the signal to userspace */
343                 if (!arch_check_bp_in_kernelspace(&bp->hw.info)) {
344                         force_sig_fault(SIGTRAP, TRAP_HWBKPT,
345                                         (void __user *)NULL, current);
346                 }
347
348                 rcu_read_unlock();
349         }
350
351         if (cmf == 0)
352                 rc = NOTIFY_DONE;
353
354         sh_ubc->enable_all(resume_mask);
355
356         put_cpu();
357
358         return rc;
359 }
360
361 BUILD_TRAP_HANDLER(breakpoint)
362 {
363         unsigned long ex = lookup_exception_vector();
364         TRAP_HANDLER_DECL;
365
366         notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
367 }
368
369 /*
370  * Handle debug exception notifications.
371  */
372 int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
373                                     unsigned long val, void *data)
374 {
375         struct die_args *args = data;
376
377         if (val != DIE_BREAKPOINT)
378                 return NOTIFY_DONE;
379
380         /*
381          * If the breakpoint hasn't been triggered by the UBC, it's
382          * probably from a debugger, so don't do anything more here.
383          *
384          * This also permits the UBC interface clock to remain off for
385          * non-UBC breakpoints, as we don't need to check the triggered
386          * or active channel masks.
387          */
388         if (args->trapnr != sh_ubc->trap_nr)
389                 return NOTIFY_DONE;
390
391         return hw_breakpoint_handler(data);
392 }
393
394 void hw_breakpoint_pmu_read(struct perf_event *bp)
395 {
396         /* TODO */
397 }
398
399 int register_sh_ubc(struct sh_ubc *ubc)
400 {
401         /* Bail if it's already assigned */
402         if (sh_ubc != &ubc_dummy)
403                 return -EBUSY;
404         sh_ubc = ubc;
405
406         pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
407
408         WARN_ON(ubc->num_events > HBP_NUM);
409
410         return 0;
411 }