2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/kaiser.h>
39 #include <asm/nospec-branch.h>
40 #include <linux/err.h>
42 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
43 #include <linux/elf-em.h>
44 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
45 #define __AUDIT_ARCH_64BIT 0x80000000
46 #define __AUDIT_ARCH_LE 0x40000000
49 .section .entry.text, "ax"
51 #ifdef CONFIG_PARAVIRT
52 ENTRY(native_usergs_sysret64)
55 ENDPROC(native_usergs_sysret64)
56 #endif /* CONFIG_PARAVIRT */
58 .macro TRACE_IRQS_IRETQ
59 #ifdef CONFIG_TRACE_IRQFLAGS
60 btl $9, EFLAGS(%rsp) /* interrupts off? */
68 * When dynamic function tracer is enabled it will add a breakpoint
69 * to all locations that it is about to modify, sync CPUs, update
70 * all the code, sync CPUs, then remove the breakpoints. In this time
71 * if lockdep is enabled, it might jump back into the debug handler
72 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
74 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
75 * make sure the stack pointer does not get reset back to the top
76 * of the debug stack, and instead just reuses the current stack.
78 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
80 .macro TRACE_IRQS_OFF_DEBUG
81 call debug_stack_set_zero
83 call debug_stack_reset
86 .macro TRACE_IRQS_ON_DEBUG
87 call debug_stack_set_zero
89 call debug_stack_reset
92 .macro TRACE_IRQS_IRETQ_DEBUG
93 btl $9, EFLAGS(%rsp) /* interrupts off? */
100 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
101 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
102 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
106 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
108 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
109 * then loads new ss, cs, and rip from previously programmed MSRs.
110 * rflags gets masked by a value from another MSR (so CLD and CLAC
111 * are not needed). SYSCALL does not save anything on the stack
112 * and does not change rsp.
114 * Registers on entry:
115 * rax system call number
117 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
121 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
124 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
126 * Only called from user space.
128 * When user can change pt_regs->foo always force IRET. That is because
129 * it deals with uncanonical addresses better. SYSRET has trouble
130 * with them due to bugs in both AMD and Intel CPUs.
133 ENTRY(entry_SYSCALL_64)
135 * Interrupts are off on entry.
136 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
137 * it is too small to ever cause noticeable irq latency.
140 SWITCH_KERNEL_CR3_NO_STACK
142 * A hypervisor implementation might want to use a label
143 * after the swapgs, so that it can do the swapgs
144 * for the guest and jump here on syscall.
146 GLOBAL(entry_SYSCALL_64_after_swapgs)
148 movq %rsp, PER_CPU_VAR(rsp_scratch)
149 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
151 /* Construct struct pt_regs on stack */
152 pushq $__USER_DS /* pt_regs->ss */
153 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
155 * Re-enable interrupts.
156 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
157 * must execute atomically in the face of possible interrupt-driven
158 * task preemption. We must enable interrupts only after we're done
159 * with using rsp_scratch:
161 ENABLE_INTERRUPTS(CLBR_NONE)
162 pushq %r11 /* pt_regs->flags */
163 pushq $__USER_CS /* pt_regs->cs */
164 pushq %rcx /* pt_regs->ip */
165 pushq %rax /* pt_regs->orig_ax */
166 pushq %rdi /* pt_regs->di */
167 pushq %rsi /* pt_regs->si */
168 pushq %rdx /* pt_regs->dx */
169 pushq %rcx /* pt_regs->cx */
170 pushq $-ENOSYS /* pt_regs->ax */
171 pushq %r8 /* pt_regs->r8 */
172 pushq %r9 /* pt_regs->r9 */
173 pushq %r10 /* pt_regs->r10 */
174 pushq %r11 /* pt_regs->r11 */
175 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
177 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
179 entry_SYSCALL_64_fastpath:
180 #if __SYSCALL_MASK == ~0
181 cmpq $NR_syscalls, %rax
183 andl $__SYSCALL_MASK, %eax
184 cmpl $NR_syscalls, %eax
186 jae 1f /* return -ENOSYS (already in pt_regs->ax) */
187 sbb %rcx, %rcx /* array_index_mask_nospec() */
190 #ifdef CONFIG_RETPOLINE
191 movq sys_call_table(, %rax, 8), %rax
192 call __x86_indirect_thunk_rax
194 call *sys_call_table(, %rax, 8)
200 * Syscall return path ending with SYSRET (fast path).
201 * Has incompletely filled pt_regs.
205 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
206 * it is too small to ever cause noticeable irq latency.
208 DISABLE_INTERRUPTS(CLBR_NONE)
211 * We must check ti flags with interrupts (or at least preemption)
212 * off because we must *never* return to userspace without
213 * processing exit work that is enqueued if we're preempted here.
214 * In particular, returning to userspace with any of the one-shot
215 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
218 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
219 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
221 call mds_user_clear_buffers
224 movq EFLAGS(%rsp), %r11
225 RESTORE_C_REGS_EXCEPT_RCX_R11
227 * This opens a window where we have a user CR3, but are
228 * running in the kernel. This makes using the CS
229 * register useless for telling whether or not we need to
230 * switch CR3 in NMIs. Normal interrupts are OK because
236 * 64-bit SYSRET restores rip from rcx,
237 * rflags from r11 (but RF and VM bits are forced to 0),
238 * cs and ss are loaded from MSRs.
239 * Restoration of rflags re-enables interrupts.
241 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss
242 * descriptor is not reinitialized. This means that we should
243 * avoid SYSRET with SS == NULL, which could happen if we schedule,
244 * exit the kernel, and re-enter using an interrupt vector. (All
245 * interrupt entries on x86_64 set SS to NULL.) We prevent that
246 * from happening by reloading SS in __switch_to. (Actually
247 * detecting the failure in 64-bit userspace is tricky but can be
252 GLOBAL(int_ret_from_sys_call_irqs_off)
254 ENABLE_INTERRUPTS(CLBR_NONE)
255 jmp int_ret_from_sys_call
257 /* Do syscall entry tracing */
260 movl $AUDIT_ARCH_X86_64, %esi
261 call syscall_trace_enter_phase1
263 jnz tracesys_phase2 /* if needed, run the slow path */
264 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
265 movq ORIG_RAX(%rsp), %rax
266 jmp entry_SYSCALL_64_fastpath /* and return to the fast path */
271 movl $AUDIT_ARCH_X86_64, %esi
273 call syscall_trace_enter_phase2
276 * Reload registers from stack in case ptrace changed them.
277 * We don't reload %rax because syscall_trace_entry_phase2() returned
278 * the value it wants us to use in the table lookup.
280 RESTORE_C_REGS_EXCEPT_RAX
282 #if __SYSCALL_MASK == ~0
283 cmpq $NR_syscalls, %rax
285 andl $__SYSCALL_MASK, %eax
286 cmpl $NR_syscalls, %eax
288 jae 1f /* return -ENOSYS (already in pt_regs->ax) */
289 sbb %rcx, %rcx /* array_index_mask_nospec() */
291 movq %r10, %rcx /* fixup for C */
292 #ifdef CONFIG_RETPOLINE
293 movq sys_call_table(, %rax, 8), %rax
294 call __x86_indirect_thunk_rax
296 call *sys_call_table(, %rax, 8)
300 /* Use IRET because user could have changed pt_regs->foo */
303 * Syscall return path ending with IRET.
304 * Has correct iret frame.
306 GLOBAL(int_ret_from_sys_call)
309 call syscall_return_slowpath /* returns with IRQs disabled */
311 TRACE_IRQS_IRETQ /* we're about to change IF */
314 * Try to use SYSRET instead of IRET if we're returning to
315 * a completely clean 64-bit userspace context.
319 cmpq %rcx, %r11 /* RCX == RIP */
320 jne opportunistic_sysret_failed
323 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
324 * in kernel space. This essentially lets the user take over
325 * the kernel, since userspace controls RSP.
327 * If width of "canonical tail" ever becomes variable, this will need
328 * to be updated to remain correct on both old and new CPUs.
330 .ifne __VIRTUAL_MASK_SHIFT - 47
331 .error "virtual address width changed -- SYSRET checks need update"
334 /* Change top 16 bits to be the sign-extension of 47th bit */
335 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
336 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
338 /* If this changed %rcx, it was not canonical */
340 jne opportunistic_sysret_failed
342 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
343 jne opportunistic_sysret_failed
346 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
347 jne opportunistic_sysret_failed
350 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
351 * restoring TF results in a trap from userspace immediately after
352 * SYSRET. This would cause an infinite loop whenever #DB happens
353 * with register state that satisfies the opportunistic SYSRET
354 * conditions. For example, single-stepping this user code:
356 * movq $stuck_here, %rcx
361 * would never get past 'stuck_here'.
363 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
364 jnz opportunistic_sysret_failed
366 /* nothing to check for RSP */
368 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
369 jne opportunistic_sysret_failed
372 * We win! This label is here just for ease of understanding
373 * perf profiles. Nothing jumps here.
375 syscall_return_via_sysret:
376 /* rcx and r11 are already restored (see code above) */
377 RESTORE_C_REGS_EXCEPT_RCX_R11
379 * This opens a window where we have a user CR3, but are
380 * running in the kernel. This makes using the CS
381 * register useless for telling whether or not we need to
382 * switch CR3 in NMIs. Normal interrupts are OK because
389 opportunistic_sysret_failed:
391 * This opens a window where we have a user CR3, but are
392 * running in the kernel. This makes using the CS
393 * register useless for telling whether or not we need to
394 * switch CR3 in NMIs. Normal interrupts are OK because
399 jmp restore_c_regs_and_iret
400 END(entry_SYSCALL_64)
403 .macro FORK_LIKE func
419 /* exec failed, can use fast SYSRET code path in this case */
422 /* must use IRET code path (pt_regs->cs may have changed) */
426 jmp int_ret_from_sys_call
429 * Remaining execve stubs are only 7 bytes long.
430 * ENTRY() often aligns to 16 bytes, which in this case has no benefits.
433 GLOBAL(stub_execveat)
435 jmp return_from_execve
438 #if defined(CONFIG_X86_X32_ABI)
440 GLOBAL(stub_x32_execve)
441 call compat_sys_execve
442 jmp return_from_execve
445 GLOBAL(stub_x32_execveat)
446 call compat_sys_execveat
447 jmp return_from_execve
448 END(stub_x32_execveat)
452 * sigreturn is special because it needs to restore all registers on return.
453 * This cannot be done with SYSRET, so use the IRET return path instead.
455 ENTRY(stub_rt_sigreturn)
457 * SAVE_EXTRA_REGS result is not normally needed:
458 * sigreturn overwrites all pt_regs->GPREGS.
459 * But sigreturn can fail (!), and there is no easy way to detect that.
460 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error,
461 * we SAVE_EXTRA_REGS here.
464 call sys_rt_sigreturn
469 jmp int_ret_from_sys_call
470 END(stub_rt_sigreturn)
472 #ifdef CONFIG_X86_X32_ABI
473 ENTRY(stub_x32_rt_sigreturn)
475 call sys32_x32_rt_sigreturn
477 END(stub_x32_rt_sigreturn)
481 * A newly forked process directly context switches into this address.
483 * rdi: prev task we switched from
487 LOCK ; btr $TIF_FORK, TI_flags(%r8)
490 popfq /* reset kernel eflags */
492 call schedule_tail /* rdi: 'prev' task parameter */
496 testb $3, CS(%rsp) /* from kernel_thread? */
499 * By the time we get here, we have no idea whether our pt_regs,
500 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
501 * the slow path, or one of the 32-bit compat paths.
502 * Use IRET code path to return, since it can safely handle
505 jnz int_ret_from_sys_call
508 * We came from kernel_thread
509 * nb: we depend on RESTORE_EXTRA_REGS above
515 jmp int_ret_from_sys_call
519 * Build the entry stubs with some assembler magic.
520 * We pack 1 stub into every 8-byte block.
523 ENTRY(irq_entries_start)
524 vector=FIRST_EXTERNAL_VECTOR
525 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
526 pushq $(~vector+0x80) /* Note: always in signed byte range */
531 END(irq_entries_start)
534 * Interrupt entry/exit.
536 * Interrupt entry points save only callee clobbered registers in fast path.
538 * Entry runs with interrupts off.
541 /* 0(%rsp): ~(interrupt number) */
542 .macro interrupt func
544 ALLOC_PT_GPREGS_ON_STACK
552 * IRQ from user mode. Switch to kernel gsbase and inform context
553 * tracking that we're in kernel mode.
556 FENCE_SWAPGS_USER_ENTRY
560 * We need to tell lockdep that IRQs are off. We can't do this until
561 * we fix gsbase, and we should do it before enter_from_user_mode
562 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
563 * the simplest way to handle it is to just call it twice if
564 * we enter from user mode. There's no reason to optimize this since
565 * TRACE_IRQS_OFF is a no-op if lockdep is off.
569 #ifdef CONFIG_CONTEXT_TRACKING
570 call enter_from_user_mode
574 FENCE_SWAPGS_KERNEL_ENTRY
577 * Save previous stack pointer, optionally switch to interrupt stack.
578 * irq_count is used to check if a CPU is already on an interrupt stack
579 * or not. While this is essentially redundant with preempt_count it is
580 * a little cheaper to use a separate counter in the PDA (short of
581 * moving irq_enter into assembly, which would be too much work)
584 incl PER_CPU_VAR(irq_count)
585 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
587 /* We entered an interrupt context - irqs are off: */
590 call \func /* rdi points to pt_regs */
594 * The interrupt stubs push (~vector+0x80) onto the stack and
595 * then jump to common_interrupt.
597 .p2align CONFIG_X86_L1_CACHE_SHIFT
600 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
602 /* 0(%rsp): old RSP */
604 DISABLE_INTERRUPTS(CLBR_NONE)
606 decl PER_CPU_VAR(irq_count)
608 /* Restore saved previous stack */
614 /* Interrupt came from user space */
617 call prepare_exit_to_usermode
621 jmp restore_regs_and_iret
623 /* Returning to kernel space */
625 #ifdef CONFIG_PREEMPT
626 /* Interrupts are off */
627 /* Check if we need preemption */
628 btl $9, EFLAGS(%rsp) /* were interrupts off? */
630 0: cmpl $0, PER_CPU_VAR(__preempt_count)
632 call preempt_schedule_irq
637 * The iretq could re-enable interrupts:
642 * At this label, code paths which return to kernel and to user,
643 * which come from interrupts/exception and from syscalls, merge.
645 GLOBAL(restore_regs_and_iret)
647 restore_c_regs_and_iret:
649 REMOVE_PT_GPREGS_FROM_STACK 8
654 * Are we returning to a stack segment from the LDT? Note: in
655 * 64-bit mode SS:RSP on the exception stack is always valid.
657 #ifdef CONFIG_X86_ESPFIX64
658 testb $4, (SS-RIP)(%rsp)
659 jnz native_irq_return_ldt
662 .global native_irq_return_iret
663 native_irq_return_iret:
665 * This may fault. Non-paranoid faults on return to userspace are
666 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
667 * Double-faults due to espfix64 are handled in do_double_fault.
668 * Other faults here are fatal.
672 #ifdef CONFIG_X86_ESPFIX64
673 native_irq_return_ldt:
678 movq PER_CPU_VAR(espfix_waddr), %rdi
679 movq %rax, (0*8)(%rdi) /* RAX */
680 movq (2*8)(%rsp), %rax /* RIP */
681 movq %rax, (1*8)(%rdi)
682 movq (3*8)(%rsp), %rax /* CS */
683 movq %rax, (2*8)(%rdi)
684 movq (4*8)(%rsp), %rax /* RFLAGS */
685 movq %rax, (3*8)(%rdi)
686 movq (6*8)(%rsp), %rax /* SS */
687 movq %rax, (5*8)(%rdi)
688 movq (5*8)(%rsp), %rax /* RSP */
689 movq %rax, (4*8)(%rdi)
690 andl $0xffff0000, %eax
692 orq PER_CPU_VAR(espfix_stack), %rax
697 jmp native_irq_return_iret
699 END(common_interrupt)
704 .macro apicinterrupt3 num sym do_sym
714 #ifdef CONFIG_TRACING
715 #define trace(sym) trace_##sym
716 #define smp_trace(sym) smp_trace_##sym
718 .macro trace_apicinterrupt num sym
719 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
722 .macro trace_apicinterrupt num sym do_sym
726 .macro apicinterrupt num sym do_sym
727 apicinterrupt3 \num \sym \do_sym
728 trace_apicinterrupt \num \sym
732 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
733 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
737 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
740 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
741 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
743 #ifdef CONFIG_HAVE_KVM
744 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
745 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
748 #ifdef CONFIG_X86_MCE_THRESHOLD
749 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
752 #ifdef CONFIG_X86_MCE_AMD
753 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
756 #ifdef CONFIG_X86_THERMAL_VECTOR
757 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
761 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
762 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
763 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
766 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
767 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
769 #ifdef CONFIG_IRQ_WORK
770 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
774 * Exception entry points.
776 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
778 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
781 .if \shift_ist != -1 && \paranoid == 0
782 .error "using shift_ist requires paranoid=1"
786 PARAVIRT_ADJUST_EXCEPTION_FRAME
788 .ifeq \has_error_code
789 pushq $-1 /* ORIG_RAX: no syscall to restart */
792 ALLOC_PT_GPREGS_ON_STACK
796 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
803 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
807 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
813 movq %rsp, %rdi /* pt_regs pointer */
816 movq ORIG_RAX(%rsp), %rsi /* get error code */
817 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
819 xorl %esi, %esi /* no error code */
823 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
829 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
832 /* these procedures expect "no swapgs" flag in ebx */
841 * Paranoid entry from userspace. Switch stacks and treat it
842 * as a normal entry. This means that paranoid handlers
843 * run in real process context if user_mode(regs).
849 movq %rsp, %rdi /* pt_regs pointer */
851 movq %rax, %rsp /* switch stack */
853 movq %rsp, %rdi /* pt_regs pointer */
856 movq ORIG_RAX(%rsp), %rsi /* get error code */
857 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
859 xorl %esi, %esi /* no error code */
869 #ifdef CONFIG_TRACING
870 .macro trace_idtentry sym do_sym has_error_code:req
871 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
872 idtentry \sym \do_sym has_error_code=\has_error_code
875 .macro trace_idtentry sym do_sym has_error_code:req
876 idtentry \sym \do_sym has_error_code=\has_error_code
880 idtentry divide_error do_divide_error has_error_code=0
881 idtentry overflow do_overflow has_error_code=0
882 idtentry bounds do_bounds has_error_code=0
883 idtentry invalid_op do_invalid_op has_error_code=0
884 idtentry device_not_available do_device_not_available has_error_code=0
885 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
886 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
887 idtentry invalid_TSS do_invalid_TSS has_error_code=1
888 idtentry segment_not_present do_segment_not_present has_error_code=1
889 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
890 idtentry coprocessor_error do_coprocessor_error has_error_code=0
891 idtentry alignment_check do_alignment_check has_error_code=1
892 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
896 * Reload gs selector with exception handling
899 ENTRY(native_load_gs_index)
901 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
905 2: mfence /* workaround */
909 END(native_load_gs_index)
911 _ASM_EXTABLE(gs_change, bad_gs)
912 .section .fixup, "ax"
913 /* running with kernelgs */
915 SWAPGS /* switch back to user gs */
921 /* Call softirq on interrupt stack. Interrupts are off. */
922 ENTRY(do_softirq_own_stack)
925 incl PER_CPU_VAR(irq_count)
926 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
927 push %rbp /* frame pointer backlink */
930 decl PER_CPU_VAR(irq_count)
932 END(do_softirq_own_stack)
935 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
938 * A note on the "critical region" in our callback handler.
939 * We want to avoid stacking callback handlers due to events occurring
940 * during handling of the last event. To do this, we keep events disabled
941 * until we've done all processing. HOWEVER, we must enable events before
942 * popping the stack frame (can't be done atomically) and so it would still
943 * be possible to get enough handler activations to overflow the stack.
944 * Although unlikely, bugs of that kind are hard to track down, so we'd
945 * like to avoid the possibility.
946 * So, on entry to the handler we detect whether we interrupted an
947 * existing activation in its critical region -- if so, we pop the current
948 * activation and restart the handler using the previous one.
950 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
953 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
954 * see the correct pointer to the pt_regs
956 movq %rdi, %rsp /* we don't return, adjust the stack frame */
957 11: incl PER_CPU_VAR(irq_count)
959 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
960 pushq %rbp /* frame pointer backlink */
961 call xen_evtchn_do_upcall
963 decl PER_CPU_VAR(irq_count)
964 #ifndef CONFIG_PREEMPT
965 call xen_maybe_preempt_hcall
968 END(xen_do_hypervisor_callback)
971 * Hypervisor uses this for application faults while it executes.
972 * We get here for two reasons:
973 * 1. Fault while reloading DS, ES, FS or GS
974 * 2. Fault while executing IRET
975 * Category 1 we do not need to fix up as Xen has already reloaded all segment
976 * registers that could be reloaded and zeroed the others.
977 * Category 2 we fix up by killing the current process. We cannot use the
978 * normal Linux return path in this case because if we use the IRET hypercall
979 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
980 * We distinguish between categories by comparing each saved segment register
981 * with its current contents: any discrepancy means we in category 1.
983 ENTRY(xen_failsafe_callback)
996 /* All segments match their saved values => Category 2 (Bad IRET). */
1003 jmp general_protection
1004 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1008 pushq $-1 /* orig_ax = -1 => not a system call */
1009 ALLOC_PT_GPREGS_ON_STACK
1013 END(xen_failsafe_callback)
1015 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1016 xen_hvm_callback_vector xen_evtchn_do_upcall
1018 #endif /* CONFIG_XEN */
1020 #if IS_ENABLED(CONFIG_HYPERV)
1021 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1022 hyperv_callback_vector hyperv_vector_handler
1023 #endif /* CONFIG_HYPERV */
1025 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1026 idtentry int3 do_int3 has_error_code=0
1027 idtentry stack_segment do_stack_segment has_error_code=1
1030 idtentry xen_debug do_debug has_error_code=0
1031 idtentry xen_int3 do_int3 has_error_code=0
1032 idtentry xen_stack_segment do_stack_segment has_error_code=1
1035 idtentry general_protection do_general_protection has_error_code=1
1036 trace_idtentry page_fault do_page_fault has_error_code=1
1038 #ifdef CONFIG_KVM_GUEST
1039 idtentry async_page_fault do_async_page_fault has_error_code=1
1042 #ifdef CONFIG_X86_MCE
1043 idtentry machine_check do_mce has_error_code=0 paranoid=1
1047 * Save all registers in pt_regs, and switch gs if needed.
1048 * Use slow, but surefire "are we in kernel?" check.
1050 * Return: ebx=0: needs swapgs but not SWITCH_USER_CR3 in paranoid_exit
1051 * ebx=1: needs neither swapgs nor SWITCH_USER_CR3 in paranoid_exit
1052 * ebx=2: needs both swapgs and SWITCH_USER_CR3 in paranoid_exit
1053 * ebx=3: needs SWITCH_USER_CR3 but not swapgs in paranoid_exit
1055 ENTRY(paranoid_entry)
1060 movl $MSR_GS_BASE, %ecx
1063 js 1f /* negative -> in kernel */
1067 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1069 * We might have come in between a swapgs and a SWITCH_KERNEL_CR3
1070 * on entry, or between a SWITCH_USER_CR3 and a swapgs on exit.
1071 * Do a conditional SWITCH_KERNEL_CR3: this could safely be done
1072 * unconditionally, but we need to find out whether the reverse
1073 * should be done on return (conveyed to paranoid_exit in %ebx).
1075 ALTERNATIVE "jmp 2f", "movq %cr3, %rax", X86_FEATURE_KAISER
1076 testl $KAISER_SHADOW_PGD_OFFSET, %eax
1079 andq $(~(X86_CR3_PCID_ASID_MASK | KAISER_SHADOW_PGD_OFFSET)), %rax
1080 /* If PCID enabled, set X86_CR3_PCID_NOFLUSH_BIT */
1081 ALTERNATIVE "", "bts $63, %rax", X86_FEATURE_PCID
1086 * The above doesn't do an unconditional CR3 write, even in the PTI
1087 * case. So do an lfence to prevent GS speculation, regardless of
1088 * whether PTI is enabled.
1090 FENCE_SWAPGS_KERNEL_ENTRY
1096 * "Paranoid" exit path from exception stack. This is invoked
1097 * only on return from non-NMI IST interrupts that came
1098 * from kernel space.
1100 * We may be returning to very strange contexts (e.g. very early
1101 * in syscall entry), so checking for preemption here would
1102 * be complicated. Fortunately, we there's no good reason
1103 * to try to handle preemption here.
1105 * On entry: ebx=0: needs swapgs but not SWITCH_USER_CR3
1106 * ebx=1: needs neither swapgs nor SWITCH_USER_CR3
1107 * ebx=2: needs both swapgs and SWITCH_USER_CR3
1108 * ebx=3: needs SWITCH_USER_CR3 but not swapgs
1110 ENTRY(paranoid_exit)
1111 DISABLE_INTERRUPTS(CLBR_NONE)
1112 TRACE_IRQS_OFF_DEBUG
1113 TRACE_IRQS_IRETQ_DEBUG
1114 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1115 /* No ALTERNATIVE for X86_FEATURE_KAISER: paranoid_entry sets %ebx */
1116 testl $2, %ebx /* SWITCH_USER_CR3 needed? */
1117 jz paranoid_exit_no_switch
1119 paranoid_exit_no_switch:
1121 testl $1, %ebx /* swapgs needed? */
1122 jnz paranoid_exit_no_swapgs
1124 paranoid_exit_no_swapgs:
1127 REMOVE_PT_GPREGS_FROM_STACK 8
1132 * Save all registers in pt_regs, and switch gs if needed.
1139 * error_entry() always returns with a kernel gsbase and
1140 * CR3. We must also have a kernel CR3/gsbase before
1141 * calling TRACE_IRQS_*. Just unconditionally switch to
1142 * the kernel CR3 here.
1145 testb $3, CS+8(%rsp)
1146 jz .Lerror_kernelspace
1149 * We entered from user mode or we're pretending to have entered
1150 * from user mode due to an IRET fault.
1153 FENCE_SWAPGS_USER_ENTRY
1155 .Lerror_entry_from_usermode_after_swapgs:
1157 * We need to tell lockdep that IRQs are off. We can't do this until
1158 * we fix gsbase, and we should do it before enter_from_user_mode
1159 * (which can take locks).
1162 #ifdef CONFIG_CONTEXT_TRACKING
1163 call enter_from_user_mode
1167 .Lerror_entry_done_lfence:
1168 FENCE_SWAPGS_KERNEL_ENTRY
1174 * There are two places in the kernel that can potentially fault with
1175 * usergs. Handle them here. B stepping K8s sometimes report a
1176 * truncated RIP for IRET exceptions returning to compat mode. Check
1177 * for these here too.
1179 .Lerror_kernelspace:
1180 leaq native_irq_return_iret(%rip), %rcx
1181 cmpq %rcx, RIP+8(%rsp)
1183 movl %ecx, %eax /* zero extend */
1184 cmpq %rax, RIP+8(%rsp)
1186 cmpq $gs_change, RIP+8(%rsp)
1187 jne .Lerror_entry_done_lfence
1190 * hack: gs_change can fail with user gsbase. If this happens, fix up
1191 * gsbase and proceed. We'll fix up the exception and land in
1192 * gs_change's error handler with kernel gsbase.
1195 FENCE_SWAPGS_USER_ENTRY
1196 jmp .Lerror_entry_done
1199 /* Fix truncated RIP */
1200 movq %rcx, RIP+8(%rsp)
1205 * We came from an IRET to user mode, so we have user gsbase.
1206 * Switch to kernel gsbase:
1209 FENCE_SWAPGS_USER_ENTRY
1212 * Pretend that the exception came from user mode: set up pt_regs
1213 * as if we faulted immediately after IRET.
1218 jmp .Lerror_entry_from_usermode_after_swapgs
1222 DISABLE_INTERRUPTS(CLBR_NONE)
1229 /* Runs on exception stack */
1232 * Fix up the exception frame if we're on Xen.
1233 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1234 * one value to the stack on native, so it may clobber the rdx
1235 * scratch slot, but it won't clobber any of the important
1238 * Xen is a different story, because the Xen frame itself overlaps
1239 * the "NMI executing" variable.
1241 PARAVIRT_ADJUST_EXCEPTION_FRAME
1244 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1245 * the iretq it performs will take us out of NMI context.
1246 * This means that we can have nested NMIs where the next
1247 * NMI is using the top of the stack of the previous NMI. We
1248 * can't let it execute because the nested NMI will corrupt the
1249 * stack of the previous NMI. NMI handlers are not re-entrant
1252 * To handle this case we do the following:
1253 * Check the a special location on the stack that contains
1254 * a variable that is set when NMIs are executing.
1255 * The interrupted task's stack is also checked to see if it
1257 * If the variable is not set and the stack is not the NMI
1259 * o Set the special variable on the stack
1260 * o Copy the interrupt frame into an "outermost" location on the
1262 * o Copy the interrupt frame into an "iret" location on the stack
1263 * o Continue processing the NMI
1264 * If the variable is set or the previous stack is the NMI stack:
1265 * o Modify the "iret" location to jump to the repeat_nmi
1266 * o return back to the first NMI
1268 * Now on exit of the first NMI, we first clear the stack variable
1269 * The NMI stack will tell any nested NMIs at that point that it is
1270 * nested. Then we pop the stack normally with iret, and if there was
1271 * a nested NMI that updated the copy interrupt stack frame, a
1272 * jump will be made to the repeat_nmi code that will handle the second
1275 * However, espfix prevents us from directly returning to userspace
1276 * with a single IRET instruction. Similarly, IRET to user mode
1277 * can fault. We therefore handle NMIs from user space like
1278 * other IST entries.
1283 /* Use %rdx as our temp variable throughout */
1286 testb $3, CS-RIP+8(%rsp)
1287 jz .Lnmi_from_kernel
1290 * NMI from user mode. We need to run on the thread stack, but we
1291 * can't go through the normal entry paths: NMIs are masked, and
1292 * we don't want to enable interrupts, because then we'll end
1293 * up in an awkward situation in which IRQs are on but NMIs
1296 * We also must not push anything to the stack before switching
1297 * stacks lest we corrupt the "NMI executing" variable.
1302 * percpu variables are mapped with user CR3, so no need
1303 * to switch CR3 here.
1306 FENCE_SWAPGS_USER_ENTRY
1308 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1309 pushq 5*8(%rdx) /* pt_regs->ss */
1310 pushq 4*8(%rdx) /* pt_regs->rsp */
1311 pushq 3*8(%rdx) /* pt_regs->flags */
1312 pushq 2*8(%rdx) /* pt_regs->cs */
1313 pushq 1*8(%rdx) /* pt_regs->rip */
1314 pushq $-1 /* pt_regs->orig_ax */
1315 pushq %rdi /* pt_regs->di */
1316 pushq %rsi /* pt_regs->si */
1317 pushq (%rdx) /* pt_regs->dx */
1318 pushq %rcx /* pt_regs->cx */
1319 pushq %rax /* pt_regs->ax */
1320 pushq %r8 /* pt_regs->r8 */
1321 pushq %r9 /* pt_regs->r9 */
1322 pushq %r10 /* pt_regs->r10 */
1323 pushq %r11 /* pt_regs->r11 */
1324 pushq %rbx /* pt_regs->rbx */
1325 pushq %rbp /* pt_regs->rbp */
1326 pushq %r12 /* pt_regs->r12 */
1327 pushq %r13 /* pt_regs->r13 */
1328 pushq %r14 /* pt_regs->r14 */
1329 pushq %r15 /* pt_regs->r15 */
1332 * At this point we no longer need to worry about stack damage
1333 * due to nesting -- we're on the normal thread stack and we're
1334 * done with the NMI stack.
1339 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1340 /* Unconditionally use kernel CR3 for do_nmi() */
1341 /* %rax is saved above, so OK to clobber here */
1342 ALTERNATIVE "jmp 2f", "movq %cr3, %rax", X86_FEATURE_KAISER
1343 /* If PCID enabled, NOFLUSH now and NOFLUSH on return */
1344 ALTERNATIVE "", "bts $63, %rax", X86_FEATURE_PCID
1346 /* mask off "user" bit of pgd address and 12 PCID bits: */
1347 andq $(~(X86_CR3_PCID_ASID_MASK | KAISER_SHADOW_PGD_OFFSET)), %rax
1353 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1355 * Unconditionally restore CR3. I know we return to
1356 * kernel code that needs user CR3, but do we ever return
1357 * to "user mode" where we need the kernel CR3?
1359 ALTERNATIVE "", "popq %rax; movq %rax, %cr3", X86_FEATURE_KAISER
1363 * Return back to user mode. We must *not* do the normal exit
1364 * work, because we don't want to enable interrupts. Do not
1365 * switch to user CR3: we might be going back to kernel code
1366 * that had a user CR3 set.
1369 jmp restore_c_regs_and_iret
1373 * Here's what our stack frame will look like:
1374 * +---------------------------------------------------------+
1376 * | original Return RSP |
1377 * | original RFLAGS |
1380 * +---------------------------------------------------------+
1381 * | temp storage for rdx |
1382 * +---------------------------------------------------------+
1383 * | "NMI executing" variable |
1384 * +---------------------------------------------------------+
1385 * | iret SS } Copied from "outermost" frame |
1386 * | iret Return RSP } on each loop iteration; overwritten |
1387 * | iret RFLAGS } by a nested NMI to force another |
1388 * | iret CS } iteration if needed. |
1390 * +---------------------------------------------------------+
1391 * | outermost SS } initialized in first_nmi; |
1392 * | outermost Return RSP } will not be changed before |
1393 * | outermost RFLAGS } NMI processing is done. |
1394 * | outermost CS } Copied to "iret" frame on each |
1395 * | outermost RIP } iteration. |
1396 * +---------------------------------------------------------+
1398 * +---------------------------------------------------------+
1400 * The "original" frame is used by hardware. Before re-enabling
1401 * NMIs, we need to be done with it, and we need to leave enough
1402 * space for the asm code here.
1404 * We return by executing IRET while RSP points to the "iret" frame.
1405 * That will either return for real or it will loop back into NMI
1408 * The "outermost" frame is copied to the "iret" frame on each
1409 * iteration of the loop, so each iteration starts with the "iret"
1410 * frame pointing to the final return target.
1414 * Determine whether we're a nested NMI.
1416 * If we interrupted kernel code between repeat_nmi and
1417 * end_repeat_nmi, then we are a nested NMI. We must not
1418 * modify the "iret" frame because it's being written by
1419 * the outer NMI. That's okay; the outer NMI handler is
1420 * about to about to call do_nmi anyway, so we can just
1421 * resume the outer NMI.
1424 movq $repeat_nmi, %rdx
1427 movq $end_repeat_nmi, %rdx
1433 * Now check "NMI executing". If it's set, then we're nested.
1434 * This will not detect if we interrupted an outer NMI just
1441 * Now test if the previous stack was an NMI stack. This covers
1442 * the case where we interrupt an outer NMI after it clears
1443 * "NMI executing" but before IRET. We need to be careful, though:
1444 * there is one case in which RSP could point to the NMI stack
1445 * despite there being no NMI active: naughty userspace controls
1446 * RSP at the very beginning of the SYSCALL targets. We can
1447 * pull a fast one on naughty userspace, though: we program
1448 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1449 * if it controls the kernel's RSP. We set DF before we clear
1453 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1454 cmpq %rdx, 4*8(%rsp)
1455 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1458 subq $EXCEPTION_STKSZ, %rdx
1459 cmpq %rdx, 4*8(%rsp)
1460 /* If it is below the NMI stack, it is a normal NMI */
1463 /* Ah, it is within the NMI stack. */
1465 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1466 jz first_nmi /* RSP was user controlled. */
1468 /* This is a nested NMI. */
1472 * Modify the "iret" frame to point to repeat_nmi, forcing another
1473 * iteration of NMI handling.
1476 leaq -10*8(%rsp), %rdx
1483 /* Put stack back */
1489 /* We are returning to kernel mode, so this cannot result in a fault. */
1496 /* Make room for "NMI executing". */
1499 /* Leave room for the "iret" frame */
1502 /* Copy the "original" frame to the "outermost" frame */
1507 /* Everything up to here is safe from nested NMIs */
1509 #ifdef CONFIG_DEBUG_ENTRY
1511 * For ease of testing, unmask NMIs right away. Disabled by
1512 * default because IRET is very expensive.
1515 pushq %rsp /* RSP (minus 8 because of the previous push) */
1516 addq $8, (%rsp) /* Fix up RSP */
1518 pushq $__KERNEL_CS /* CS */
1520 INTERRUPT_RETURN /* continues at repeat_nmi below */
1526 * If there was a nested NMI, the first NMI's iret will return
1527 * here. But NMIs are still enabled and we can take another
1528 * nested NMI. The nested NMI checks the interrupted RIP to see
1529 * if it is between repeat_nmi and end_repeat_nmi, and if so
1530 * it will just return, as we are about to repeat an NMI anyway.
1531 * This makes it safe to copy to the stack frame that a nested
1534 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1535 * we're repeating an NMI, gsbase has the same value that it had on
1536 * the first iteration. paranoid_entry will load the kernel
1537 * gsbase if needed before we call do_nmi. "NMI executing"
1540 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1543 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1544 * here must not modify the "iret" frame while we're writing to
1545 * it or it will end up containing garbage.
1555 * Everything below this point can be preempted by a nested NMI.
1556 * If this happens, then the inner NMI will change the "iret"
1557 * frame to point back to repeat_nmi.
1559 pushq $-1 /* ORIG_RAX: no syscall to restart */
1560 ALLOC_PT_GPREGS_ON_STACK
1563 * Use the same approach as paranoid_entry to handle SWAPGS, but
1564 * without CR3 handling since we do that differently in NMIs. No
1565 * need to use paranoid_exit as we should not be calling schedule
1566 * in NMI context. Even with normal interrupts enabled. An NMI
1567 * should not be setting NEED_RESCHED or anything that normal
1568 * interrupts and exceptions might do.
1574 movl $MSR_GS_BASE, %ecx
1577 js 1f /* negative -> in kernel */
1583 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1584 /* Unconditionally use kernel CR3 for do_nmi() */
1585 /* %rax is saved above, so OK to clobber here */
1586 ALTERNATIVE "jmp 2f", "movq %cr3, %rax", X86_FEATURE_KAISER
1587 /* If PCID enabled, NOFLUSH now and NOFLUSH on return */
1588 ALTERNATIVE "", "bts $63, %rax", X86_FEATURE_PCID
1590 /* mask off "user" bit of pgd address and 12 PCID bits: */
1591 andq $(~(X86_CR3_PCID_ASID_MASK | KAISER_SHADOW_PGD_OFFSET)), %rax
1595 FENCE_SWAPGS_KERNEL_ENTRY
1597 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1600 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1602 * Unconditionally restore CR3. We might be returning to
1603 * kernel code that needs user CR3, like just just before
1606 ALTERNATIVE "", "popq %rax; movq %rax, %cr3", X86_FEATURE_KAISER
1609 testl %ebx, %ebx /* swapgs needed? */
1612 /* We fixed up CR3 above, so no need to switch it here */
1618 /* Point RSP at the "iret" frame. */
1619 REMOVE_PT_GPREGS_FROM_STACK 6*8
1622 * Clear "NMI executing". Set DF first so that we can easily
1623 * distinguish the remaining code between here and IRET from
1624 * the SYSCALL entry and exit paths. On a native kernel, we
1625 * could just inspect RIP, but, on paravirt kernels,
1626 * INTERRUPT_RETURN can translate into a jump into a
1630 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1633 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1634 * stack in a single instruction. We are returning to kernel
1635 * mode, so this cannot result in a fault.
1640 ENTRY(ignore_sysret)