arch/x86/kernel/apic/x2apic_cluster.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <linux/threads.h>
   3 #include <linux/cpumask.h>
   4 #include <linux/string.h>
   5 #include <linux/kernel.h>
   6 #include <linux/ctype.h>
   7 #include <linux/dmar.h>
   8 #include <linux/irq.h>
   9 #include <linux/cpu.h>
  10
  11 #include <asm/smp.h>
  12 #include "x2apic.h"
  13
  14 struct cluster_mask {
  15         unsigned int    clusterid;
  16         int             node;
  17         struct cpumask  mask;
  18 };
  19
  20 static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
  21 static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
  22 static DEFINE_PER_CPU(struct cluster_mask *, cluster_masks);
  23 static struct cluster_mask *cluster_hotplug_mask;
  24
  25 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  26 {
  27         return x2apic_enabled();
  28 }
  29
  30 static void x2apic_send_IPI(int cpu, int vector)
  31 {
  32         u32 dest = per_cpu(x86_cpu_to_logical_apicid, cpu);
  33
  34         /* x2apic MSRs are special and need a special fence: */
  35         weak_wrmsr_fence();
  36         __x2apic_send_IPI_dest(dest, vector, APIC_DEST_LOGICAL);
  37 }
  38
  39 static void
  40 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
  41 {
  42         unsigned int cpu, clustercpu;
  43         struct cpumask *tmpmsk;
  44         unsigned long flags;
  45         u32 dest;
  46
  47         /* x2apic MSRs are special and need a special fence: */
  48         weak_wrmsr_fence();
  49         local_irq_save(flags);
  50
  51         tmpmsk = this_cpu_cpumask_var_ptr(ipi_mask);
  52         cpumask_copy(tmpmsk, mask);
  53         /* If IPI should not be sent to self, clear current CPU */
  54         if (apic_dest != APIC_DEST_ALLINC)
  55                 cpumask_clear_cpu(smp_processor_id(), tmpmsk);
  56
  57         /* Collapse cpus in a cluster so a single IPI per cluster is sent */
  58         for_each_cpu(cpu, tmpmsk) {
  59                 struct cluster_mask *cmsk = per_cpu(cluster_masks, cpu);
  60
  61                 dest = 0;
  62                 for_each_cpu_and(clustercpu, tmpmsk, &cmsk->mask)
  63                         dest |= per_cpu(x86_cpu_to_logical_apicid, clustercpu);
  64
  65                 if (!dest)
  66                         continue;
  67
  68                 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
  69                 /* Remove cluster CPUs from tmpmask */
  70                 cpumask_andnot(tmpmsk, tmpmsk, &cmsk->mask);
  71         }
  72
  73         local_irq_restore(flags);
  74 }
  75
  76 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  77 {
  78         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
  79 }
  80
  81 static void
  82 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
  83 {
  84         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
  85 }
  86
  87 static void x2apic_send_IPI_allbutself(int vector)
  88 {
  89         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
  90 }
  91
  92 static void x2apic_send_IPI_all(int vector)
  93 {
  94         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
  95 }
  96
  97 static u32 x2apic_calc_apicid(unsigned int cpu)
  98 {
  99         return per_cpu(x86_cpu_to_logical_apicid, cpu);
 100 }
 101
 102 static void init_x2apic_ldr(void)
 103 {
 104         struct cluster_mask *cmsk = this_cpu_read(cluster_masks);
 105         u32 cluster, apicid = apic_read(APIC_LDR);
 106         unsigned int cpu;
 107
 108         this_cpu_write(x86_cpu_to_logical_apicid, apicid);
 109
 110         if (cmsk)
 111                 goto update;
 112
 113         cluster = apicid >> 16;
 114         for_each_online_cpu(cpu) {
 115                 cmsk = per_cpu(cluster_masks, cpu);
 116                 /* Matching cluster found. Link and update it. */
 117                 if (cmsk && cmsk->clusterid == cluster)
 118                         goto update;
 119         }
 120         cmsk = cluster_hotplug_mask;
 121         cmsk->clusterid = cluster;
 122         cluster_hotplug_mask = NULL;
 123 update:
 124         this_cpu_write(cluster_masks, cmsk);
 125         cpumask_set_cpu(smp_processor_id(), &cmsk->mask);
 126 }
 127
 128 static int alloc_clustermask(unsigned int cpu, int node)
 129 {
 130         if (per_cpu(cluster_masks, cpu))
 131                 return 0;
 132         /*
 133          * If a hotplug spare mask exists, check whether it's on the right
 134          * node. If not, free it and allocate a new one.
 135          */
 136         if (cluster_hotplug_mask) {
 137                 if (cluster_hotplug_mask->node == node)
 138                         return 0;
 139                 kfree(cluster_hotplug_mask);
 140         }
 141
 142         cluster_hotplug_mask = kzalloc_node(sizeof(*cluster_hotplug_mask),
 143                                             GFP_KERNEL, node);
 144         if (!cluster_hotplug_mask)
 145                 return -ENOMEM;
 146         cluster_hotplug_mask->node = node;
 147         return 0;
 148 }
 149
 150 static int x2apic_prepare_cpu(unsigned int cpu)
 151 {
 152         if (alloc_clustermask(cpu, cpu_to_node(cpu)) < 0)
 153                 return -ENOMEM;
 154         if (!zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL))
 155                 return -ENOMEM;
 156         return 0;
 157 }
 158
 159 static int x2apic_dead_cpu(unsigned int dead_cpu)
 160 {
 161         struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu);
 162
 163         if (cmsk)
 164                 cpumask_clear_cpu(dead_cpu, &cmsk->mask);
 165         free_cpumask_var(per_cpu(ipi_mask, dead_cpu));
 166         return 0;
 167 }
 168
 169 static int x2apic_cluster_probe(void)
 170 {
 171         if (!x2apic_mode)
 172                 return 0;
 173
 174         if (cpuhp_setup_state(CPUHP_X2APIC_PREPARE, "x86/x2apic:prepare",
 175                               x2apic_prepare_cpu, x2apic_dead_cpu) < 0) {
 176                 pr_err("Failed to register X2APIC_PREPARE\n");
 177                 return 0;
 178         }
 179         init_x2apic_ldr();
 180         return 1;
 181 }
 182
 183 static struct apic apic_x2apic_cluster __ro_after_init = {
 184
 185         .name                           = "cluster x2apic",
 186         .probe                          = x2apic_cluster_probe,
 187         .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
 188         .apic_id_valid                  = x2apic_apic_id_valid,
 189         .apic_id_registered             = x2apic_apic_id_registered,
 190
 191         .irq_delivery_mode              = dest_Fixed,
 192         .irq_dest_mode                  = 1, /* logical */
 193
 194         .disable_esr                    = 0,
 195         .dest_logical                   = APIC_DEST_LOGICAL,
 196         .check_apicid_used              = NULL,
 197
 198         .init_apic_ldr                  = init_x2apic_ldr,
 199
 200         .ioapic_phys_id_map             = NULL,
 201         .setup_apic_routing             = NULL,
 202         .cpu_present_to_apicid          = default_cpu_present_to_apicid,
 203         .apicid_to_cpu_present          = NULL,
 204         .check_phys_apicid_present      = default_check_phys_apicid_present,
 205         .phys_pkg_id                    = x2apic_phys_pkg_id,
 206
 207         .get_apic_id                    = x2apic_get_apic_id,
 208         .set_apic_id                    = x2apic_set_apic_id,
 209
 210         .calc_dest_apicid               = x2apic_calc_apicid,
 211
 212         .send_IPI                       = x2apic_send_IPI,
 213         .send_IPI_mask                  = x2apic_send_IPI_mask,
 214         .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
 215         .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
 216         .send_IPI_all                   = x2apic_send_IPI_all,
 217         .send_IPI_self                  = x2apic_send_IPI_self,
 218
 219         .inquire_remote_apic            = NULL,
 220
 221         .read                           = native_apic_msr_read,
 222         .write                          = native_apic_msr_write,
 223         .eoi_write                      = native_apic_msr_eoi_write,
 224         .icr_read                       = native_x2apic_icr_read,
 225         .icr_write                      = native_x2apic_icr_write,
 226         .wait_icr_idle                  = native_x2apic_wait_icr_idle,
 227         .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
 228 };
 229
 230 apic_driver(apic_x2apic_cluster);