arch/x86/kernel/apic/x2apic_cluster.c

   1 #include <linux/threads.h>
   2 #include <linux/cpumask.h>
   3 #include <linux/string.h>
   4 #include <linux/kernel.h>
   5 #include <linux/ctype.h>
   6 #include <linux/dmar.h>
   7 #include <linux/cpu.h>
   8
   9 #include <asm/smp.h>
  10 #include <asm/x2apic.h>
  11
  12 static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
  13 static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
  14 static DEFINE_PER_CPU(cpumask_var_t, ipi_mask);
  15
  16 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  17 {
  18         return x2apic_enabled();
  19 }
  20
  21 static inline u32 x2apic_cluster(int cpu)
  22 {
  23         return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
  24 }
  25
  26 static void
  27 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
  28 {
  29         struct cpumask *cpus_in_cluster_ptr;
  30         struct cpumask *ipi_mask_ptr;
  31         unsigned int cpu, this_cpu;
  32         unsigned long flags;
  33         u32 dest;
  34
  35         /* x2apic MSRs are special and need a special fence: */
  36         weak_wrmsr_fence();
  37
  38         local_irq_save(flags);
  39
  40         this_cpu = smp_processor_id();
  41
  42         /*
  43          * We are to modify mask, so we need an own copy
  44          * and be sure it's manipulated with irq off.
  45          */
  46         ipi_mask_ptr = this_cpu_cpumask_var_ptr(ipi_mask);
  47         cpumask_copy(ipi_mask_ptr, mask);
  48
  49         /*
  50          * The idea is to send one IPI per cluster.
  51          */
  52         for_each_cpu(cpu, ipi_mask_ptr) {
  53                 unsigned long i;
  54
  55                 cpus_in_cluster_ptr = per_cpu(cpus_in_cluster, cpu);
  56                 dest = 0;
  57
  58                 /* Collect cpus in cluster. */
  59                 for_each_cpu_and(i, ipi_mask_ptr, cpus_in_cluster_ptr) {
  60                         if (apic_dest == APIC_DEST_ALLINC || i != this_cpu)
  61                                 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
  62                 }
  63
  64                 if (!dest)
  65                         continue;
  66
  67                 __x2apic_send_IPI_dest(dest, vector, apic->dest_logical);
  68                 /*
  69                  * Cluster sibling cpus should be discared now so
  70                  * we would not send IPI them second time.
  71                  */
  72                 cpumask_andnot(ipi_mask_ptr, ipi_mask_ptr, cpus_in_cluster_ptr);
  73         }
  74
  75         local_irq_restore(flags);
  76 }
  77
  78 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  79 {
  80         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
  81 }
  82
  83 static void
  84 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
  85 {
  86         __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
  87 }
  88
  89 static void x2apic_send_IPI_allbutself(int vector)
  90 {
  91         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
  92 }
  93
  94 static void x2apic_send_IPI_all(int vector)
  95 {
  96         __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
  97 }
  98
  99 static int
 100 x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 101                               const struct cpumask *andmask,
 102                               unsigned int *apicid)
 103 {
 104         u32 dest = 0;
 105         u16 cluster;
 106         int i;
 107
 108         for_each_cpu_and(i, cpumask, andmask) {
 109                 if (!cpumask_test_cpu(i, cpu_online_mask))
 110                         continue;
 111                 dest = per_cpu(x86_cpu_to_logical_apicid, i);
 112                 cluster = x2apic_cluster(i);
 113                 break;
 114         }
 115
 116         if (!dest)
 117                 return -EINVAL;
 118
 119         for_each_cpu_and(i, cpumask, andmask) {
 120                 if (!cpumask_test_cpu(i, cpu_online_mask))
 121                         continue;
 122                 if (cluster != x2apic_cluster(i))
 123                         continue;
 124                 dest |= per_cpu(x86_cpu_to_logical_apicid, i);
 125         }
 126
 127         *apicid = dest;
 128
 129         return 0;
 130 }
 131
 132 static void init_x2apic_ldr(void)
 133 {
 134         unsigned int this_cpu = smp_processor_id();
 135         unsigned int cpu;
 136
 137         per_cpu(x86_cpu_to_logical_apicid, this_cpu) = apic_read(APIC_LDR);
 138
 139         cpumask_set_cpu(this_cpu, per_cpu(cpus_in_cluster, this_cpu));
 140         for_each_online_cpu(cpu) {
 141                 if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
 142                         continue;
 143                 cpumask_set_cpu(this_cpu, per_cpu(cpus_in_cluster, cpu));
 144                 cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, this_cpu));
 145         }
 146 }
 147
 148  /*
 149   * At CPU state changes, update the x2apic cluster sibling info.
 150   */
 151 static int
 152 update_clusterinfo(struct notifier_block *nfb, unsigned long action, void *hcpu)
 153 {
 154         unsigned int this_cpu = (unsigned long)hcpu;
 155         unsigned int cpu;
 156         int err = 0;
 157
 158         switch (action) {
 159         case CPU_UP_PREPARE:
 160                 if (!zalloc_cpumask_var(&per_cpu(cpus_in_cluster, this_cpu),
 161                                         GFP_KERNEL)) {
 162                         err = -ENOMEM;
 163                 } else if (!zalloc_cpumask_var(&per_cpu(ipi_mask, this_cpu),
 164                                                GFP_KERNEL)) {
 165                         free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
 166                         err = -ENOMEM;
 167                 }
 168                 break;
 169         case CPU_UP_CANCELED:
 170         case CPU_UP_CANCELED_FROZEN:
 171         case CPU_DEAD:
 172                 for_each_online_cpu(cpu) {
 173                         if (x2apic_cluster(this_cpu) != x2apic_cluster(cpu))
 174                                 continue;
 175                         cpumask_clear_cpu(this_cpu, per_cpu(cpus_in_cluster, cpu));
 176                         cpumask_clear_cpu(cpu, per_cpu(cpus_in_cluster, this_cpu));
 177                 }
 178                 free_cpumask_var(per_cpu(cpus_in_cluster, this_cpu));
 179                 free_cpumask_var(per_cpu(ipi_mask, this_cpu));
 180                 break;
 181         }
 182
 183         return notifier_from_errno(err);
 184 }
 185
 186 static struct notifier_block x2apic_cpu_notifier = {
 187         .notifier_call = update_clusterinfo,
 188 };
 189
 190 static int x2apic_init_cpu_notifier(void)
 191 {
 192         int cpu = smp_processor_id();
 193
 194         zalloc_cpumask_var(&per_cpu(cpus_in_cluster, cpu), GFP_KERNEL);
 195         zalloc_cpumask_var(&per_cpu(ipi_mask, cpu), GFP_KERNEL);
 196
 197         BUG_ON(!per_cpu(cpus_in_cluster, cpu) || !per_cpu(ipi_mask, cpu));
 198
 199         cpumask_set_cpu(cpu, per_cpu(cpus_in_cluster, cpu));
 200         register_hotcpu_notifier(&x2apic_cpu_notifier);
 201         return 1;
 202 }
 203
 204 static int x2apic_cluster_probe(void)
 205 {
 206         if (x2apic_mode)
 207                 return x2apic_init_cpu_notifier();
 208         else
 209                 return 0;
 210 }
 211
 212 static const struct cpumask *x2apic_cluster_target_cpus(void)
 213 {
 214         return cpu_all_mask;
 215 }
 216
 217 /*
 218  * Each x2apic cluster is an allocation domain.
 219  */
 220 static void cluster_vector_allocation_domain(int cpu, struct cpumask *retmask,
 221                                              const struct cpumask *mask)
 222 {
 223         /*
 224          * To minimize vector pressure, default case of boot, device bringup
 225          * etc will use a single cpu for the interrupt destination.
 226          *
 227          * On explicit migration requests coming from irqbalance etc,
 228          * interrupts will be routed to the x2apic cluster (cluster-id
 229          * derived from the first cpu in the mask) members specified
 230          * in the mask.
 231          */
 232         if (mask == x2apic_cluster_target_cpus())
 233                 cpumask_copy(retmask, cpumask_of(cpu));
 234         else
 235                 cpumask_and(retmask, mask, per_cpu(cpus_in_cluster, cpu));
 236 }
 237
 238 static struct apic apic_x2apic_cluster = {
 239
 240         .name                           = "cluster x2apic",
 241         .probe                          = x2apic_cluster_probe,
 242         .acpi_madt_oem_check            = x2apic_acpi_madt_oem_check,
 243         .apic_id_valid                  = x2apic_apic_id_valid,
 244         .apic_id_registered             = x2apic_apic_id_registered,
 245
 246         .irq_delivery_mode              = dest_LowestPrio,
 247         .irq_dest_mode                  = 1, /* logical */
 248
 249         .target_cpus                    = x2apic_cluster_target_cpus,
 250         .disable_esr                    = 0,
 251         .dest_logical                   = APIC_DEST_LOGICAL,
 252         .check_apicid_used              = NULL,
 253
 254         .vector_allocation_domain       = cluster_vector_allocation_domain,
 255         .init_apic_ldr                  = init_x2apic_ldr,
 256
 257         .ioapic_phys_id_map             = NULL,
 258         .setup_apic_routing             = NULL,
 259         .cpu_present_to_apicid          = default_cpu_present_to_apicid,
 260         .apicid_to_cpu_present          = NULL,
 261         .check_phys_apicid_present      = default_check_phys_apicid_present,
 262         .phys_pkg_id                    = x2apic_phys_pkg_id,
 263
 264         .get_apic_id                    = x2apic_get_apic_id,
 265         .set_apic_id                    = x2apic_set_apic_id,
 266         .apic_id_mask                   = 0xFFFFFFFFu,
 267
 268         .cpu_mask_to_apicid_and         = x2apic_cpu_mask_to_apicid_and,
 269
 270         .send_IPI_mask                  = x2apic_send_IPI_mask,
 271         .send_IPI_mask_allbutself       = x2apic_send_IPI_mask_allbutself,
 272         .send_IPI_allbutself            = x2apic_send_IPI_allbutself,
 273         .send_IPI_all                   = x2apic_send_IPI_all,
 274         .send_IPI_self                  = x2apic_send_IPI_self,
 275
 276         .inquire_remote_apic            = NULL,
 277
 278         .read                           = native_apic_msr_read,
 279         .write                          = native_apic_msr_write,
 280         .eoi_write                      = native_apic_msr_eoi_write,
 281         .icr_read                       = native_x2apic_icr_read,
 282         .icr_write                      = native_x2apic_icr_write,
 283         .wait_icr_idle                  = native_x2apic_wait_icr_idle,
 284         .safe_wait_icr_idle             = native_safe_x2apic_wait_icr_idle,
 285 };
 286
 287 apic_driver(apic_x2apic_cluster);