arch/x86/kvm/ioapic.c

   1 /*
   2  *  Copyright (C) 2001  MandrakeSoft S.A.
   3  *  Copyright 2010 Red Hat, Inc. and/or its affiliates.
   4  *
   5  *    MandrakeSoft S.A.
   6  *    43, rue d'Aboukir
   7  *    75002 Paris - France
   8  *    http://www.linux-mandrake.com/
   9  *    http://www.mandrakesoft.com/
  10  *
  11  *  This library is free software; you can redistribute it and/or
  12  *  modify it under the terms of the GNU Lesser General Public
  13  *  License as published by the Free Software Foundation; either
  14  *  version 2 of the License, or (at your option) any later version.
  15  *
  16  *  This library is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  19  *  Lesser General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU Lesser General Public
  22  *  License along with this library; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  24  *
  25  *  Yunhong Jiang <yunhong.jiang@intel.com>
  26  *  Yaozu (Eddie) Dong <eddie.dong@intel.com>
  27  *  Based on Xen 3.1 code.
  28  */
  29
  30 #include <linux/kvm_host.h>
  31 #include <linux/kvm.h>
  32 #include <linux/mm.h>
  33 #include <linux/highmem.h>
  34 #include <linux/smp.h>
  35 #include <linux/hrtimer.h>
  36 #include <linux/io.h>
  37 #include <linux/slab.h>
  38 #include <linux/export.h>
  39 #include <linux/nospec.h>
  40 #include <asm/processor.h>
  41 #include <asm/page.h>
  42 #include <asm/current.h>
  43 #include <trace/events/kvm.h>
  44
  45 #include "ioapic.h"
  46 #include "lapic.h"
  47 #include "irq.h"
  48
  49 #if 0
  50 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
  51 #else
  52 #define ioapic_debug(fmt, arg...)
  53 #endif
  54 static int ioapic_service(struct kvm_ioapic *vioapic, int irq,
  55                 bool line_status);
  56
  57 static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic,
  58                                           unsigned long addr,
  59                                           unsigned long length)
  60 {
  61         unsigned long result = 0;
  62
  63         switch (ioapic->ioregsel) {
  64         case IOAPIC_REG_VERSION:
  65                 result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16)
  66                           | (IOAPIC_VERSION_ID & 0xff));
  67                 break;
  68
  69         case IOAPIC_REG_APIC_ID:
  70         case IOAPIC_REG_ARB_ID:
  71                 result = ((ioapic->id & 0xf) << 24);
  72                 break;
  73
  74         default:
  75                 {
  76                         u32 redir_index = (ioapic->ioregsel - 0x10) >> 1;
  77                         u64 redir_content = ~0ULL;
  78
  79                         if (redir_index < IOAPIC_NUM_PINS) {
  80                                 u32 index = array_index_nospec(
  81                                         redir_index, IOAPIC_NUM_PINS);
  82
  83                                 redir_content = ioapic->redirtbl[index].bits;
  84                         }
  85
  86                         result = (ioapic->ioregsel & 0x1) ?
  87                             (redir_content >> 32) & 0xffffffff :
  88                             redir_content & 0xffffffff;
  89                         break;
  90                 }
  91         }
  92
  93         return result;
  94 }
  95
  96 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic *ioapic)
  97 {
  98         ioapic->rtc_status.pending_eoi = 0;
  99         bitmap_zero(ioapic->rtc_status.dest_map.map, KVM_MAX_VCPU_ID);
 100 }
 101
 102 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic);
 103
 104 static void rtc_status_pending_eoi_check_valid(struct kvm_ioapic *ioapic)
 105 {
 106         if (WARN_ON(ioapic->rtc_status.pending_eoi < 0))
 107                 kvm_rtc_eoi_tracking_restore_all(ioapic);
 108 }
 109
 110 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 111 {
 112         bool new_val, old_val;
 113         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 114         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 115         union kvm_ioapic_redirect_entry *e;
 116
 117         e = &ioapic->redirtbl[RTC_GSI];
 118         if (!kvm_apic_match_dest(vcpu, NULL, 0, e->fields.dest_id,
 119                                 e->fields.dest_mode))
 120                 return;
 121
 122         new_val = kvm_apic_pending_eoi(vcpu, e->fields.vector);
 123         old_val = test_bit(vcpu->vcpu_id, dest_map->map);
 124
 125         if (new_val == old_val)
 126                 return;
 127
 128         if (new_val) {
 129                 __set_bit(vcpu->vcpu_id, dest_map->map);
 130                 dest_map->vectors[vcpu->vcpu_id] = e->fields.vector;
 131                 ioapic->rtc_status.pending_eoi++;
 132         } else {
 133                 __clear_bit(vcpu->vcpu_id, dest_map->map);
 134                 ioapic->rtc_status.pending_eoi--;
 135                 rtc_status_pending_eoi_check_valid(ioapic);
 136         }
 137 }
 138
 139 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu)
 140 {
 141         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 142
 143         spin_lock(&ioapic->lock);
 144         __rtc_irq_eoi_tracking_restore_one(vcpu);
 145         spin_unlock(&ioapic->lock);
 146 }
 147
 148 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic *ioapic)
 149 {
 150         struct kvm_vcpu *vcpu;
 151         int i;
 152
 153         if (RTC_GSI >= IOAPIC_NUM_PINS)
 154                 return;
 155
 156         rtc_irq_eoi_tracking_reset(ioapic);
 157         kvm_for_each_vcpu(i, vcpu, ioapic->kvm)
 158             __rtc_irq_eoi_tracking_restore_one(vcpu);
 159 }
 160
 161 static void rtc_irq_eoi(struct kvm_ioapic *ioapic, struct kvm_vcpu *vcpu)
 162 {
 163         if (test_and_clear_bit(vcpu->vcpu_id,
 164                                ioapic->rtc_status.dest_map.map)) {
 165                 --ioapic->rtc_status.pending_eoi;
 166                 rtc_status_pending_eoi_check_valid(ioapic);
 167         }
 168 }
 169
 170 static bool rtc_irq_check_coalesced(struct kvm_ioapic *ioapic)
 171 {
 172         if (ioapic->rtc_status.pending_eoi > 0)
 173                 return true; /* coalesced */
 174
 175         return false;
 176 }
 177
 178 static int ioapic_set_irq(struct kvm_ioapic *ioapic, unsigned int irq,
 179                 int irq_level, bool line_status)
 180 {
 181         union kvm_ioapic_redirect_entry entry;
 182         u32 mask = 1 << irq;
 183         u32 old_irr;
 184         int edge, ret;
 185
 186         entry = ioapic->redirtbl[irq];
 187         edge = (entry.fields.trig_mode == IOAPIC_EDGE_TRIG);
 188
 189         if (!irq_level) {
 190                 ioapic->irr &= ~mask;
 191                 ret = 1;
 192                 goto out;
 193         }
 194
 195         /*
 196          * Return 0 for coalesced interrupts; for edge-triggered interrupts,
 197          * this only happens if a previous edge has not been delivered due
 198          * do masking.  For level interrupts, the remote_irr field tells
 199          * us if the interrupt is waiting for an EOI.
 200          *
 201          * RTC is special: it is edge-triggered, but userspace likes to know
 202          * if it has been already ack-ed via EOI because coalesced RTC
 203          * interrupts lead to time drift in Windows guests.  So we track
 204          * EOI manually for the RTC interrupt.
 205          */
 206         if (irq == RTC_GSI && line_status &&
 207                 rtc_irq_check_coalesced(ioapic)) {
 208                 ret = 0;
 209                 goto out;
 210         }
 211
 212         old_irr = ioapic->irr;
 213         ioapic->irr |= mask;
 214         if (edge) {
 215                 ioapic->irr_delivered &= ~mask;
 216                 if (old_irr == ioapic->irr) {
 217                         ret = 0;
 218                         goto out;
 219                 }
 220         }
 221
 222         ret = ioapic_service(ioapic, irq, line_status);
 223
 224 out:
 225         trace_kvm_ioapic_set_irq(entry.bits, irq, ret == 0);
 226         return ret;
 227 }
 228
 229 static void kvm_ioapic_inject_all(struct kvm_ioapic *ioapic, unsigned long irr)
 230 {
 231         u32 idx;
 232
 233         rtc_irq_eoi_tracking_reset(ioapic);
 234         for_each_set_bit(idx, &irr, IOAPIC_NUM_PINS)
 235                 ioapic_set_irq(ioapic, idx, 1, true);
 236
 237         kvm_rtc_eoi_tracking_restore_all(ioapic);
 238 }
 239
 240
 241 void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, ulong *ioapic_handled_vectors)
 242 {
 243         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 244         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 245         union kvm_ioapic_redirect_entry *e;
 246         int index;
 247
 248         spin_lock(&ioapic->lock);
 249
 250         /* Make sure we see any missing RTC EOI */
 251         if (test_bit(vcpu->vcpu_id, dest_map->map))
 252                 __set_bit(dest_map->vectors[vcpu->vcpu_id],
 253                           ioapic_handled_vectors);
 254
 255         for (index = 0; index < IOAPIC_NUM_PINS; index++) {
 256                 e = &ioapic->redirtbl[index];
 257                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG ||
 258                     kvm_irq_has_notifier(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index) ||
 259                     index == RTC_GSI) {
 260                         if (kvm_apic_match_dest(vcpu, NULL, 0,
 261                                      e->fields.dest_id, e->fields.dest_mode) ||
 262                             kvm_apic_pending_eoi(vcpu, e->fields.vector))
 263                                 __set_bit(e->fields.vector,
 264                                           ioapic_handled_vectors);
 265                 }
 266         }
 267         spin_unlock(&ioapic->lock);
 268 }
 269
 270 void kvm_arch_post_irq_ack_notifier_list_update(struct kvm *kvm)
 271 {
 272         if (!ioapic_in_kernel(kvm))
 273                 return;
 274         kvm_make_scan_ioapic_request(kvm);
 275 }
 276
 277 static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val)
 278 {
 279         unsigned index;
 280         bool mask_before, mask_after;
 281         int old_remote_irr, old_delivery_status;
 282         union kvm_ioapic_redirect_entry *e;
 283
 284         switch (ioapic->ioregsel) {
 285         case IOAPIC_REG_VERSION:
 286                 /* Writes are ignored. */
 287                 break;
 288
 289         case IOAPIC_REG_APIC_ID:
 290                 ioapic->id = (val >> 24) & 0xf;
 291                 break;
 292
 293         case IOAPIC_REG_ARB_ID:
 294                 break;
 295
 296         default:
 297                 index = (ioapic->ioregsel - 0x10) >> 1;
 298
 299                 ioapic_debug("change redir index %x val %x\n", index, val);
 300                 if (index >= IOAPIC_NUM_PINS)
 301                         return;
 302                 index = array_index_nospec(index, IOAPIC_NUM_PINS);
 303                 e = &ioapic->redirtbl[index];
 304                 mask_before = e->fields.mask;
 305                 /* Preserve read-only fields */
 306                 old_remote_irr = e->fields.remote_irr;
 307                 old_delivery_status = e->fields.delivery_status;
 308                 if (ioapic->ioregsel & 1) {
 309                         e->bits &= 0xffffffff;
 310                         e->bits |= (u64) val << 32;
 311                 } else {
 312                         e->bits &= ~0xffffffffULL;
 313                         e->bits |= (u32) val;
 314                 }
 315                 e->fields.remote_irr = old_remote_irr;
 316                 e->fields.delivery_status = old_delivery_status;
 317
 318                 /*
 319                  * Some OSes (Linux, Xen) assume that Remote IRR bit will
 320                  * be cleared by IOAPIC hardware when the entry is configured
 321                  * as edge-triggered. This behavior is used to simulate an
 322                  * explicit EOI on IOAPICs that don't have the EOI register.
 323                  */
 324                 if (e->fields.trig_mode == IOAPIC_EDGE_TRIG)
 325                         e->fields.remote_irr = 0;
 326
 327                 mask_after = e->fields.mask;
 328                 if (mask_before != mask_after)
 329                         kvm_fire_mask_notifiers(ioapic->kvm, KVM_IRQCHIP_IOAPIC, index, mask_after);
 330                 if (e->fields.trig_mode == IOAPIC_LEVEL_TRIG
 331                     && ioapic->irr & (1 << index))
 332                         ioapic_service(ioapic, index, false);
 333                 kvm_make_scan_ioapic_request(ioapic->kvm);
 334                 break;
 335         }
 336 }
 337
 338 static int ioapic_service(struct kvm_ioapic *ioapic, int irq, bool line_status)
 339 {
 340         union kvm_ioapic_redirect_entry *entry = &ioapic->redirtbl[irq];
 341         struct kvm_lapic_irq irqe;
 342         int ret;
 343
 344         if (entry->fields.mask ||
 345             (entry->fields.trig_mode == IOAPIC_LEVEL_TRIG &&
 346             entry->fields.remote_irr))
 347                 return -1;
 348
 349         ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
 350                      "vector=%x trig_mode=%x\n",
 351                      entry->fields.dest_id, entry->fields.dest_mode,
 352                      entry->fields.delivery_mode, entry->fields.vector,
 353                      entry->fields.trig_mode);
 354
 355         irqe.dest_id = entry->fields.dest_id;
 356         irqe.vector = entry->fields.vector;
 357         irqe.dest_mode = entry->fields.dest_mode;
 358         irqe.trig_mode = entry->fields.trig_mode;
 359         irqe.delivery_mode = entry->fields.delivery_mode << 8;
 360         irqe.level = 1;
 361         irqe.shorthand = 0;
 362         irqe.msi_redir_hint = false;
 363
 364         if (irqe.trig_mode == IOAPIC_EDGE_TRIG)
 365                 ioapic->irr_delivered |= 1 << irq;
 366
 367         if (irq == RTC_GSI && line_status) {
 368                 /*
 369                  * pending_eoi cannot ever become negative (see
 370                  * rtc_status_pending_eoi_check_valid) and the caller
 371                  * ensures that it is only called if it is >= zero, namely
 372                  * if rtc_irq_check_coalesced returns false).
 373                  */
 374                 BUG_ON(ioapic->rtc_status.pending_eoi != 0);
 375                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe,
 376                                                &ioapic->rtc_status.dest_map);
 377                 ioapic->rtc_status.pending_eoi = (ret < 0 ? 0 : ret);
 378         } else
 379                 ret = kvm_irq_delivery_to_apic(ioapic->kvm, NULL, &irqe, NULL);
 380
 381         if (ret && irqe.trig_mode == IOAPIC_LEVEL_TRIG)
 382                 entry->fields.remote_irr = 1;
 383
 384         return ret;
 385 }
 386
 387 int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
 388                        int level, bool line_status)
 389 {
 390         int ret, irq_level;
 391
 392         BUG_ON(irq < 0 || irq >= IOAPIC_NUM_PINS);
 393
 394         spin_lock(&ioapic->lock);
 395         irq_level = __kvm_irq_line_state(&ioapic->irq_states[irq],
 396                                          irq_source_id, level);
 397         ret = ioapic_set_irq(ioapic, irq, irq_level, line_status);
 398
 399         spin_unlock(&ioapic->lock);
 400
 401         return ret;
 402 }
 403
 404 void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id)
 405 {
 406         int i;
 407
 408         spin_lock(&ioapic->lock);
 409         for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++)
 410                 __clear_bit(irq_source_id, &ioapic->irq_states[i]);
 411         spin_unlock(&ioapic->lock);
 412 }
 413
 414 static void kvm_ioapic_eoi_inject_work(struct work_struct *work)
 415 {
 416         int i;
 417         struct kvm_ioapic *ioapic = container_of(work, struct kvm_ioapic,
 418                                                  eoi_inject.work);
 419         spin_lock(&ioapic->lock);
 420         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 421                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 422
 423                 if (ent->fields.trig_mode != IOAPIC_LEVEL_TRIG)
 424                         continue;
 425
 426                 if (ioapic->irr & (1 << i) && !ent->fields.remote_irr)
 427                         ioapic_service(ioapic, i, false);
 428         }
 429         spin_unlock(&ioapic->lock);
 430 }
 431
 432 #define IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT 10000
 433
 434 static void __kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu,
 435                         struct kvm_ioapic *ioapic, int vector, int trigger_mode)
 436 {
 437         struct dest_map *dest_map = &ioapic->rtc_status.dest_map;
 438         struct kvm_lapic *apic = vcpu->arch.apic;
 439         int i;
 440
 441         /* RTC special handling */
 442         if (test_bit(vcpu->vcpu_id, dest_map->map) &&
 443             vector == dest_map->vectors[vcpu->vcpu_id])
 444                 rtc_irq_eoi(ioapic, vcpu);
 445
 446         for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 447                 union kvm_ioapic_redirect_entry *ent = &ioapic->redirtbl[i];
 448
 449                 if (ent->fields.vector != vector)
 450                         continue;
 451
 452                 /*
 453                  * We are dropping lock while calling ack notifiers because ack
 454                  * notifier callbacks for assigned devices call into IOAPIC
 455                  * recursively. Since remote_irr is cleared only after call
 456                  * to notifiers if the same vector will be delivered while lock
 457                  * is dropped it will be put into irr and will be delivered
 458                  * after ack notifier returns.
 459                  */
 460                 spin_unlock(&ioapic->lock);
 461                 kvm_notify_acked_irq(ioapic->kvm, KVM_IRQCHIP_IOAPIC, i);
 462                 spin_lock(&ioapic->lock);
 463
 464                 if (trigger_mode != IOAPIC_LEVEL_TRIG ||
 465                     kvm_lapic_get_reg(apic, APIC_SPIV) & APIC_SPIV_DIRECTED_EOI)
 466                         continue;
 467
 468                 ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
 469                 ent->fields.remote_irr = 0;
 470                 if (!ent->fields.mask && (ioapic->irr & (1 << i))) {
 471                         ++ioapic->irq_eoi[i];
 472                         if (ioapic->irq_eoi[i] == IOAPIC_SUCCESSIVE_IRQ_MAX_COUNT) {
 473                                 /*
 474                                  * Real hardware does not deliver the interrupt
 475                                  * immediately during eoi broadcast, and this
 476                                  * lets a buggy guest make slow progress
 477                                  * even if it does not correctly handle a
 478                                  * level-triggered interrupt.  Emulate this
 479                                  * behavior if we detect an interrupt storm.
 480                                  */
 481                                 schedule_delayed_work(&ioapic->eoi_inject, HZ / 100);
 482                                 ioapic->irq_eoi[i] = 0;
 483                                 trace_kvm_ioapic_delayed_eoi_inj(ent->bits);
 484                         } else {
 485                                 ioapic_service(ioapic, i, false);
 486                         }
 487                 } else {
 488                         ioapic->irq_eoi[i] = 0;
 489                 }
 490         }
 491 }
 492
 493 void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector, int trigger_mode)
 494 {
 495         struct kvm_ioapic *ioapic = vcpu->kvm->arch.vioapic;
 496
 497         spin_lock(&ioapic->lock);
 498         __kvm_ioapic_update_eoi(vcpu, ioapic, vector, trigger_mode);
 499         spin_unlock(&ioapic->lock);
 500 }
 501
 502 static inline struct kvm_ioapic *to_ioapic(struct kvm_io_device *dev)
 503 {
 504         return container_of(dev, struct kvm_ioapic, dev);
 505 }
 506
 507 static inline int ioapic_in_range(struct kvm_ioapic *ioapic, gpa_t addr)
 508 {
 509         return ((addr >= ioapic->base_address &&
 510                  (addr < ioapic->base_address + IOAPIC_MEM_LENGTH)));
 511 }
 512
 513 static int ioapic_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 514                                 gpa_t addr, int len, void *val)
 515 {
 516         struct kvm_ioapic *ioapic = to_ioapic(this);
 517         u32 result;
 518         if (!ioapic_in_range(ioapic, addr))
 519                 return -EOPNOTSUPP;
 520
 521         ioapic_debug("addr %lx\n", (unsigned long)addr);
 522         ASSERT(!(addr & 0xf));  /* check alignment */
 523
 524         addr &= 0xff;
 525         spin_lock(&ioapic->lock);
 526         switch (addr) {
 527         case IOAPIC_REG_SELECT:
 528                 result = ioapic->ioregsel;
 529                 break;
 530
 531         case IOAPIC_REG_WINDOW:
 532                 result = ioapic_read_indirect(ioapic, addr, len);
 533                 break;
 534
 535         default:
 536                 result = 0;
 537                 break;
 538         }
 539         spin_unlock(&ioapic->lock);
 540
 541         switch (len) {
 542         case 8:
 543                 *(u64 *) val = result;
 544                 break;
 545         case 1:
 546         case 2:
 547         case 4:
 548                 memcpy(val, (char *)&result, len);
 549                 break;
 550         default:
 551                 printk(KERN_WARNING "ioapic: wrong length %d\n", len);
 552         }
 553         return 0;
 554 }
 555
 556 static int ioapic_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *this,
 557                                  gpa_t addr, int len, const void *val)
 558 {
 559         struct kvm_ioapic *ioapic = to_ioapic(this);
 560         u32 data;
 561         if (!ioapic_in_range(ioapic, addr))
 562                 return -EOPNOTSUPP;
 563
 564         ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
 565                      (void*)addr, len, val);
 566         ASSERT(!(addr & 0xf));  /* check alignment */
 567
 568         switch (len) {
 569         case 8:
 570         case 4:
 571                 data = *(u32 *) val;
 572                 break;
 573         case 2:
 574                 data = *(u16 *) val;
 575                 break;
 576         case 1:
 577                 data = *(u8  *) val;
 578                 break;
 579         default:
 580                 printk(KERN_WARNING "ioapic: Unsupported size %d\n", len);
 581                 return 0;
 582         }
 583
 584         addr &= 0xff;
 585         spin_lock(&ioapic->lock);
 586         switch (addr) {
 587         case IOAPIC_REG_SELECT:
 588                 ioapic->ioregsel = data & 0xFF; /* 8-bit register */
 589                 break;
 590
 591         case IOAPIC_REG_WINDOW:
 592                 ioapic_write_indirect(ioapic, data);
 593                 break;
 594
 595         default:
 596                 break;
 597         }
 598         spin_unlock(&ioapic->lock);
 599         return 0;
 600 }
 601
 602 static void kvm_ioapic_reset(struct kvm_ioapic *ioapic)
 603 {
 604         int i;
 605
 606         cancel_delayed_work_sync(&ioapic->eoi_inject);
 607         for (i = 0; i < IOAPIC_NUM_PINS; i++)
 608                 ioapic->redirtbl[i].fields.mask = 1;
 609         ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS;
 610         ioapic->ioregsel = 0;
 611         ioapic->irr = 0;
 612         ioapic->irr_delivered = 0;
 613         ioapic->id = 0;
 614         memset(ioapic->irq_eoi, 0x00, sizeof(ioapic->irq_eoi));
 615         rtc_irq_eoi_tracking_reset(ioapic);
 616 }
 617
 618 static const struct kvm_io_device_ops ioapic_mmio_ops = {
 619         .read     = ioapic_mmio_read,
 620         .write    = ioapic_mmio_write,
 621 };
 622
 623 int kvm_ioapic_init(struct kvm *kvm)
 624 {
 625         struct kvm_ioapic *ioapic;
 626         int ret;
 627
 628         ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL);
 629         if (!ioapic)
 630                 return -ENOMEM;
 631         spin_lock_init(&ioapic->lock);
 632         INIT_DELAYED_WORK(&ioapic->eoi_inject, kvm_ioapic_eoi_inject_work);
 633         kvm->arch.vioapic = ioapic;
 634         kvm_ioapic_reset(ioapic);
 635         kvm_iodevice_init(&ioapic->dev, &ioapic_mmio_ops);
 636         ioapic->kvm = kvm;
 637         mutex_lock(&kvm->slots_lock);
 638         ret = kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, ioapic->base_address,
 639                                       IOAPIC_MEM_LENGTH, &ioapic->dev);
 640         mutex_unlock(&kvm->slots_lock);
 641         if (ret < 0) {
 642                 kvm->arch.vioapic = NULL;
 643                 kfree(ioapic);
 644         }
 645
 646         return ret;
 647 }
 648
 649 void kvm_ioapic_destroy(struct kvm *kvm)
 650 {
 651         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 652
 653         if (!ioapic)
 654                 return;
 655
 656         cancel_delayed_work_sync(&ioapic->eoi_inject);
 657         mutex_lock(&kvm->slots_lock);
 658         kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &ioapic->dev);
 659         mutex_unlock(&kvm->slots_lock);
 660         kvm->arch.vioapic = NULL;
 661         kfree(ioapic);
 662 }
 663
 664 void kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 665 {
 666         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 667
 668         spin_lock(&ioapic->lock);
 669         memcpy(state, ioapic, sizeof(struct kvm_ioapic_state));
 670         state->irr &= ~ioapic->irr_delivered;
 671         spin_unlock(&ioapic->lock);
 672 }
 673
 674 void kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state)
 675 {
 676         struct kvm_ioapic *ioapic = kvm->arch.vioapic;
 677
 678         spin_lock(&ioapic->lock);
 679         memcpy(ioapic, state, sizeof(struct kvm_ioapic_state));
 680         ioapic->irr = 0;
 681         ioapic->irr_delivered = 0;
 682         kvm_make_scan_ioapic_request(kvm);
 683         kvm_ioapic_inject_all(ioapic, state->irr);
 684         spin_unlock(&ioapic->lock);
 685 }