arch/x86/net/bpf_jit_comp.c

   1 /* bpf_jit_comp.c : BPF JIT compiler
   2  *
   3  * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
   4  * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; version 2
   9  * of the License.
  10  */
  11 #include <linux/netdevice.h>
  12 #include <linux/filter.h>
  13 #include <linux/if_vlan.h>
  14 #include <asm/cacheflush.h>
  15 #include <asm/nospec-branch.h>
  16 #include <linux/bpf.h>
  17
  18 int bpf_jit_enable __read_mostly;
  19
  20 /*
  21  * assembly code in arch/x86/net/bpf_jit.S
  22  */
  23 extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  24 extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  25 extern u8 sk_load_byte_positive_offset[];
  26 extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  27 extern u8 sk_load_byte_negative_offset[];
  28
  29 static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  30 {
  31         if (len == 1)
  32                 *ptr = bytes;
  33         else if (len == 2)
  34                 *(u16 *)ptr = bytes;
  35         else {
  36                 *(u32 *)ptr = bytes;
  37                 barrier();
  38         }
  39         return ptr + len;
  40 }
  41
  42 #define EMIT(bytes, len) \
  43         do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  44
  45 #define EMIT1(b1)               EMIT(b1, 1)
  46 #define EMIT2(b1, b2)           EMIT((b1) + ((b2) << 8), 2)
  47 #define EMIT3(b1, b2, b3)       EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  48 #define EMIT4(b1, b2, b3, b4)   EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  49 #define EMIT1_off32(b1, off) \
  50         do {EMIT1(b1); EMIT(off, 4); } while (0)
  51 #define EMIT2_off32(b1, b2, off) \
  52         do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  53 #define EMIT3_off32(b1, b2, b3, off) \
  54         do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  55 #define EMIT4_off32(b1, b2, b3, b4, off) \
  56         do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  57
  58 static bool is_imm8(int value)
  59 {
  60         return value <= 127 && value >= -128;
  61 }
  62
  63 static bool is_simm32(s64 value)
  64 {
  65         return value == (s64) (s32) value;
  66 }
  67
  68 /* mov dst, src */
  69 #define EMIT_mov(DST, SRC) \
  70         do {if (DST != SRC) \
  71                 EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  72         } while (0)
  73
  74 static int bpf_size_to_x86_bytes(int bpf_size)
  75 {
  76         if (bpf_size == BPF_W)
  77                 return 4;
  78         else if (bpf_size == BPF_H)
  79                 return 2;
  80         else if (bpf_size == BPF_B)
  81                 return 1;
  82         else if (bpf_size == BPF_DW)
  83                 return 4; /* imm32 */
  84         else
  85                 return 0;
  86 }
  87
  88 /* list of x86 cond jumps opcodes (. + s8)
  89  * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  90  */
  91 #define X86_JB  0x72
  92 #define X86_JAE 0x73
  93 #define X86_JE  0x74
  94 #define X86_JNE 0x75
  95 #define X86_JBE 0x76
  96 #define X86_JA  0x77
  97 #define X86_JGE 0x7D
  98 #define X86_JG  0x7F
  99
 100 static void bpf_flush_icache(void *start, void *end)
 101 {
 102         mm_segment_t old_fs = get_fs();
 103
 104         set_fs(KERNEL_DS);
 105         smp_wmb();
 106         flush_icache_range((unsigned long)start, (unsigned long)end);
 107         set_fs(old_fs);
 108 }
 109
 110 #define CHOOSE_LOAD_FUNC(K, func) \
 111         ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
 112
 113 /* pick a register outside of BPF range for JIT internal work */
 114 #define AUX_REG (MAX_BPF_REG + 1)
 115
 116 /* the following table maps BPF registers to x64 registers.
 117  * x64 register r12 is unused, since if used as base address register
 118  * in load/store instructions, it always needs an extra byte of encoding
 119  */
 120 static const int reg2hex[] = {
 121         [BPF_REG_0] = 0,  /* rax */
 122         [BPF_REG_1] = 7,  /* rdi */
 123         [BPF_REG_2] = 6,  /* rsi */
 124         [BPF_REG_3] = 2,  /* rdx */
 125         [BPF_REG_4] = 1,  /* rcx */
 126         [BPF_REG_5] = 0,  /* r8 */
 127         [BPF_REG_6] = 3,  /* rbx callee saved */
 128         [BPF_REG_7] = 5,  /* r13 callee saved */
 129         [BPF_REG_8] = 6,  /* r14 callee saved */
 130         [BPF_REG_9] = 7,  /* r15 callee saved */
 131         [BPF_REG_FP] = 5, /* rbp readonly */
 132         [AUX_REG] = 3,    /* r11 temp register */
 133 };
 134
 135 /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
 136  * which need extra byte of encoding.
 137  * rax,rcx,...,rbp have simpler encoding
 138  */
 139 static bool is_ereg(u32 reg)
 140 {
 141         return (1 << reg) & (BIT(BPF_REG_5) |
 142                              BIT(AUX_REG) |
 143                              BIT(BPF_REG_7) |
 144                              BIT(BPF_REG_8) |
 145                              BIT(BPF_REG_9));
 146 }
 147
 148 /*
 149  * is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64
 150  * lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte
 151  * of encoding. al,cl,dl,bl have simpler encoding.
 152  */
 153 static bool is_ereg_8l(u32 reg)
 154 {
 155         return is_ereg(reg) ||
 156             (1 << reg) & (BIT(BPF_REG_1) |
 157                           BIT(BPF_REG_2) |
 158                           BIT(BPF_REG_FP));
 159 }
 160
 161 /* add modifiers if 'reg' maps to x64 registers r8..r15 */
 162 static u8 add_1mod(u8 byte, u32 reg)
 163 {
 164         if (is_ereg(reg))
 165                 byte |= 1;
 166         return byte;
 167 }
 168
 169 static u8 add_2mod(u8 byte, u32 r1, u32 r2)
 170 {
 171         if (is_ereg(r1))
 172                 byte |= 1;
 173         if (is_ereg(r2))
 174                 byte |= 4;
 175         return byte;
 176 }
 177
 178 /* encode 'dst_reg' register into x64 opcode 'byte' */
 179 static u8 add_1reg(u8 byte, u32 dst_reg)
 180 {
 181         return byte + reg2hex[dst_reg];
 182 }
 183
 184 /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
 185 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
 186 {
 187         return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
 188 }
 189
 190 static void jit_fill_hole(void *area, unsigned int size)
 191 {
 192         /* fill whole space with int3 instructions */
 193         memset(area, 0xcc, size);
 194 }
 195
 196 struct jit_context {
 197         int cleanup_addr; /* epilogue code offset */
 198         bool seen_ld_abs;
 199 };
 200
 201 /* maximum number of bytes emitted while JITing one eBPF insn */
 202 #define BPF_MAX_INSN_SIZE       128
 203 #define BPF_INSN_SAFETY         64
 204
 205 #define STACKSIZE \
 206         (MAX_BPF_STACK + \
 207          32 /* space for rbx, r13, r14, r15 */ + \
 208          8 /* space for skb_copy_bits() buffer */)
 209
 210 #define PROLOGUE_SIZE 51
 211
 212 /* emit x64 prologue code for BPF program and check it's size.
 213  * bpf_tail_call helper will skip it while jumping into another program
 214  */
 215 static void emit_prologue(u8 **pprog)
 216 {
 217         u8 *prog = *pprog;
 218         int cnt = 0;
 219
 220         EMIT1(0x55); /* push rbp */
 221         EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
 222
 223         /* sub rsp, STACKSIZE */
 224         EMIT3_off32(0x48, 0x81, 0xEC, STACKSIZE);
 225
 226         /* all classic BPF filters use R6(rbx) save it */
 227
 228         /* mov qword ptr [rbp-X],rbx */
 229         EMIT3_off32(0x48, 0x89, 0x9D, -STACKSIZE);
 230
 231         /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
 232          * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
 233          * R8(r14). R9(r15) spill could be made conditional, but there is only
 234          * one 'bpf_error' return path out of helper functions inside bpf_jit.S
 235          * The overhead of extra spill is negligible for any filter other
 236          * than synthetic ones. Therefore not worth adding complexity.
 237          */
 238
 239         /* mov qword ptr [rbp-X],r13 */
 240         EMIT3_off32(0x4C, 0x89, 0xAD, -STACKSIZE + 8);
 241         /* mov qword ptr [rbp-X],r14 */
 242         EMIT3_off32(0x4C, 0x89, 0xB5, -STACKSIZE + 16);
 243         /* mov qword ptr [rbp-X],r15 */
 244         EMIT3_off32(0x4C, 0x89, 0xBD, -STACKSIZE + 24);
 245
 246         /* clear A and X registers */
 247         EMIT2(0x31, 0xc0); /* xor eax, eax */
 248         EMIT3(0x4D, 0x31, 0xED); /* xor r13, r13 */
 249
 250         /* clear tail_cnt: mov qword ptr [rbp-X], rax */
 251         EMIT3_off32(0x48, 0x89, 0x85, -STACKSIZE + 32);
 252
 253         BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
 254         *pprog = prog;
 255 }
 256
 257 /* generate the following code:
 258  * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
 259  *   if (index >= array->map.max_entries)
 260  *     goto out;
 261  *   if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
 262  *     goto out;
 263  *   prog = array->ptrs[index];
 264  *   if (prog == NULL)
 265  *     goto out;
 266  *   goto *(prog->bpf_func + prologue_size);
 267  * out:
 268  */
 269 static void emit_bpf_tail_call(u8 **pprog)
 270 {
 271         u8 *prog = *pprog;
 272         int label1, label2, label3;
 273         int cnt = 0;
 274
 275         /* rdi - pointer to ctx
 276          * rsi - pointer to bpf_array
 277          * rdx - index in bpf_array
 278          */
 279
 280         /* if (index >= array->map.max_entries)
 281          *   goto out;
 282          */
 283         EMIT2(0x89, 0xD2);                        /* mov edx, edx */
 284         EMIT3(0x39, 0x56,                         /* cmp dword ptr [rsi + 16], edx */
 285               offsetof(struct bpf_array, map.max_entries));
 286 #define OFFSET1 (41 + RETPOLINE_RAX_BPF_JIT_SIZE) /* number of bytes to jump */
 287         EMIT2(X86_JBE, OFFSET1);                  /* jbe out */
 288         label1 = cnt;
 289
 290         /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
 291          *   goto out;
 292          */
 293         EMIT2_off32(0x8B, 0x85, -STACKSIZE + 36); /* mov eax, dword ptr [rbp - 516] */
 294         EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT);     /* cmp eax, MAX_TAIL_CALL_CNT */
 295 #define OFFSET2 (30 + RETPOLINE_RAX_BPF_JIT_SIZE)
 296         EMIT2(X86_JA, OFFSET2);                   /* ja out */
 297         label2 = cnt;
 298         EMIT3(0x83, 0xC0, 0x01);                  /* add eax, 1 */
 299         EMIT2_off32(0x89, 0x85, -STACKSIZE + 36); /* mov dword ptr [rbp - 516], eax */
 300
 301         /* prog = array->ptrs[index]; */
 302         EMIT4_off32(0x48, 0x8B, 0x84, 0xD6,       /* mov rax, [rsi + rdx * 8 + offsetof(...)] */
 303                     offsetof(struct bpf_array, ptrs));
 304
 305         /* if (prog == NULL)
 306          *   goto out;
 307          */
 308         EMIT3(0x48, 0x85, 0xC0);                  /* test rax,rax */
 309 #define OFFSET3 (8 + RETPOLINE_RAX_BPF_JIT_SIZE)
 310         EMIT2(X86_JE, OFFSET3);                   /* je out */
 311         label3 = cnt;
 312
 313         /* goto *(prog->bpf_func + prologue_size); */
 314         EMIT4(0x48, 0x8B, 0x40,                   /* mov rax, qword ptr [rax + 32] */
 315               offsetof(struct bpf_prog, bpf_func));
 316         EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE);   /* add rax, prologue_size */
 317
 318         /* now we're ready to jump into next BPF program
 319          * rdi == ctx (1st arg)
 320          * rax == prog->bpf_func + prologue_size
 321          */
 322         RETPOLINE_RAX_BPF_JIT();
 323
 324         /* out: */
 325         BUILD_BUG_ON(cnt - label1 != OFFSET1);
 326         BUILD_BUG_ON(cnt - label2 != OFFSET2);
 327         BUILD_BUG_ON(cnt - label3 != OFFSET3);
 328         *pprog = prog;
 329 }
 330
 331
 332 static void emit_load_skb_data_hlen(u8 **pprog)
 333 {
 334         u8 *prog = *pprog;
 335         int cnt = 0;
 336
 337         /* r9d = skb->len - skb->data_len (headlen)
 338          * r10 = skb->data
 339          */
 340         /* mov %r9d, off32(%rdi) */
 341         EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
 342
 343         /* sub %r9d, off32(%rdi) */
 344         EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
 345
 346         /* mov %r10, off32(%rdi) */
 347         EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
 348         *pprog = prog;
 349 }
 350
 351 static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
 352                   int oldproglen, struct jit_context *ctx)
 353 {
 354         struct bpf_insn *insn = bpf_prog->insnsi;
 355         int insn_cnt = bpf_prog->len;
 356         bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
 357         bool seen_exit = false;
 358         u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
 359         int i, cnt = 0;
 360         int proglen = 0;
 361         u8 *prog = temp;
 362
 363         emit_prologue(&prog);
 364
 365         if (seen_ld_abs)
 366                 emit_load_skb_data_hlen(&prog);
 367
 368         for (i = 0; i < insn_cnt; i++, insn++) {
 369                 const s32 imm32 = insn->imm;
 370                 u32 dst_reg = insn->dst_reg;
 371                 u32 src_reg = insn->src_reg;
 372                 u8 b1 = 0, b2 = 0, b3 = 0;
 373                 s64 jmp_offset;
 374                 u8 jmp_cond;
 375                 bool reload_skb_data;
 376                 int ilen;
 377                 u8 *func;
 378
 379                 switch (insn->code) {
 380                         /* ALU */
 381                 case BPF_ALU | BPF_ADD | BPF_X:
 382                 case BPF_ALU | BPF_SUB | BPF_X:
 383                 case BPF_ALU | BPF_AND | BPF_X:
 384                 case BPF_ALU | BPF_OR | BPF_X:
 385                 case BPF_ALU | BPF_XOR | BPF_X:
 386                 case BPF_ALU64 | BPF_ADD | BPF_X:
 387                 case BPF_ALU64 | BPF_SUB | BPF_X:
 388                 case BPF_ALU64 | BPF_AND | BPF_X:
 389                 case BPF_ALU64 | BPF_OR | BPF_X:
 390                 case BPF_ALU64 | BPF_XOR | BPF_X:
 391                         switch (BPF_OP(insn->code)) {
 392                         case BPF_ADD: b2 = 0x01; break;
 393                         case BPF_SUB: b2 = 0x29; break;
 394                         case BPF_AND: b2 = 0x21; break;
 395                         case BPF_OR: b2 = 0x09; break;
 396                         case BPF_XOR: b2 = 0x31; break;
 397                         }
 398                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 399                                 EMIT1(add_2mod(0x48, dst_reg, src_reg));
 400                         else if (is_ereg(dst_reg) || is_ereg(src_reg))
 401                                 EMIT1(add_2mod(0x40, dst_reg, src_reg));
 402                         EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
 403                         break;
 404
 405                         /* mov dst, src */
 406                 case BPF_ALU64 | BPF_MOV | BPF_X:
 407                         EMIT_mov(dst_reg, src_reg);
 408                         break;
 409
 410                         /* mov32 dst, src */
 411                 case BPF_ALU | BPF_MOV | BPF_X:
 412                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 413                                 EMIT1(add_2mod(0x40, dst_reg, src_reg));
 414                         EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
 415                         break;
 416
 417                         /* neg dst */
 418                 case BPF_ALU | BPF_NEG:
 419                 case BPF_ALU64 | BPF_NEG:
 420                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 421                                 EMIT1(add_1mod(0x48, dst_reg));
 422                         else if (is_ereg(dst_reg))
 423                                 EMIT1(add_1mod(0x40, dst_reg));
 424                         EMIT2(0xF7, add_1reg(0xD8, dst_reg));
 425                         break;
 426
 427                 case BPF_ALU | BPF_ADD | BPF_K:
 428                 case BPF_ALU | BPF_SUB | BPF_K:
 429                 case BPF_ALU | BPF_AND | BPF_K:
 430                 case BPF_ALU | BPF_OR | BPF_K:
 431                 case BPF_ALU | BPF_XOR | BPF_K:
 432                 case BPF_ALU64 | BPF_ADD | BPF_K:
 433                 case BPF_ALU64 | BPF_SUB | BPF_K:
 434                 case BPF_ALU64 | BPF_AND | BPF_K:
 435                 case BPF_ALU64 | BPF_OR | BPF_K:
 436                 case BPF_ALU64 | BPF_XOR | BPF_K:
 437                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 438                                 EMIT1(add_1mod(0x48, dst_reg));
 439                         else if (is_ereg(dst_reg))
 440                                 EMIT1(add_1mod(0x40, dst_reg));
 441
 442                         switch (BPF_OP(insn->code)) {
 443                         case BPF_ADD: b3 = 0xC0; break;
 444                         case BPF_SUB: b3 = 0xE8; break;
 445                         case BPF_AND: b3 = 0xE0; break;
 446                         case BPF_OR: b3 = 0xC8; break;
 447                         case BPF_XOR: b3 = 0xF0; break;
 448                         }
 449
 450                         if (is_imm8(imm32))
 451                                 EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
 452                         else
 453                                 EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
 454                         break;
 455
 456                 case BPF_ALU64 | BPF_MOV | BPF_K:
 457                         /* optimization: if imm32 is positive,
 458                          * use 'mov eax, imm32' (which zero-extends imm32)
 459                          * to save 2 bytes
 460                          */
 461                         if (imm32 < 0) {
 462                                 /* 'mov rax, imm32' sign extends imm32 */
 463                                 b1 = add_1mod(0x48, dst_reg);
 464                                 b2 = 0xC7;
 465                                 b3 = 0xC0;
 466                                 EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
 467                                 break;
 468                         }
 469
 470                 case BPF_ALU | BPF_MOV | BPF_K:
 471                         /* mov %eax, imm32 */
 472                         if (is_ereg(dst_reg))
 473                                 EMIT1(add_1mod(0x40, dst_reg));
 474                         EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
 475                         break;
 476
 477                 case BPF_LD | BPF_IMM | BPF_DW:
 478                         if (insn[1].code != 0 || insn[1].src_reg != 0 ||
 479                             insn[1].dst_reg != 0 || insn[1].off != 0) {
 480                                 /* verifier must catch invalid insns */
 481                                 pr_err("invalid BPF_LD_IMM64 insn\n");
 482                                 return -EINVAL;
 483                         }
 484
 485                         /* movabsq %rax, imm64 */
 486                         EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
 487                         EMIT(insn[0].imm, 4);
 488                         EMIT(insn[1].imm, 4);
 489
 490                         insn++;
 491                         i++;
 492                         break;
 493
 494                         /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
 495                 case BPF_ALU | BPF_MOD | BPF_X:
 496                 case BPF_ALU | BPF_DIV | BPF_X:
 497                 case BPF_ALU | BPF_MOD | BPF_K:
 498                 case BPF_ALU | BPF_DIV | BPF_K:
 499                 case BPF_ALU64 | BPF_MOD | BPF_X:
 500                 case BPF_ALU64 | BPF_DIV | BPF_X:
 501                 case BPF_ALU64 | BPF_MOD | BPF_K:
 502                 case BPF_ALU64 | BPF_DIV | BPF_K:
 503                         EMIT1(0x50); /* push rax */
 504                         EMIT1(0x52); /* push rdx */
 505
 506                         if (BPF_SRC(insn->code) == BPF_X)
 507                                 /* mov r11, src_reg */
 508                                 EMIT_mov(AUX_REG, src_reg);
 509                         else
 510                                 /* mov r11, imm32 */
 511                                 EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
 512
 513                         /* mov rax, dst_reg */
 514                         EMIT_mov(BPF_REG_0, dst_reg);
 515
 516                         /* xor edx, edx
 517                          * equivalent to 'xor rdx, rdx', but one byte less
 518                          */
 519                         EMIT2(0x31, 0xd2);
 520
 521                         if (BPF_SRC(insn->code) == BPF_X) {
 522                                 /* if (src_reg == 0) return 0 */
 523
 524                                 /* cmp r11, 0 */
 525                                 EMIT4(0x49, 0x83, 0xFB, 0x00);
 526
 527                                 /* jne .+9 (skip over pop, pop, xor and jmp) */
 528                                 EMIT2(X86_JNE, 1 + 1 + 2 + 5);
 529                                 EMIT1(0x5A); /* pop rdx */
 530                                 EMIT1(0x58); /* pop rax */
 531                                 EMIT2(0x31, 0xc0); /* xor eax, eax */
 532
 533                                 /* jmp cleanup_addr
 534                                  * addrs[i] - 11, because there are 11 bytes
 535                                  * after this insn: div, mov, pop, pop, mov
 536                                  */
 537                                 jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
 538                                 EMIT1_off32(0xE9, jmp_offset);
 539                         }
 540
 541                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 542                                 /* div r11 */
 543                                 EMIT3(0x49, 0xF7, 0xF3);
 544                         else
 545                                 /* div r11d */
 546                                 EMIT3(0x41, 0xF7, 0xF3);
 547
 548                         if (BPF_OP(insn->code) == BPF_MOD)
 549                                 /* mov r11, rdx */
 550                                 EMIT3(0x49, 0x89, 0xD3);
 551                         else
 552                                 /* mov r11, rax */
 553                                 EMIT3(0x49, 0x89, 0xC3);
 554
 555                         EMIT1(0x5A); /* pop rdx */
 556                         EMIT1(0x58); /* pop rax */
 557
 558                         /* mov dst_reg, r11 */
 559                         EMIT_mov(dst_reg, AUX_REG);
 560                         break;
 561
 562                 case BPF_ALU | BPF_MUL | BPF_K:
 563                 case BPF_ALU | BPF_MUL | BPF_X:
 564                 case BPF_ALU64 | BPF_MUL | BPF_K:
 565                 case BPF_ALU64 | BPF_MUL | BPF_X:
 566                         EMIT1(0x50); /* push rax */
 567                         EMIT1(0x52); /* push rdx */
 568
 569                         /* mov r11, dst_reg */
 570                         EMIT_mov(AUX_REG, dst_reg);
 571
 572                         if (BPF_SRC(insn->code) == BPF_X)
 573                                 /* mov rax, src_reg */
 574                                 EMIT_mov(BPF_REG_0, src_reg);
 575                         else
 576                                 /* mov rax, imm32 */
 577                                 EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
 578
 579                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 580                                 EMIT1(add_1mod(0x48, AUX_REG));
 581                         else if (is_ereg(AUX_REG))
 582                                 EMIT1(add_1mod(0x40, AUX_REG));
 583                         /* mul(q) r11 */
 584                         EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
 585
 586                         /* mov r11, rax */
 587                         EMIT_mov(AUX_REG, BPF_REG_0);
 588
 589                         EMIT1(0x5A); /* pop rdx */
 590                         EMIT1(0x58); /* pop rax */
 591
 592                         /* mov dst_reg, r11 */
 593                         EMIT_mov(dst_reg, AUX_REG);
 594                         break;
 595
 596                         /* shifts */
 597                 case BPF_ALU | BPF_LSH | BPF_K:
 598                 case BPF_ALU | BPF_RSH | BPF_K:
 599                 case BPF_ALU | BPF_ARSH | BPF_K:
 600                 case BPF_ALU64 | BPF_LSH | BPF_K:
 601                 case BPF_ALU64 | BPF_RSH | BPF_K:
 602                 case BPF_ALU64 | BPF_ARSH | BPF_K:
 603                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 604                                 EMIT1(add_1mod(0x48, dst_reg));
 605                         else if (is_ereg(dst_reg))
 606                                 EMIT1(add_1mod(0x40, dst_reg));
 607
 608                         switch (BPF_OP(insn->code)) {
 609                         case BPF_LSH: b3 = 0xE0; break;
 610                         case BPF_RSH: b3 = 0xE8; break;
 611                         case BPF_ARSH: b3 = 0xF8; break;
 612                         }
 613                         EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
 614                         break;
 615
 616                 case BPF_ALU | BPF_LSH | BPF_X:
 617                 case BPF_ALU | BPF_RSH | BPF_X:
 618                 case BPF_ALU | BPF_ARSH | BPF_X:
 619                 case BPF_ALU64 | BPF_LSH | BPF_X:
 620                 case BPF_ALU64 | BPF_RSH | BPF_X:
 621                 case BPF_ALU64 | BPF_ARSH | BPF_X:
 622
 623                         /* check for bad case when dst_reg == rcx */
 624                         if (dst_reg == BPF_REG_4) {
 625                                 /* mov r11, dst_reg */
 626                                 EMIT_mov(AUX_REG, dst_reg);
 627                                 dst_reg = AUX_REG;
 628                         }
 629
 630                         if (src_reg != BPF_REG_4) { /* common case */
 631                                 EMIT1(0x51); /* push rcx */
 632
 633                                 /* mov rcx, src_reg */
 634                                 EMIT_mov(BPF_REG_4, src_reg);
 635                         }
 636
 637                         /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
 638                         if (BPF_CLASS(insn->code) == BPF_ALU64)
 639                                 EMIT1(add_1mod(0x48, dst_reg));
 640                         else if (is_ereg(dst_reg))
 641                                 EMIT1(add_1mod(0x40, dst_reg));
 642
 643                         switch (BPF_OP(insn->code)) {
 644                         case BPF_LSH: b3 = 0xE0; break;
 645                         case BPF_RSH: b3 = 0xE8; break;
 646                         case BPF_ARSH: b3 = 0xF8; break;
 647                         }
 648                         EMIT2(0xD3, add_1reg(b3, dst_reg));
 649
 650                         if (src_reg != BPF_REG_4)
 651                                 EMIT1(0x59); /* pop rcx */
 652
 653                         if (insn->dst_reg == BPF_REG_4)
 654                                 /* mov dst_reg, r11 */
 655                                 EMIT_mov(insn->dst_reg, AUX_REG);
 656                         break;
 657
 658                 case BPF_ALU | BPF_END | BPF_FROM_BE:
 659                         switch (imm32) {
 660                         case 16:
 661                                 /* emit 'ror %ax, 8' to swap lower 2 bytes */
 662                                 EMIT1(0x66);
 663                                 if (is_ereg(dst_reg))
 664                                         EMIT1(0x41);
 665                                 EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
 666
 667                                 /* emit 'movzwl eax, ax' */
 668                                 if (is_ereg(dst_reg))
 669                                         EMIT3(0x45, 0x0F, 0xB7);
 670                                 else
 671                                         EMIT2(0x0F, 0xB7);
 672                                 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
 673                                 break;
 674                         case 32:
 675                                 /* emit 'bswap eax' to swap lower 4 bytes */
 676                                 if (is_ereg(dst_reg))
 677                                         EMIT2(0x41, 0x0F);
 678                                 else
 679                                         EMIT1(0x0F);
 680                                 EMIT1(add_1reg(0xC8, dst_reg));
 681                                 break;
 682                         case 64:
 683                                 /* emit 'bswap rax' to swap 8 bytes */
 684                                 EMIT3(add_1mod(0x48, dst_reg), 0x0F,
 685                                       add_1reg(0xC8, dst_reg));
 686                                 break;
 687                         }
 688                         break;
 689
 690                 case BPF_ALU | BPF_END | BPF_FROM_LE:
 691                         switch (imm32) {
 692                         case 16:
 693                                 /* emit 'movzwl eax, ax' to zero extend 16-bit
 694                                  * into 64 bit
 695                                  */
 696                                 if (is_ereg(dst_reg))
 697                                         EMIT3(0x45, 0x0F, 0xB7);
 698                                 else
 699                                         EMIT2(0x0F, 0xB7);
 700                                 EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
 701                                 break;
 702                         case 32:
 703                                 /* emit 'mov eax, eax' to clear upper 32-bits */
 704                                 if (is_ereg(dst_reg))
 705                                         EMIT1(0x45);
 706                                 EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
 707                                 break;
 708                         case 64:
 709                                 /* nop */
 710                                 break;
 711                         }
 712                         break;
 713
 714                         /* ST: *(u8*)(dst_reg + off) = imm */
 715                 case BPF_ST | BPF_MEM | BPF_B:
 716                         if (is_ereg(dst_reg))
 717                                 EMIT2(0x41, 0xC6);
 718                         else
 719                                 EMIT1(0xC6);
 720                         goto st;
 721                 case BPF_ST | BPF_MEM | BPF_H:
 722                         if (is_ereg(dst_reg))
 723                                 EMIT3(0x66, 0x41, 0xC7);
 724                         else
 725                                 EMIT2(0x66, 0xC7);
 726                         goto st;
 727                 case BPF_ST | BPF_MEM | BPF_W:
 728                         if (is_ereg(dst_reg))
 729                                 EMIT2(0x41, 0xC7);
 730                         else
 731                                 EMIT1(0xC7);
 732                         goto st;
 733                 case BPF_ST | BPF_MEM | BPF_DW:
 734                         EMIT2(add_1mod(0x48, dst_reg), 0xC7);
 735
 736 st:                     if (is_imm8(insn->off))
 737                                 EMIT2(add_1reg(0x40, dst_reg), insn->off);
 738                         else
 739                                 EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
 740
 741                         EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
 742                         break;
 743
 744                         /* STX: *(u8*)(dst_reg + off) = src_reg */
 745                 case BPF_STX | BPF_MEM | BPF_B:
 746                         /* emit 'mov byte ptr [rax + off], al' */
 747                         if (is_ereg(dst_reg) || is_ereg_8l(src_reg))
 748                                 /* Add extra byte for eregs or SIL,DIL,BPL in src_reg */
 749                                 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
 750                         else
 751                                 EMIT1(0x88);
 752                         goto stx;
 753                 case BPF_STX | BPF_MEM | BPF_H:
 754                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 755                                 EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
 756                         else
 757                                 EMIT2(0x66, 0x89);
 758                         goto stx;
 759                 case BPF_STX | BPF_MEM | BPF_W:
 760                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 761                                 EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
 762                         else
 763                                 EMIT1(0x89);
 764                         goto stx;
 765                 case BPF_STX | BPF_MEM | BPF_DW:
 766                         EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
 767 stx:                    if (is_imm8(insn->off))
 768                                 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
 769                         else
 770                                 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
 771                                             insn->off);
 772                         break;
 773
 774                         /* LDX: dst_reg = *(u8*)(src_reg + off) */
 775                 case BPF_LDX | BPF_MEM | BPF_B:
 776                         /* emit 'movzx rax, byte ptr [rax + off]' */
 777                         EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
 778                         goto ldx;
 779                 case BPF_LDX | BPF_MEM | BPF_H:
 780                         /* emit 'movzx rax, word ptr [rax + off]' */
 781                         EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
 782                         goto ldx;
 783                 case BPF_LDX | BPF_MEM | BPF_W:
 784                         /* emit 'mov eax, dword ptr [rax+0x14]' */
 785                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 786                                 EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
 787                         else
 788                                 EMIT1(0x8B);
 789                         goto ldx;
 790                 case BPF_LDX | BPF_MEM | BPF_DW:
 791                         /* emit 'mov rax, qword ptr [rax+0x14]' */
 792                         EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
 793 ldx:                    /* if insn->off == 0 we can save one extra byte, but
 794                          * special case of x86 r13 which always needs an offset
 795                          * is not worth the hassle
 796                          */
 797                         if (is_imm8(insn->off))
 798                                 EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
 799                         else
 800                                 EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
 801                                             insn->off);
 802                         break;
 803
 804                         /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
 805                 case BPF_STX | BPF_XADD | BPF_W:
 806                         /* emit 'lock add dword ptr [rax + off], eax' */
 807                         if (is_ereg(dst_reg) || is_ereg(src_reg))
 808                                 EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
 809                         else
 810                                 EMIT2(0xF0, 0x01);
 811                         goto xadd;
 812                 case BPF_STX | BPF_XADD | BPF_DW:
 813                         EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
 814 xadd:                   if (is_imm8(insn->off))
 815                                 EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
 816                         else
 817                                 EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
 818                                             insn->off);
 819                         break;
 820
 821                         /* call */
 822                 case BPF_JMP | BPF_CALL:
 823                         func = (u8 *) __bpf_call_base + imm32;
 824                         jmp_offset = func - (image + addrs[i]);
 825                         if (seen_ld_abs) {
 826                                 reload_skb_data = bpf_helper_changes_skb_data(func);
 827                                 if (reload_skb_data) {
 828                                         EMIT1(0x57); /* push %rdi */
 829                                         jmp_offset += 22; /* pop, mov, sub, mov */
 830                                 } else {
 831                                         EMIT2(0x41, 0x52); /* push %r10 */
 832                                         EMIT2(0x41, 0x51); /* push %r9 */
 833                                         /* need to adjust jmp offset, since
 834                                          * pop %r9, pop %r10 take 4 bytes after call insn
 835                                          */
 836                                         jmp_offset += 4;
 837                                 }
 838                         }
 839                         if (!imm32 || !is_simm32(jmp_offset)) {
 840                                 pr_err("unsupported bpf func %d addr %p image %p\n",
 841                                        imm32, func, image);
 842                                 return -EINVAL;
 843                         }
 844                         EMIT1_off32(0xE8, jmp_offset);
 845                         if (seen_ld_abs) {
 846                                 if (reload_skb_data) {
 847                                         EMIT1(0x5F); /* pop %rdi */
 848                                         emit_load_skb_data_hlen(&prog);
 849                                 } else {
 850                                         EMIT2(0x41, 0x59); /* pop %r9 */
 851                                         EMIT2(0x41, 0x5A); /* pop %r10 */
 852                                 }
 853                         }
 854                         break;
 855
 856                 case BPF_JMP | BPF_CALL | BPF_X:
 857                         emit_bpf_tail_call(&prog);
 858                         break;
 859
 860                         /* cond jump */
 861                 case BPF_JMP | BPF_JEQ | BPF_X:
 862                 case BPF_JMP | BPF_JNE | BPF_X:
 863                 case BPF_JMP | BPF_JGT | BPF_X:
 864                 case BPF_JMP | BPF_JGE | BPF_X:
 865                 case BPF_JMP | BPF_JSGT | BPF_X:
 866                 case BPF_JMP | BPF_JSGE | BPF_X:
 867                         /* cmp dst_reg, src_reg */
 868                         EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
 869                               add_2reg(0xC0, dst_reg, src_reg));
 870                         goto emit_cond_jmp;
 871
 872                 case BPF_JMP | BPF_JSET | BPF_X:
 873                         /* test dst_reg, src_reg */
 874                         EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
 875                               add_2reg(0xC0, dst_reg, src_reg));
 876                         goto emit_cond_jmp;
 877
 878                 case BPF_JMP | BPF_JSET | BPF_K:
 879                         /* test dst_reg, imm32 */
 880                         EMIT1(add_1mod(0x48, dst_reg));
 881                         EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
 882                         goto emit_cond_jmp;
 883
 884                 case BPF_JMP | BPF_JEQ | BPF_K:
 885                 case BPF_JMP | BPF_JNE | BPF_K:
 886                 case BPF_JMP | BPF_JGT | BPF_K:
 887                 case BPF_JMP | BPF_JGE | BPF_K:
 888                 case BPF_JMP | BPF_JSGT | BPF_K:
 889                 case BPF_JMP | BPF_JSGE | BPF_K:
 890                         /* cmp dst_reg, imm8/32 */
 891                         EMIT1(add_1mod(0x48, dst_reg));
 892
 893                         if (is_imm8(imm32))
 894                                 EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
 895                         else
 896                                 EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
 897
 898 emit_cond_jmp:          /* convert BPF opcode to x86 */
 899                         switch (BPF_OP(insn->code)) {
 900                         case BPF_JEQ:
 901                                 jmp_cond = X86_JE;
 902                                 break;
 903                         case BPF_JSET:
 904                         case BPF_JNE:
 905                                 jmp_cond = X86_JNE;
 906                                 break;
 907                         case BPF_JGT:
 908                                 /* GT is unsigned '>', JA in x86 */
 909                                 jmp_cond = X86_JA;
 910                                 break;
 911                         case BPF_JGE:
 912                                 /* GE is unsigned '>=', JAE in x86 */
 913                                 jmp_cond = X86_JAE;
 914                                 break;
 915                         case BPF_JSGT:
 916                                 /* signed '>', GT in x86 */
 917                                 jmp_cond = X86_JG;
 918                                 break;
 919                         case BPF_JSGE:
 920                                 /* signed '>=', GE in x86 */
 921                                 jmp_cond = X86_JGE;
 922                                 break;
 923                         default: /* to silence gcc warning */
 924                                 return -EFAULT;
 925                         }
 926                         jmp_offset = addrs[i + insn->off] - addrs[i];
 927                         if (is_imm8(jmp_offset)) {
 928                                 EMIT2(jmp_cond, jmp_offset);
 929                         } else if (is_simm32(jmp_offset)) {
 930                                 EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
 931                         } else {
 932                                 pr_err("cond_jmp gen bug %llx\n", jmp_offset);
 933                                 return -EFAULT;
 934                         }
 935
 936                         break;
 937
 938                 case BPF_JMP | BPF_JA:
 939                         jmp_offset = addrs[i + insn->off] - addrs[i];
 940                         if (!jmp_offset)
 941                                 /* optimize out nop jumps */
 942                                 break;
 943 emit_jmp:
 944                         if (is_imm8(jmp_offset)) {
 945                                 EMIT2(0xEB, jmp_offset);
 946                         } else if (is_simm32(jmp_offset)) {
 947                                 EMIT1_off32(0xE9, jmp_offset);
 948                         } else {
 949                                 pr_err("jmp gen bug %llx\n", jmp_offset);
 950                                 return -EFAULT;
 951                         }
 952                         break;
 953
 954                 case BPF_LD | BPF_IND | BPF_W:
 955                         func = sk_load_word;
 956                         goto common_load;
 957                 case BPF_LD | BPF_ABS | BPF_W:
 958                         func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
 959 common_load:
 960                         ctx->seen_ld_abs = seen_ld_abs = true;
 961                         jmp_offset = func - (image + addrs[i]);
 962                         if (!func || !is_simm32(jmp_offset)) {
 963                                 pr_err("unsupported bpf func %d addr %p image %p\n",
 964                                        imm32, func, image);
 965                                 return -EINVAL;
 966                         }
 967                         if (BPF_MODE(insn->code) == BPF_ABS) {
 968                                 /* mov %esi, imm32 */
 969                                 EMIT1_off32(0xBE, imm32);
 970                         } else {
 971                                 /* mov %rsi, src_reg */
 972                                 EMIT_mov(BPF_REG_2, src_reg);
 973                                 if (imm32) {
 974                                         if (is_imm8(imm32))
 975                                                 /* add %esi, imm8 */
 976                                                 EMIT3(0x83, 0xC6, imm32);
 977                                         else
 978                                                 /* add %esi, imm32 */
 979                                                 EMIT2_off32(0x81, 0xC6, imm32);
 980                                 }
 981                         }
 982                         /* skb pointer is in R6 (%rbx), it will be copied into
 983                          * %rdi if skb_copy_bits() call is necessary.
 984                          * sk_load_* helpers also use %r10 and %r9d.
 985                          * See bpf_jit.S
 986                          */
 987                         EMIT1_off32(0xE8, jmp_offset); /* call */
 988                         break;
 989
 990                 case BPF_LD | BPF_IND | BPF_H:
 991                         func = sk_load_half;
 992                         goto common_load;
 993                 case BPF_LD | BPF_ABS | BPF_H:
 994                         func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
 995                         goto common_load;
 996                 case BPF_LD | BPF_IND | BPF_B:
 997                         func = sk_load_byte;
 998                         goto common_load;
 999                 case BPF_LD | BPF_ABS | BPF_B:
1000                         func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
1001                         goto common_load;
1002
1003                 case BPF_JMP | BPF_EXIT:
1004                         if (seen_exit) {
1005                                 jmp_offset = ctx->cleanup_addr - addrs[i];
1006                                 goto emit_jmp;
1007                         }
1008                         seen_exit = true;
1009                         /* update cleanup_addr */
1010                         ctx->cleanup_addr = proglen;
1011                         /* mov rbx, qword ptr [rbp-X] */
1012                         EMIT3_off32(0x48, 0x8B, 0x9D, -STACKSIZE);
1013                         /* mov r13, qword ptr [rbp-X] */
1014                         EMIT3_off32(0x4C, 0x8B, 0xAD, -STACKSIZE + 8);
1015                         /* mov r14, qword ptr [rbp-X] */
1016                         EMIT3_off32(0x4C, 0x8B, 0xB5, -STACKSIZE + 16);
1017                         /* mov r15, qword ptr [rbp-X] */
1018                         EMIT3_off32(0x4C, 0x8B, 0xBD, -STACKSIZE + 24);
1019
1020                         EMIT1(0xC9); /* leave */
1021                         EMIT1(0xC3); /* ret */
1022                         break;
1023
1024                 default:
1025                         /* By design x64 JIT should support all BPF instructions
1026                          * This error will be seen if new instruction was added
1027                          * to interpreter, but not to JIT
1028                          * or if there is junk in bpf_prog
1029                          */
1030                         pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
1031                         return -EINVAL;
1032                 }
1033
1034                 ilen = prog - temp;
1035                 if (ilen > BPF_MAX_INSN_SIZE) {
1036                         pr_err("bpf_jit_compile fatal insn size error\n");
1037                         return -EFAULT;
1038                 }
1039
1040                 if (image) {
1041                         /*
1042                          * When populating the image, assert that:
1043                          *
1044                          *  i) We do not write beyond the allocated space, and
1045                          * ii) addrs[i] did not change from the prior run, in order
1046                          *     to validate assumptions made for computing branch
1047                          *     displacements.
1048                          */
1049                         if (unlikely(proglen + ilen > oldproglen ||
1050                                      proglen + ilen != addrs[i])) {
1051                                 pr_err("bpf_jit_compile fatal error\n");
1052                                 return -EFAULT;
1053                         }
1054                         memcpy(image + proglen, temp, ilen);
1055                 }
1056                 proglen += ilen;
1057                 addrs[i] = proglen;
1058                 prog = temp;
1059         }
1060         return proglen;
1061 }
1062
1063 void bpf_jit_compile(struct bpf_prog *prog)
1064 {
1065 }
1066
1067 void bpf_int_jit_compile(struct bpf_prog *prog)
1068 {
1069         struct bpf_binary_header *header = NULL;
1070         int proglen, oldproglen = 0;
1071         struct jit_context ctx = {};
1072         u8 *image = NULL;
1073         int *addrs;
1074         int pass;
1075         int i;
1076
1077         if (!bpf_jit_enable)
1078                 return;
1079
1080         if (!prog || !prog->len)
1081                 return;
1082
1083         addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
1084         if (!addrs)
1085                 return;
1086
1087         /* Before first pass, make a rough estimation of addrs[]
1088          * each bpf instruction is translated to less than 64 bytes
1089          */
1090         for (proglen = 0, i = 0; i < prog->len; i++) {
1091                 proglen += 64;
1092                 addrs[i] = proglen;
1093         }
1094         ctx.cleanup_addr = proglen;
1095
1096         /* JITed image shrinks with every pass and the loop iterates
1097          * until the image stops shrinking. Very large bpf programs
1098          * may converge on the last pass. In such case do one more
1099          * pass to emit the final image
1100          */
1101         for (pass = 0; pass < 20 || image; pass++) {
1102                 proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
1103                 if (proglen <= 0) {
1104                         image = NULL;
1105                         if (header)
1106                                 bpf_jit_binary_free(header);
1107                         goto out;
1108                 }
1109                 if (image) {
1110                         if (proglen != oldproglen) {
1111                                 pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
1112                                        proglen, oldproglen);
1113                                 goto out;
1114                         }
1115                         break;
1116                 }
1117                 if (proglen == oldproglen) {
1118                         header = bpf_jit_binary_alloc(proglen, &image,
1119                                                       1, jit_fill_hole);
1120                         if (!header)
1121                                 goto out;
1122                 }
1123                 oldproglen = proglen;
1124                 cond_resched();
1125         }
1126
1127         if (bpf_jit_enable > 1)
1128                 bpf_jit_dump(prog->len, proglen, pass + 1, image);
1129
1130         if (image) {
1131                 bpf_flush_icache(header, image + proglen);
1132                 set_memory_ro((unsigned long)header, header->pages);
1133                 prog->bpf_func = (void *)image;
1134                 prog->jited = 1;
1135         }
1136 out:
1137         kfree(addrs);
1138 }
1139
1140 void bpf_jit_free(struct bpf_prog *fp)
1141 {
1142         unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1143         struct bpf_binary_header *header = (void *)addr;
1144
1145         if (!fp->jited)
1146                 goto free_filter;
1147
1148         set_memory_rw(addr, header->pages);
1149         bpf_jit_binary_free(header);
1150
1151 free_filter:
1152         bpf_prog_unlock_free(fp);
1153 }