2 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
3 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
4 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
5 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
6 * 0xcf8 PCI configuration read/write.
8 * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
9 * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
10 * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
12 #include <linux/export.h>
13 #include <linux/init.h>
14 #include <linux/pci.h>
15 #include <linux/acpi.h>
18 #include <asm/io_apic.h>
19 #include <asm/pci_x86.h>
21 #include <asm/xen/hypervisor.h>
23 #include <xen/features.h>
24 #include <xen/events.h>
25 #include <asm/xen/pci.h>
26 #include <asm/xen/cpuid.h>
29 #include <asm/i8259.h>
31 static int xen_pcifront_enable_irq(struct pci_dev *dev)
38 rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
40 dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
44 /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
47 if (gsi < nr_legacy_irqs())
50 rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
52 dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
58 dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
63 static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
66 int rc, pirq = -1, irq = -1;
67 struct physdev_map_pirq map_irq;
71 irq = xen_irq_from_gsi(gsi);
78 map_irq.domid = DOMID_SELF;
79 map_irq.type = MAP_PIRQ_TYPE_GSI;
83 rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
85 printk(KERN_WARNING "xen map irq failed %d\n", rc);
89 if (triggering == ACPI_EDGE_SENSITIVE) {
94 name = "ioapic-level";
97 if (gsi_override >= 0)
100 irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
104 printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
109 static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
110 int trigger, int polarity)
112 if (!xen_hvm_domain())
115 return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
116 false /* no mapping of GSI to PIRQ */);
119 #ifdef CONFIG_XEN_DOM0
120 static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
123 struct physdev_setup_gsi setup_gsi;
125 if (!xen_pv_domain())
128 printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
129 gsi, triggering, polarity);
131 irq = xen_register_pirq(gsi, gsi_override, triggering, true);
134 setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
135 setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
137 rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
139 printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
141 printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
148 static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
149 int trigger, int polarity)
151 return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
156 #if defined(CONFIG_PCI_MSI)
157 #include <linux/msi.h>
158 #include <asm/msidef.h>
160 struct xen_pci_frontend_ops *xen_pci_frontend;
161 EXPORT_SYMBOL_GPL(xen_pci_frontend);
163 static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
166 struct msi_desc *msidesc;
169 if (type == PCI_CAP_ID_MSI && nvec > 1)
172 v = kcalloc(max(1, nvec), sizeof(int), GFP_KERNEL);
176 if (type == PCI_CAP_ID_MSIX)
177 ret = xen_pci_frontend_enable_msix(dev, v, nvec);
179 ret = xen_pci_frontend_enable_msi(dev, v);
183 for_each_pci_msi_entry(msidesc, dev) {
184 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
185 (type == PCI_CAP_ID_MSI) ? nvec : 1,
186 (type == PCI_CAP_ID_MSIX) ?
201 dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
203 dev_err(&dev->dev, "Xen PCI frontend error: %d!\n", ret);
209 #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
210 MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
212 static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
215 /* We set vector == 0 to tell the hypervisor we don't care about it,
216 * but we want a pirq setup instead.
217 * We use the dest_id field to pass the pirq that we want. */
218 msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
221 MSI_ADDR_DEST_MODE_PHYSICAL |
222 MSI_ADDR_REDIRECTION_CPU |
223 MSI_ADDR_DEST_ID(pirq);
225 msg->data = XEN_PIRQ_MSI_DATA;
228 static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
231 struct msi_desc *msidesc;
234 if (type == PCI_CAP_ID_MSI && nvec > 1)
237 for_each_pci_msi_entry(msidesc, dev) {
238 pirq = xen_allocate_pirq_msi(dev, msidesc);
243 xen_msi_compose_msg(dev, pirq, &msg);
244 __pci_write_msi_msg(msidesc, &msg);
245 dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
246 irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
247 (type == PCI_CAP_ID_MSI) ? nvec : 1,
248 (type == PCI_CAP_ID_MSIX) ?
254 "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
259 dev_err(&dev->dev, "Failed to create MSI%s! ret=%d!\n",
260 type == PCI_CAP_ID_MSI ? "" : "-X", irq);
264 #ifdef CONFIG_XEN_DOM0
265 static bool __read_mostly pci_seg_supported = true;
267 static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
270 struct msi_desc *msidesc;
272 for_each_pci_msi_entry(msidesc, dev) {
273 struct physdev_map_pirq map_irq;
276 domid = ret = xen_find_device_domain_owner(dev);
277 /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
278 * hence check ret value for < 0. */
282 memset(&map_irq, 0, sizeof(map_irq));
283 map_irq.domid = domid;
284 map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
287 map_irq.bus = dev->bus->number |
288 (pci_domain_nr(dev->bus) << 16);
289 map_irq.devfn = dev->devfn;
291 if (type == PCI_CAP_ID_MSI && nvec > 1) {
292 map_irq.type = MAP_PIRQ_TYPE_MULTI_MSI;
293 map_irq.entry_nr = nvec;
294 } else if (type == PCI_CAP_ID_MSIX) {
297 u32 table_offset, bir;
300 pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
302 bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
303 flags = pci_resource_flags(dev, bir);
304 if (!flags || (flags & IORESOURCE_UNSET))
307 map_irq.table_base = pci_resource_start(dev, bir);
308 map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
312 if (pci_seg_supported)
313 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
315 if (type == PCI_CAP_ID_MSI && nvec > 1 && ret) {
317 * If MAP_PIRQ_TYPE_MULTI_MSI is not available
318 * there's nothing else we can do in this case.
319 * Just set ret > 0 so driver can retry with
325 if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
326 map_irq.type = MAP_PIRQ_TYPE_MSI;
329 map_irq.bus = dev->bus->number;
330 ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
333 pci_seg_supported = false;
336 dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
341 ret = xen_bind_pirq_msi_to_irq(dev, msidesc, map_irq.pirq,
342 (type == PCI_CAP_ID_MSI) ? nvec : 1,
343 (type == PCI_CAP_ID_MSIX) ? "msi-x" : "msi",
353 static void xen_initdom_restore_msi_irqs(struct pci_dev *dev)
357 if (pci_seg_supported) {
358 struct physdev_pci_device restore_ext;
360 restore_ext.seg = pci_domain_nr(dev->bus);
361 restore_ext.bus = dev->bus->number;
362 restore_ext.devfn = dev->devfn;
363 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
366 pci_seg_supported = false;
367 WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
369 if (!pci_seg_supported) {
370 struct physdev_restore_msi restore;
372 restore.bus = dev->bus->number;
373 restore.devfn = dev->devfn;
374 ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
375 WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
380 static void xen_teardown_msi_irqs(struct pci_dev *dev)
382 struct msi_desc *msidesc;
384 msidesc = first_pci_msi_entry(dev);
385 if (msidesc->msi_attrib.is_msix)
386 xen_pci_frontend_disable_msix(dev);
388 xen_pci_frontend_disable_msi(dev);
390 /* Free the IRQ's and the msidesc using the generic code. */
391 default_teardown_msi_irqs(dev);
394 static void xen_teardown_msi_irq(unsigned int irq)
396 xen_destroy_irq(irq);
401 int __init pci_xen_init(void)
403 if (!xen_pv_domain() || xen_initial_domain())
406 printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
408 pcibios_set_cache_line_size();
410 pcibios_enable_irq = xen_pcifront_enable_irq;
411 pcibios_disable_irq = NULL;
413 /* Keep ACPI out of the picture */
416 #ifdef CONFIG_PCI_MSI
417 x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
418 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
419 x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
420 pci_msi_ignore_mask = 1;
425 #ifdef CONFIG_PCI_MSI
426 void __init xen_msi_init(void)
430 * If hardware supports (x2)APIC virtualization (as indicated
431 * by hypervisor's leaf 4) then we don't need to use pirqs/
432 * event channels for MSI handling and instead use regular
435 uint32_t eax = cpuid_eax(xen_cpuid_base() + 4);
437 if (((eax & XEN_HVM_CPUID_X2APIC_VIRT) && x2apic_mode) ||
438 ((eax & XEN_HVM_CPUID_APIC_ACCESS_VIRT) && boot_cpu_has(X86_FEATURE_APIC)))
442 x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
443 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
445 * With XEN PIRQ/Eventchannels in use PCI/MSI[-X] masking is solely
446 * controlled by the hypervisor.
448 pci_msi_ignore_mask = 1;
452 int __init pci_xen_hvm_init(void)
454 if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
459 * We don't want to change the actual ACPI delivery model,
460 * just how GSIs get registered.
462 __acpi_register_gsi = acpi_register_gsi_xen_hvm;
463 __acpi_unregister_gsi = NULL;
466 #ifdef CONFIG_PCI_MSI
468 * We need to wait until after x2apic is initialized
469 * before we can set MSI IRQ ops.
471 x86_platform.apic_post_init = xen_msi_init;
476 #ifdef CONFIG_XEN_DOM0
477 int __init pci_xen_initial_domain(void)
481 #ifdef CONFIG_PCI_MSI
482 x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
483 x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
484 x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
485 pci_msi_ignore_mask = 1;
487 __acpi_register_gsi = acpi_register_gsi_xen;
488 __acpi_unregister_gsi = NULL;
490 * Pre-allocate the legacy IRQs. Use NR_LEGACY_IRQS here
491 * because we don't have a PIC and thus nr_legacy_irqs() is zero.
493 for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
494 int trigger, polarity;
496 if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
499 xen_register_pirq(irq, -1 /* no GSI override */,
500 trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
501 true /* Map GSI to PIRQ */);
503 if (0 == nr_ioapics) {
504 for (irq = 0; irq < nr_legacy_irqs(); irq++)
505 xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
510 struct xen_device_domain_owner {
513 struct list_head list;
516 static DEFINE_SPINLOCK(dev_domain_list_spinlock);
517 static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
519 static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
521 struct xen_device_domain_owner *owner;
523 list_for_each_entry(owner, &dev_domain_list, list) {
524 if (owner->dev == dev)
530 int xen_find_device_domain_owner(struct pci_dev *dev)
532 struct xen_device_domain_owner *owner;
533 int domain = -ENODEV;
535 spin_lock(&dev_domain_list_spinlock);
536 owner = find_device(dev);
538 domain = owner->domain;
539 spin_unlock(&dev_domain_list_spinlock);
542 EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
544 int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
546 struct xen_device_domain_owner *owner;
548 owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
552 spin_lock(&dev_domain_list_spinlock);
553 if (find_device(dev)) {
554 spin_unlock(&dev_domain_list_spinlock);
558 owner->domain = domain;
560 list_add_tail(&owner->list, &dev_domain_list);
561 spin_unlock(&dev_domain_list_spinlock);
564 EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
566 int xen_unregister_device_domain_owner(struct pci_dev *dev)
568 struct xen_device_domain_owner *owner;
570 spin_lock(&dev_domain_list_spinlock);
571 owner = find_device(dev);
573 spin_unlock(&dev_domain_list_spinlock);
576 list_del(&owner->list);
577 spin_unlock(&dev_domain_list_spinlock);
581 EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);