3 * arch/xtensa/platform/xtavnet/setup.c
7 * Authors: Chris Zankel <chris@zankel.net>
8 * Joe Taylor <joe@tensilica.com>
10 * Copyright 2001 - 2006 Tensilica Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
18 #include <linux/stddef.h>
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/errno.h>
22 #include <linux/reboot.h>
23 #include <linux/kdev_t.h>
24 #include <linux/types.h>
25 #include <linux/major.h>
26 #include <linux/console.h>
27 #include <linux/delay.h>
29 #include <linux/clk-provider.h>
30 #include <linux/of_address.h>
32 #include <asm/timex.h>
33 #include <asm/processor.h>
34 #include <asm/platform.h>
35 #include <asm/bootparam.h>
36 #include <platform/lcd.h>
37 #include <platform/hardware.h>
39 void platform_halt(void)
41 lcd_disp_at_pos(" HALT ", 0);
47 void platform_power_off(void)
49 lcd_disp_at_pos("POWEROFF", 0);
55 void platform_restart(void)
57 /* Try software reset first. */
58 WRITE_ONCE(*(u32 *)XTFPGA_SWRST_VADDR, 0xdead);
60 /* If software reset did not work, flush and reset the mmu,
61 * simulate a processor reset, and jump to the reset vector.
64 /* control never gets here */
67 void __init platform_setup(char **cmdline)
71 /* early initialization */
73 void __init platform_init(bp_tag_t *first)
79 void platform_heartbeat(void)
83 #ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
85 void __init platform_calibrate_ccount(void)
87 ccount_freq = *(long *)XTFPGA_CLKFRQ_VADDR;
94 static void __init xtfpga_clk_setup(struct device_node *np)
96 void __iomem *base = of_iomap(np, 0);
101 pr_err("%s: invalid address\n", np->name);
105 freq = __raw_readl(base);
107 clk = clk_register_fixed_rate(NULL, np->name, NULL, 0, freq);
110 pr_err("%s: clk registration failed\n", np->name);
114 if (of_clk_add_provider(np, of_clk_src_simple_get, clk)) {
115 pr_err("%s: clk provider registration failed\n", np->name);
119 CLK_OF_DECLARE(xtfpga_clk, "cdns,xtfpga-clock", xtfpga_clk_setup);
122 static void __init update_local_mac(struct device_node *node)
124 struct property *newmac;
128 macaddr = of_get_property(node, "local-mac-address", &prop_len);
129 if (macaddr == NULL || prop_len != MAC_LEN)
132 newmac = kzalloc(sizeof(*newmac) + MAC_LEN, GFP_KERNEL);
136 newmac->value = newmac + 1;
137 newmac->length = MAC_LEN;
138 newmac->name = kstrdup("local-mac-address", GFP_KERNEL);
139 if (newmac->name == NULL) {
144 memcpy(newmac->value, macaddr, MAC_LEN);
145 ((u8*)newmac->value)[5] = (*(u32*)DIP_SWITCHES_VADDR) & 0x3f;
146 of_update_property(node, newmac);
149 static int __init machine_setup(void)
151 struct device_node *eth = NULL;
153 if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
154 update_local_mac(eth);
157 arch_initcall(machine_setup);
161 #include <linux/serial_8250.h>
162 #include <linux/if.h>
163 #include <net/ethoc.h>
164 #include <linux/usb/c67x00.h>
166 /*----------------------------------------------------------------------------
167 * Ethernet -- OpenCores Ethernet MAC (ethoc driver)
170 static struct resource ethoc_res[] = {
171 [0] = { /* register space */
172 .start = OETH_REGS_PADDR,
173 .end = OETH_REGS_PADDR + OETH_REGS_SIZE - 1,
174 .flags = IORESOURCE_MEM,
176 [1] = { /* buffer space */
177 .start = OETH_SRAMBUFF_PADDR,
178 .end = OETH_SRAMBUFF_PADDR + OETH_SRAMBUFF_SIZE - 1,
179 .flags = IORESOURCE_MEM,
181 [2] = { /* IRQ number */
182 .start = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
183 .end = XTENSA_PIC_LINUX_IRQ(OETH_IRQ),
184 .flags = IORESOURCE_IRQ,
188 static struct ethoc_platform_data ethoc_pdata = {
190 * The MAC address for these boards is 00:50:c2:13:6f:xx.
191 * The last byte (here as zero) is read from the DIP switches on the
194 .hwaddr = { 0x00, 0x50, 0xc2, 0x13, 0x6f, 0 },
196 .big_endian = XCHAL_HAVE_BE,
199 static struct platform_device ethoc_device = {
202 .num_resources = ARRAY_SIZE(ethoc_res),
203 .resource = ethoc_res,
205 .platform_data = ðoc_pdata,
209 /*----------------------------------------------------------------------------
210 * USB Host/Device -- Cypress CY7C67300
213 static struct resource c67x00_res[] = {
214 [0] = { /* register space */
215 .start = C67X00_PADDR,
216 .end = C67X00_PADDR + C67X00_SIZE - 1,
217 .flags = IORESOURCE_MEM,
219 [1] = { /* IRQ number */
220 .start = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
221 .end = XTENSA_PIC_LINUX_IRQ(C67X00_IRQ),
222 .flags = IORESOURCE_IRQ,
226 static struct c67x00_platform_data c67x00_pdata = {
227 .sie_config = C67X00_SIE1_HOST | C67X00_SIE2_UNUSED,
231 static struct platform_device c67x00_device = {
234 .num_resources = ARRAY_SIZE(c67x00_res),
235 .resource = c67x00_res,
237 .platform_data = &c67x00_pdata,
241 /*----------------------------------------------------------------------------
245 static struct resource serial_resource = {
246 .start = DUART16552_PADDR,
247 .end = DUART16552_PADDR + 0x1f,
248 .flags = IORESOURCE_MEM,
251 static struct plat_serial8250_port serial_platform_data[] = {
253 .mapbase = DUART16552_PADDR,
254 .irq = XTENSA_PIC_LINUX_IRQ(DUART16552_INTNUM),
255 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
257 .iotype = XCHAL_HAVE_BE ? UPIO_MEM32BE : UPIO_MEM32,
259 .uartclk = 0, /* set in xtavnet_init() */
264 static struct platform_device xtavnet_uart = {
265 .name = "serial8250",
266 .id = PLAT8250_DEV_PLATFORM,
268 .platform_data = serial_platform_data,
271 .resource = &serial_resource,
274 /* platform devices */
275 static struct platform_device *platform_devices[] __initdata = {
282 static int __init xtavnet_init(void)
284 /* Ethernet MAC address. */
285 ethoc_pdata.hwaddr[5] = *(u32 *)DIP_SWITCHES_VADDR;
287 /* Clock rate varies among FPGA bitstreams; board specific FPGA register
288 * reports the actual clock rate.
290 serial_platform_data[0].uartclk = *(long *)XTFPGA_CLKFRQ_VADDR;
293 /* register platform devices */
294 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
296 /* ETHOC driver is a bit quiet; at least display Ethernet MAC, so user
297 * knows whether they set it correctly on the DIP switches.
299 pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
300 ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
306 * Register to be done during do_initcalls().
308 arch_initcall(xtavnet_init);
310 #endif /* CONFIG_USE_OF */