drivers/acpi/acpi_lpss.c

   1 /*
   2  * ACPI support for Intel Lynxpoint LPSS.
   3  *
   4  * Copyright (C) 2013, Intel Corporation
   5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/acpi.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/clk-provider.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/mutex.h>
  19 #include <linux/pci.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/platform_data/clk-lpss.h>
  22 #include <linux/platform_data/x86/pmc_atom.h>
  23 #include <linux/pm_domain.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/pwm.h>
  26 #include <linux/suspend.h>
  27 #include <linux/delay.h>
  28
  29 #include "internal.h"
  30
  31 ACPI_MODULE_NAME("acpi_lpss");
  32
  33 #ifdef CONFIG_X86_INTEL_LPSS
  34
  35 #include <asm/cpu_device_id.h>
  36 #include <asm/intel-family.h>
  37 #include <asm/iosf_mbi.h>
  38
  39 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  40
  41 #define LPSS_CLK_SIZE   0x04
  42 #define LPSS_LTR_SIZE   0x18
  43
  44 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  45 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  46 #define LPSS_RESETS                     0x04
  47 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  48 #define LPSS_RESETS_RESET_APB           BIT(1)
  49 #define LPSS_GENERAL                    0x08
  50 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  51 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  52 #define LPSS_SW_LTR                     0x10
  53 #define LPSS_AUTO_LTR                   0x14
  54 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  55 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  56 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  57 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  58 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  59 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  60 #define LPSS_LTR_MAX_VAL                0x3FF
  61 #define LPSS_TX_INT                     0x20
  62 #define LPSS_TX_INT_MASK                BIT(1)
  63
  64 #define LPSS_PRV_REG_COUNT              9
  65
  66 /* LPSS Flags */
  67 #define LPSS_CLK                        BIT(0)
  68 #define LPSS_CLK_GATE                   BIT(1)
  69 #define LPSS_CLK_DIVIDER                BIT(2)
  70 #define LPSS_LTR                        BIT(3)
  71 #define LPSS_SAVE_CTX                   BIT(4)
  72 #define LPSS_NO_D3_DELAY                BIT(5)
  73
  74 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
  75 #define BYT_CRC_HRV                     2
  76 #define CHT_CRC_HRV                     3
  77
  78 struct lpss_private_data;
  79
  80 struct lpss_device_desc {
  81         unsigned int flags;
  82         const char *clk_con_id;
  83         unsigned int prv_offset;
  84         size_t prv_size_override;
  85         struct property_entry *properties;
  86         void (*setup)(struct lpss_private_data *pdata);
  87         bool resume_from_noirq;
  88 };
  89
  90 static const struct lpss_device_desc lpss_dma_desc = {
  91         .flags = LPSS_CLK,
  92 };
  93
  94 struct lpss_private_data {
  95         struct acpi_device *adev;
  96         void __iomem *mmio_base;
  97         resource_size_t mmio_size;
  98         unsigned int fixed_clk_rate;
  99         struct clk *clk;
 100         const struct lpss_device_desc *dev_desc;
 101         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
 102 };
 103
 104 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
 105 static u32 pmc_atom_d3_mask = 0xfe000ffe;
 106
 107 /* LPSS run time quirks */
 108 static unsigned int lpss_quirks;
 109
 110 /*
 111  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 112  *
 113  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 114  * it can be powered off automatically whenever the last LPSS device goes down.
 115  * In case of no power any access to the DMA controller will hang the system.
 116  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 117  * well as on ASuS T100TA transformer.
 118  *
 119  * This quirk overrides power state of entire LPSS island to keep DMA powered
 120  * on whenever we have at least one other device in use.
 121  */
 122 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 123
 124 /* UART Component Parameter Register */
 125 #define LPSS_UART_CPR                   0xF4
 126 #define LPSS_UART_CPR_AFCE              BIT(4)
 127
 128 static void lpss_uart_setup(struct lpss_private_data *pdata)
 129 {
 130         unsigned int offset;
 131         u32 val;
 132
 133         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 134         val = readl(pdata->mmio_base + offset);
 135         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 136
 137         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 138         if (!(val & LPSS_UART_CPR_AFCE)) {
 139                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 140                 val = readl(pdata->mmio_base + offset);
 141                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 142                 writel(val, pdata->mmio_base + offset);
 143         }
 144 }
 145
 146 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 147 {
 148         unsigned int offset;
 149         u32 val;
 150
 151         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 152         val = readl(pdata->mmio_base + offset);
 153         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 154         writel(val, pdata->mmio_base + offset);
 155 }
 156
 157 /*
 158  * BYT PWM used for backlight control by the i915 driver on systems without
 159  * the Crystal Cove PMIC.
 160  */
 161 static struct pwm_lookup byt_pwm_lookup[] = {
 162         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 163                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 164                                "pwm-lpss-platform"),
 165 };
 166
 167 static void byt_pwm_setup(struct lpss_private_data *pdata)
 168 {
 169         struct acpi_device *adev = pdata->adev;
 170
 171         /* Only call pwm_add_table for the first PWM controller */
 172         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 173                 return;
 174
 175         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
 176                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 177 }
 178
 179 #define LPSS_I2C_ENABLE                 0x6c
 180
 181 static void byt_i2c_setup(struct lpss_private_data *pdata)
 182 {
 183         const char *uid_str = acpi_device_uid(pdata->adev);
 184         acpi_handle handle = pdata->adev->handle;
 185         unsigned long long shared_host = 0;
 186         acpi_status status;
 187         long uid = 0;
 188
 189         /* Expected to always be true, but better safe then sorry */
 190         if (uid_str)
 191                 uid = simple_strtol(uid_str, NULL, 10);
 192
 193         /* Detect I2C bus shared with PUNIT and ignore its d3 status */
 194         status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
 195         if (ACPI_SUCCESS(status) && shared_host && uid)
 196                 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
 197
 198         lpss_deassert_reset(pdata);
 199
 200         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 201                 pdata->fixed_clk_rate = 133000000;
 202
 203         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 204 }
 205
 206 /* BSW PWM used for backlight control by the i915 driver */
 207 static struct pwm_lookup bsw_pwm_lookup[] = {
 208         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 209                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 210                                "pwm-lpss-platform"),
 211 };
 212
 213 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 214 {
 215         struct acpi_device *adev = pdata->adev;
 216
 217         /* Only call pwm_add_table for the first PWM controller */
 218         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 219                 return;
 220
 221         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 222 }
 223
 224 static const struct lpss_device_desc lpt_dev_desc = {
 225         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 226         .prv_offset = 0x800,
 227 };
 228
 229 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 230         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
 231         .prv_offset = 0x800,
 232 };
 233
 234 static struct property_entry uart_properties[] = {
 235         PROPERTY_ENTRY_U32("reg-io-width", 4),
 236         PROPERTY_ENTRY_U32("reg-shift", 2),
 237         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 238         { },
 239 };
 240
 241 static const struct lpss_device_desc lpt_uart_dev_desc = {
 242         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 243         .clk_con_id = "baudclk",
 244         .prv_offset = 0x800,
 245         .setup = lpss_uart_setup,
 246         .properties = uart_properties,
 247 };
 248
 249 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 250         .flags = LPSS_LTR,
 251         .prv_offset = 0x1000,
 252         .prv_size_override = 0x1018,
 253 };
 254
 255 static const struct lpss_device_desc byt_pwm_dev_desc = {
 256         .flags = LPSS_SAVE_CTX,
 257         .prv_offset = 0x800,
 258         .setup = byt_pwm_setup,
 259 };
 260
 261 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 262         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 263         .prv_offset = 0x800,
 264         .setup = bsw_pwm_setup,
 265 };
 266
 267 static const struct lpss_device_desc byt_uart_dev_desc = {
 268         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 269         .clk_con_id = "baudclk",
 270         .prv_offset = 0x800,
 271         .setup = lpss_uart_setup,
 272         .properties = uart_properties,
 273 };
 274
 275 static const struct lpss_device_desc bsw_uart_dev_desc = {
 276         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 277                         | LPSS_NO_D3_DELAY,
 278         .clk_con_id = "baudclk",
 279         .prv_offset = 0x800,
 280         .setup = lpss_uart_setup,
 281         .properties = uart_properties,
 282 };
 283
 284 static const struct lpss_device_desc byt_spi_dev_desc = {
 285         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 286         .prv_offset = 0x400,
 287 };
 288
 289 static const struct lpss_device_desc byt_sdio_dev_desc = {
 290         .flags = LPSS_CLK,
 291 };
 292
 293 static const struct lpss_device_desc byt_i2c_dev_desc = {
 294         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 295         .prv_offset = 0x800,
 296         .setup = byt_i2c_setup,
 297         .resume_from_noirq = true,
 298 };
 299
 300 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 301         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 302         .prv_offset = 0x800,
 303         .setup = byt_i2c_setup,
 304         .resume_from_noirq = true,
 305 };
 306
 307 static const struct lpss_device_desc bsw_spi_dev_desc = {
 308         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 309                         | LPSS_NO_D3_DELAY,
 310         .prv_offset = 0x400,
 311         .setup = lpss_deassert_reset,
 312 };
 313
 314 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 315
 316 static const struct x86_cpu_id lpss_cpu_ids[] = {
 317         ICPU(INTEL_FAM6_ATOM_SILVERMONT),       /* Valleyview, Bay Trail */
 318         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 319         {}
 320 };
 321
 322 #else
 323
 324 #define LPSS_ADDR(desc) (0UL)
 325
 326 #endif /* CONFIG_X86_INTEL_LPSS */
 327
 328 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 329         /* Generic LPSS devices */
 330         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 331
 332         /* Lynxpoint LPSS devices */
 333         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 334         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 335         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 336         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 337         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 338         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 339         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 340         { "INT33C7", },
 341
 342         /* BayTrail LPSS devices */
 343         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 344         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 345         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 346         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 347         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 348         { "INT33B2", },
 349         { "INT33FC", },
 350
 351         /* Braswell LPSS devices */
 352         { "80862286", LPSS_ADDR(lpss_dma_desc) },
 353         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 354         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 355         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 356         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
 357         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 358
 359         /* Broadwell LPSS devices */
 360         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 361         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 362         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 363         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 364         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 365         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 366         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 367         { "INT3437", },
 368
 369         /* Wildcat Point LPSS devices */
 370         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 371
 372         { }
 373 };
 374
 375 #ifdef CONFIG_X86_INTEL_LPSS
 376
 377 static int is_memory(struct acpi_resource *res, void *not_used)
 378 {
 379         struct resource r;
 380         return !acpi_dev_resource_memory(res, &r);
 381 }
 382
 383 /* LPSS main clock device. */
 384 static struct platform_device *lpss_clk_dev;
 385
 386 static inline void lpt_register_clock_device(void)
 387 {
 388         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 389 }
 390
 391 static int register_device_clock(struct acpi_device *adev,
 392                                  struct lpss_private_data *pdata)
 393 {
 394         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 395         const char *devname = dev_name(&adev->dev);
 396         struct clk *clk;
 397         struct lpss_clk_data *clk_data;
 398         const char *parent, *clk_name;
 399         void __iomem *prv_base;
 400
 401         if (!lpss_clk_dev)
 402                 lpt_register_clock_device();
 403
 404         if (IS_ERR(lpss_clk_dev))
 405                 return PTR_ERR(lpss_clk_dev);
 406
 407         clk_data = platform_get_drvdata(lpss_clk_dev);
 408         if (!clk_data)
 409                 return -ENODEV;
 410         clk = clk_data->clk;
 411
 412         if (!pdata->mmio_base
 413             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 414                 return -ENODATA;
 415
 416         parent = clk_data->name;
 417         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 418
 419         if (pdata->fixed_clk_rate) {
 420                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 421                                               pdata->fixed_clk_rate);
 422                 goto out;
 423         }
 424
 425         if (dev_desc->flags & LPSS_CLK_GATE) {
 426                 clk = clk_register_gate(NULL, devname, parent, 0,
 427                                         prv_base, 0, 0, NULL);
 428                 parent = devname;
 429         }
 430
 431         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 432                 /* Prevent division by zero */
 433                 if (!readl(prv_base))
 434                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 435
 436                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 437                 if (!clk_name)
 438                         return -ENOMEM;
 439                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 440                                                       0, prv_base,
 441                                                       1, 15, 16, 15, 0, NULL);
 442                 parent = clk_name;
 443
 444                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 445                 if (!clk_name) {
 446                         kfree(parent);
 447                         return -ENOMEM;
 448                 }
 449                 clk = clk_register_gate(NULL, clk_name, parent,
 450                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 451                                         prv_base, 31, 0, NULL);
 452                 kfree(parent);
 453                 kfree(clk_name);
 454         }
 455 out:
 456         if (IS_ERR(clk))
 457                 return PTR_ERR(clk);
 458
 459         pdata->clk = clk;
 460         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 461         return 0;
 462 }
 463
 464 struct lpss_device_links {
 465         const char *supplier_hid;
 466         const char *supplier_uid;
 467         const char *consumer_hid;
 468         const char *consumer_uid;
 469         u32 flags;
 470 };
 471
 472 /*
 473  * The _DEP method is used to identify dependencies but instead of creating
 474  * device links for every handle in _DEP, only links in the following list are
 475  * created. That is necessary because, in the general case, _DEP can refer to
 476  * devices that might not have drivers, or that are on different buses, or where
 477  * the supplier is not enumerated until after the consumer is probed.
 478  */
 479 static const struct lpss_device_links lpss_device_links[] = {
 480         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 481 };
 482
 483 static bool hid_uid_match(const char *hid1, const char *uid1,
 484                           const char *hid2, const char *uid2)
 485 {
 486         return !strcmp(hid1, hid2) && uid1 && uid2 && !strcmp(uid1, uid2);
 487 }
 488
 489 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 490                                   const struct lpss_device_links *link)
 491 {
 492         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 493                              link->supplier_hid, link->supplier_uid);
 494 }
 495
 496 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 497                                   const struct lpss_device_links *link)
 498 {
 499         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 500                              link->consumer_hid, link->consumer_uid);
 501 }
 502
 503 struct hid_uid {
 504         const char *hid;
 505         const char *uid;
 506 };
 507
 508 static int match_hid_uid(struct device *dev, void *data)
 509 {
 510         struct acpi_device *adev = ACPI_COMPANION(dev);
 511         struct hid_uid *id = data;
 512
 513         if (!adev)
 514                 return 0;
 515
 516         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 517                              id->hid, id->uid);
 518 }
 519
 520 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 521 {
 522         struct device *dev;
 523
 524         struct hid_uid data = {
 525                 .hid = hid,
 526                 .uid = uid,
 527         };
 528
 529         dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 530         if (dev)
 531                 return dev;
 532
 533         return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
 534 }
 535
 536 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 537 {
 538         struct acpi_handle_list dep_devices;
 539         acpi_status status;
 540         int i;
 541
 542         if (!acpi_has_method(adev->handle, "_DEP"))
 543                 return false;
 544
 545         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 546                                          &dep_devices);
 547         if (ACPI_FAILURE(status)) {
 548                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 549                 return false;
 550         }
 551
 552         for (i = 0; i < dep_devices.count; i++) {
 553                 if (dep_devices.handles[i] == handle)
 554                         return true;
 555         }
 556
 557         return false;
 558 }
 559
 560 static void acpi_lpss_link_consumer(struct device *dev1,
 561                                     const struct lpss_device_links *link)
 562 {
 563         struct device *dev2;
 564
 565         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 566         if (!dev2)
 567                 return;
 568
 569         if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 570                 device_link_add(dev2, dev1, link->flags);
 571
 572         put_device(dev2);
 573 }
 574
 575 static void acpi_lpss_link_supplier(struct device *dev1,
 576                                     const struct lpss_device_links *link)
 577 {
 578         struct device *dev2;
 579
 580         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 581         if (!dev2)
 582                 return;
 583
 584         if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 585                 device_link_add(dev1, dev2, link->flags);
 586
 587         put_device(dev2);
 588 }
 589
 590 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 591                                           struct platform_device *pdev)
 592 {
 593         int i;
 594
 595         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 596                 const struct lpss_device_links *link = &lpss_device_links[i];
 597
 598                 if (acpi_lpss_is_supplier(adev, link))
 599                         acpi_lpss_link_consumer(&pdev->dev, link);
 600
 601                 if (acpi_lpss_is_consumer(adev, link))
 602                         acpi_lpss_link_supplier(&pdev->dev, link);
 603         }
 604 }
 605
 606 static int acpi_lpss_create_device(struct acpi_device *adev,
 607                                    const struct acpi_device_id *id)
 608 {
 609         const struct lpss_device_desc *dev_desc;
 610         struct lpss_private_data *pdata;
 611         struct resource_entry *rentry;
 612         struct list_head resource_list;
 613         struct platform_device *pdev;
 614         int ret;
 615
 616         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 617         if (!dev_desc) {
 618                 pdev = acpi_create_platform_device(adev, NULL);
 619                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 620         }
 621         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 622         if (!pdata)
 623                 return -ENOMEM;
 624
 625         INIT_LIST_HEAD(&resource_list);
 626         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 627         if (ret < 0)
 628                 goto err_out;
 629
 630         list_for_each_entry(rentry, &resource_list, node)
 631                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 632                         if (dev_desc->prv_size_override)
 633                                 pdata->mmio_size = dev_desc->prv_size_override;
 634                         else
 635                                 pdata->mmio_size = resource_size(rentry->res);
 636                         pdata->mmio_base = ioremap(rentry->res->start,
 637                                                    pdata->mmio_size);
 638                         break;
 639                 }
 640
 641         acpi_dev_free_resource_list(&resource_list);
 642
 643         if (!pdata->mmio_base) {
 644                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 645                 adev->pnp.type.platform_id = 0;
 646                 /* Skip the device, but continue the namespace scan. */
 647                 ret = 0;
 648                 goto err_out;
 649         }
 650
 651         pdata->adev = adev;
 652         pdata->dev_desc = dev_desc;
 653
 654         if (dev_desc->setup)
 655                 dev_desc->setup(pdata);
 656
 657         if (dev_desc->flags & LPSS_CLK) {
 658                 ret = register_device_clock(adev, pdata);
 659                 if (ret) {
 660                         /* Skip the device, but continue the namespace scan. */
 661                         ret = 0;
 662                         goto err_out;
 663                 }
 664         }
 665
 666         /*
 667          * This works around a known issue in ACPI tables where LPSS devices
 668          * have _PS0 and _PS3 without _PSC (and no power resources), so
 669          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 670          */
 671         acpi_device_fix_up_power(adev);
 672
 673         adev->driver_data = pdata;
 674         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 675         if (!IS_ERR_OR_NULL(pdev)) {
 676                 acpi_lpss_create_device_links(adev, pdev);
 677                 return 1;
 678         }
 679
 680         ret = PTR_ERR(pdev);
 681         adev->driver_data = NULL;
 682
 683  err_out:
 684         kfree(pdata);
 685         return ret;
 686 }
 687
 688 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 689 {
 690         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 691 }
 692
 693 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 694                              unsigned int reg)
 695 {
 696         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 697 }
 698
 699 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 700 {
 701         struct acpi_device *adev;
 702         struct lpss_private_data *pdata;
 703         unsigned long flags;
 704         int ret;
 705
 706         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 707         if (WARN_ON(ret))
 708                 return ret;
 709
 710         spin_lock_irqsave(&dev->power.lock, flags);
 711         if (pm_runtime_suspended(dev)) {
 712                 ret = -EAGAIN;
 713                 goto out;
 714         }
 715         pdata = acpi_driver_data(adev);
 716         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 717                 ret = -ENODEV;
 718                 goto out;
 719         }
 720         *val = __lpss_reg_read(pdata, reg);
 721
 722  out:
 723         spin_unlock_irqrestore(&dev->power.lock, flags);
 724         return ret;
 725 }
 726
 727 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 728                              char *buf)
 729 {
 730         u32 ltr_value = 0;
 731         unsigned int reg;
 732         int ret;
 733
 734         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 735         ret = lpss_reg_read(dev, reg, &ltr_value);
 736         if (ret)
 737                 return ret;
 738
 739         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 740 }
 741
 742 static ssize_t lpss_ltr_mode_show(struct device *dev,
 743                                   struct device_attribute *attr, char *buf)
 744 {
 745         u32 ltr_mode = 0;
 746         char *outstr;
 747         int ret;
 748
 749         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 750         if (ret)
 751                 return ret;
 752
 753         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 754         return sprintf(buf, "%s\n", outstr);
 755 }
 756
 757 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 758 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 759 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 760
 761 static struct attribute *lpss_attrs[] = {
 762         &dev_attr_auto_ltr.attr,
 763         &dev_attr_sw_ltr.attr,
 764         &dev_attr_ltr_mode.attr,
 765         NULL,
 766 };
 767
 768 static const struct attribute_group lpss_attr_group = {
 769         .attrs = lpss_attrs,
 770         .name = "lpss_ltr",
 771 };
 772
 773 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 774 {
 775         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 776         u32 ltr_mode, ltr_val;
 777
 778         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 779         if (val < 0) {
 780                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 781                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 782                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 783                 }
 784                 return;
 785         }
 786         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 787         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 788                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 789                 val = LPSS_LTR_MAX_VAL;
 790         } else if (val > LPSS_LTR_MAX_VAL) {
 791                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 792                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 793         } else {
 794                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 795         }
 796         ltr_val |= val;
 797         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 798         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 799                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 800                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 801         }
 802 }
 803
 804 #ifdef CONFIG_PM
 805 /**
 806  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 807  * @dev: LPSS device
 808  * @pdata: pointer to the private data of the LPSS device
 809  *
 810  * Most LPSS devices have private registers which may loose their context when
 811  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 812  * prv_reg_ctx array.
 813  */
 814 static void acpi_lpss_save_ctx(struct device *dev,
 815                                struct lpss_private_data *pdata)
 816 {
 817         unsigned int i;
 818
 819         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 820                 unsigned long offset = i * sizeof(u32);
 821
 822                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 823                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 824                         pdata->prv_reg_ctx[i], offset);
 825         }
 826 }
 827
 828 /**
 829  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 830  * @dev: LPSS device
 831  * @pdata: pointer to the private data of the LPSS device
 832  *
 833  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 834  */
 835 static void acpi_lpss_restore_ctx(struct device *dev,
 836                                   struct lpss_private_data *pdata)
 837 {
 838         unsigned int i;
 839
 840         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 841                 unsigned long offset = i * sizeof(u32);
 842
 843                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 844                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 845                         pdata->prv_reg_ctx[i], offset);
 846         }
 847 }
 848
 849 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 850 {
 851         /*
 852          * The following delay is needed or the subsequent write operations may
 853          * fail. The LPSS devices are actually PCI devices and the PCI spec
 854          * expects 10ms delay before the device can be accessed after D3 to D0
 855          * transition. However some platforms like BSW does not need this delay.
 856          */
 857         unsigned int delay = 10;        /* default 10ms delay */
 858
 859         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 860                 delay = 0;
 861
 862         msleep(delay);
 863 }
 864
 865 static int acpi_lpss_activate(struct device *dev)
 866 {
 867         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 868         int ret;
 869
 870         ret = acpi_dev_resume(dev);
 871         if (ret)
 872                 return ret;
 873
 874         acpi_lpss_d3_to_d0_delay(pdata);
 875
 876         /*
 877          * This is called only on ->probe() stage where a device is either in
 878          * known state defined by BIOS or most likely powered off. Due to this
 879          * we have to deassert reset line to be sure that ->probe() will
 880          * recognize the device.
 881          */
 882         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 883                 lpss_deassert_reset(pdata);
 884
 885         return 0;
 886 }
 887
 888 static void acpi_lpss_dismiss(struct device *dev)
 889 {
 890         acpi_dev_suspend(dev, false);
 891 }
 892
 893 /* IOSF SB for LPSS island */
 894 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 895 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 896 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 897
 898 #define LPSS_IOSF_PMCSR                 0x84
 899 #define LPSS_PMCSR_D0                   0
 900 #define LPSS_PMCSR_D3hot                3
 901 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 902
 903 #define LPSS_IOSF_GPIODEF0              0x154
 904 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 905 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 906 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 907 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 908
 909 static DEFINE_MUTEX(lpss_iosf_mutex);
 910 static bool lpss_iosf_d3_entered = true;
 911
 912 static void lpss_iosf_enter_d3_state(void)
 913 {
 914         u32 value1 = 0;
 915         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 916         u32 value2 = LPSS_PMCSR_D3hot;
 917         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 918         /*
 919          * PMC provides an information about actual status of the LPSS devices.
 920          * Here we read the values related to LPSS power island, i.e. LPSS
 921          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 922          */
 923         u32 func_dis, d3_sts_0, pmc_status;
 924         int ret;
 925
 926         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 927         if (ret)
 928                 return;
 929
 930         mutex_lock(&lpss_iosf_mutex);
 931
 932         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 933         if (ret)
 934                 goto exit;
 935
 936         /*
 937          * Get the status of entire LPSS power island per device basis.
 938          * Shutdown both LPSS DMA controllers if and only if all other devices
 939          * are already in D3hot.
 940          */
 941         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
 942         if (pmc_status)
 943                 goto exit;
 944
 945         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 946                         LPSS_IOSF_PMCSR, value2, mask2);
 947
 948         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 949                         LPSS_IOSF_PMCSR, value2, mask2);
 950
 951         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 952                         LPSS_IOSF_GPIODEF0, value1, mask1);
 953
 954         lpss_iosf_d3_entered = true;
 955
 956 exit:
 957         mutex_unlock(&lpss_iosf_mutex);
 958 }
 959
 960 static void lpss_iosf_exit_d3_state(void)
 961 {
 962         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 963                      LPSS_GPIODEF0_DMA_LLP;
 964         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 965         u32 value2 = LPSS_PMCSR_D0;
 966         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 967
 968         mutex_lock(&lpss_iosf_mutex);
 969
 970         if (!lpss_iosf_d3_entered)
 971                 goto exit;
 972
 973         lpss_iosf_d3_entered = false;
 974
 975         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 976                         LPSS_IOSF_GPIODEF0, value1, mask1);
 977
 978         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 979                         LPSS_IOSF_PMCSR, value2, mask2);
 980
 981         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 982                         LPSS_IOSF_PMCSR, value2, mask2);
 983
 984 exit:
 985         mutex_unlock(&lpss_iosf_mutex);
 986 }
 987
 988 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
 989 {
 990         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 991         int ret;
 992
 993         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 994                 acpi_lpss_save_ctx(dev, pdata);
 995
 996         ret = acpi_dev_suspend(dev, wakeup);
 997
 998         /*
 999          * This call must be last in the sequence, otherwise PMC will return
1000          * wrong status for devices being about to be powered off. See
1001          * lpss_iosf_enter_d3_state() for further information.
1002          */
1003         if (acpi_target_system_state() == ACPI_STATE_S0 &&
1004             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1005                 lpss_iosf_enter_d3_state();
1006
1007         return ret;
1008 }
1009
1010 static int acpi_lpss_resume(struct device *dev)
1011 {
1012         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1013         int ret;
1014
1015         /*
1016          * This call is kept first to be in symmetry with
1017          * acpi_lpss_runtime_suspend() one.
1018          */
1019         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1020                 lpss_iosf_exit_d3_state();
1021
1022         ret = acpi_dev_resume(dev);
1023         if (ret)
1024                 return ret;
1025
1026         acpi_lpss_d3_to_d0_delay(pdata);
1027
1028         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1029                 acpi_lpss_restore_ctx(dev, pdata);
1030
1031         return 0;
1032 }
1033
1034 #ifdef CONFIG_PM_SLEEP
1035 static int acpi_lpss_do_suspend_late(struct device *dev)
1036 {
1037         int ret;
1038
1039         if (dev_pm_smart_suspend_and_suspended(dev))
1040                 return 0;
1041
1042         ret = pm_generic_suspend_late(dev);
1043         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1044 }
1045
1046 static int acpi_lpss_suspend_late(struct device *dev)
1047 {
1048         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1049
1050         if (pdata->dev_desc->resume_from_noirq)
1051                 return 0;
1052
1053         return acpi_lpss_do_suspend_late(dev);
1054 }
1055
1056 static int acpi_lpss_suspend_noirq(struct device *dev)
1057 {
1058         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1059         int ret;
1060
1061         if (pdata->dev_desc->resume_from_noirq) {
1062                 /*
1063                  * The driver's ->suspend_late callback will be invoked by
1064                  * acpi_lpss_do_suspend_late(), with the assumption that the
1065                  * driver really wanted to run that code in ->suspend_noirq, but
1066                  * it could not run after acpi_dev_suspend() and the driver
1067                  * expected the latter to be called in the "late" phase.
1068                  */
1069                 ret = acpi_lpss_do_suspend_late(dev);
1070                 if (ret)
1071                         return ret;
1072         }
1073
1074         return acpi_subsys_suspend_noirq(dev);
1075 }
1076
1077 static int acpi_lpss_do_resume_early(struct device *dev)
1078 {
1079         int ret = acpi_lpss_resume(dev);
1080
1081         return ret ? ret : pm_generic_resume_early(dev);
1082 }
1083
1084 static int acpi_lpss_resume_early(struct device *dev)
1085 {
1086         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1087
1088         if (pdata->dev_desc->resume_from_noirq)
1089                 return 0;
1090
1091         return acpi_lpss_do_resume_early(dev);
1092 }
1093
1094 static int acpi_lpss_resume_noirq(struct device *dev)
1095 {
1096         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1097         int ret;
1098
1099         /* Follow acpi_subsys_resume_noirq(). */
1100         if (dev_pm_may_skip_resume(dev))
1101                 return 0;
1102
1103         if (dev_pm_smart_suspend_and_suspended(dev))
1104                 pm_runtime_set_active(dev);
1105
1106         ret = pm_generic_resume_noirq(dev);
1107         if (ret)
1108                 return ret;
1109
1110         if (!pdata->dev_desc->resume_from_noirq)
1111                 return 0;
1112
1113         /*
1114          * The driver's ->resume_early callback will be invoked by
1115          * acpi_lpss_do_resume_early(), with the assumption that the driver
1116          * really wanted to run that code in ->resume_noirq, but it could not
1117          * run before acpi_dev_resume() and the driver expected the latter to be
1118          * called in the "early" phase.
1119          */
1120         return acpi_lpss_do_resume_early(dev);
1121 }
1122
1123 static int acpi_lpss_do_restore_early(struct device *dev)
1124 {
1125         int ret = acpi_lpss_resume(dev);
1126
1127         return ret ? ret : pm_generic_restore_early(dev);
1128 }
1129
1130 static int acpi_lpss_restore_early(struct device *dev)
1131 {
1132         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1133
1134         if (pdata->dev_desc->resume_from_noirq)
1135                 return 0;
1136
1137         return acpi_lpss_do_restore_early(dev);
1138 }
1139
1140 static int acpi_lpss_restore_noirq(struct device *dev)
1141 {
1142         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1143         int ret;
1144
1145         ret = pm_generic_restore_noirq(dev);
1146         if (ret)
1147                 return ret;
1148
1149         if (!pdata->dev_desc->resume_from_noirq)
1150                 return 0;
1151
1152         /* This is analogous to what happens in acpi_lpss_resume_noirq(). */
1153         return acpi_lpss_do_restore_early(dev);
1154 }
1155
1156 static int acpi_lpss_do_poweroff_late(struct device *dev)
1157 {
1158         int ret = pm_generic_poweroff_late(dev);
1159
1160         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1161 }
1162
1163 static int acpi_lpss_poweroff_late(struct device *dev)
1164 {
1165         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1166
1167         if (dev_pm_smart_suspend_and_suspended(dev))
1168                 return 0;
1169
1170         if (pdata->dev_desc->resume_from_noirq)
1171                 return 0;
1172
1173         return acpi_lpss_do_poweroff_late(dev);
1174 }
1175
1176 static int acpi_lpss_poweroff_noirq(struct device *dev)
1177 {
1178         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1179
1180         if (dev_pm_smart_suspend_and_suspended(dev))
1181                 return 0;
1182
1183         if (pdata->dev_desc->resume_from_noirq) {
1184                 /* This is analogous to the acpi_lpss_suspend_noirq() case. */
1185                 int ret = acpi_lpss_do_poweroff_late(dev);
1186                 if (ret)
1187                         return ret;
1188         }
1189
1190         return pm_generic_poweroff_noirq(dev);
1191 }
1192 #endif /* CONFIG_PM_SLEEP */
1193
1194 static int acpi_lpss_runtime_suspend(struct device *dev)
1195 {
1196         int ret = pm_generic_runtime_suspend(dev);
1197
1198         return ret ? ret : acpi_lpss_suspend(dev, true);
1199 }
1200
1201 static int acpi_lpss_runtime_resume(struct device *dev)
1202 {
1203         int ret = acpi_lpss_resume(dev);
1204
1205         return ret ? ret : pm_generic_runtime_resume(dev);
1206 }
1207 #endif /* CONFIG_PM */
1208
1209 static struct dev_pm_domain acpi_lpss_pm_domain = {
1210 #ifdef CONFIG_PM
1211         .activate = acpi_lpss_activate,
1212         .dismiss = acpi_lpss_dismiss,
1213 #endif
1214         .ops = {
1215 #ifdef CONFIG_PM
1216 #ifdef CONFIG_PM_SLEEP
1217                 .prepare = acpi_subsys_prepare,
1218                 .complete = acpi_subsys_complete,
1219                 .suspend = acpi_subsys_suspend,
1220                 .suspend_late = acpi_lpss_suspend_late,
1221                 .suspend_noirq = acpi_lpss_suspend_noirq,
1222                 .resume_noirq = acpi_lpss_resume_noirq,
1223                 .resume_early = acpi_lpss_resume_early,
1224                 .freeze = acpi_subsys_freeze,
1225                 .poweroff = acpi_subsys_poweroff,
1226                 .poweroff_late = acpi_lpss_poweroff_late,
1227                 .poweroff_noirq = acpi_lpss_poweroff_noirq,
1228                 .restore_noirq = acpi_lpss_restore_noirq,
1229                 .restore_early = acpi_lpss_restore_early,
1230 #endif
1231                 .runtime_suspend = acpi_lpss_runtime_suspend,
1232                 .runtime_resume = acpi_lpss_runtime_resume,
1233 #endif
1234         },
1235 };
1236
1237 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1238                                      unsigned long action, void *data)
1239 {
1240         struct platform_device *pdev = to_platform_device(data);
1241         struct lpss_private_data *pdata;
1242         struct acpi_device *adev;
1243         const struct acpi_device_id *id;
1244
1245         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1246         if (!id || !id->driver_data)
1247                 return 0;
1248
1249         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1250                 return 0;
1251
1252         pdata = acpi_driver_data(adev);
1253         if (!pdata)
1254                 return 0;
1255
1256         if (pdata->mmio_base &&
1257             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1258                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1259                 return 0;
1260         }
1261
1262         switch (action) {
1263         case BUS_NOTIFY_BIND_DRIVER:
1264                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1265                 break;
1266         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1267         case BUS_NOTIFY_UNBOUND_DRIVER:
1268                 dev_pm_domain_set(&pdev->dev, NULL);
1269                 break;
1270         case BUS_NOTIFY_ADD_DEVICE:
1271                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1272                 if (pdata->dev_desc->flags & LPSS_LTR)
1273                         return sysfs_create_group(&pdev->dev.kobj,
1274                                                   &lpss_attr_group);
1275                 break;
1276         case BUS_NOTIFY_DEL_DEVICE:
1277                 if (pdata->dev_desc->flags & LPSS_LTR)
1278                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1279                 dev_pm_domain_set(&pdev->dev, NULL);
1280                 break;
1281         default:
1282                 break;
1283         }
1284
1285         return 0;
1286 }
1287
1288 static struct notifier_block acpi_lpss_nb = {
1289         .notifier_call = acpi_lpss_platform_notify,
1290 };
1291
1292 static void acpi_lpss_bind(struct device *dev)
1293 {
1294         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1295
1296         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1297                 return;
1298
1299         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1300                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1301         else
1302                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1303 }
1304
1305 static void acpi_lpss_unbind(struct device *dev)
1306 {
1307         dev->power.set_latency_tolerance = NULL;
1308 }
1309
1310 static struct acpi_scan_handler lpss_handler = {
1311         .ids = acpi_lpss_device_ids,
1312         .attach = acpi_lpss_create_device,
1313         .bind = acpi_lpss_bind,
1314         .unbind = acpi_lpss_unbind,
1315 };
1316
1317 void __init acpi_lpss_init(void)
1318 {
1319         const struct x86_cpu_id *id;
1320         int ret;
1321
1322         ret = lpt_clk_init();
1323         if (ret)
1324                 return;
1325
1326         id = x86_match_cpu(lpss_cpu_ids);
1327         if (id)
1328                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1329
1330         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1331         acpi_scan_add_handler(&lpss_handler);
1332 }
1333
1334 #else
1335
1336 static struct acpi_scan_handler lpss_handler = {
1337         .ids = acpi_lpss_device_ids,
1338 };
1339
1340 void __init acpi_lpss_init(void)
1341 {
1342         acpi_scan_add_handler(&lpss_handler);
1343 }
1344
1345 #endif /* CONFIG_X86_INTEL_LPSS */