drivers/atm/idt77252.c

   1 /*******************************************************************
   2  *
   3  * Copyright (c) 2000 ATecoM GmbH
   4  *
   5  * The author may be reached at ecd@atecom.com.
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  *
  12  * THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR   IMPLIED
  13  * WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  14  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  15  * NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT,  INDIRECT,
  16  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17  * NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  18  * USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  19  * ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  20  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  21  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22  *
  23  * You should have received a copy of the  GNU General Public License along
  24  * with this program; if not, write  to the Free Software Foundation, Inc.,
  25  * 675 Mass Ave, Cambridge, MA 02139, USA.
  26  *
  27  *******************************************************************/
  28
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/poison.h>
  32 #include <linux/skbuff.h>
  33 #include <linux/kernel.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/atmdev.h>
  37 #include <linux/atm.h>
  38 #include <linux/delay.h>
  39 #include <linux/init.h>
  40 #include <linux/interrupt.h>
  41 #include <linux/bitops.h>
  42 #include <linux/wait.h>
  43 #include <linux/jiffies.h>
  44 #include <linux/mutex.h>
  45 #include <linux/slab.h>
  46
  47 #include <asm/io.h>
  48 #include <linux/uaccess.h>
  49 #include <linux/atomic.h>
  50 #include <asm/byteorder.h>
  51
  52 #ifdef CONFIG_ATM_IDT77252_USE_SUNI
  53 #include "suni.h"
  54 #endif /* CONFIG_ATM_IDT77252_USE_SUNI */
  55
  56
  57 #include "idt77252.h"
  58 #include "idt77252_tables.h"
  59
  60 static unsigned int vpibits = 1;
  61
  62
  63 #define ATM_IDT77252_SEND_IDLE 1
  64
  65
  66 /*
  67  * Debug HACKs.
  68  */
  69 #define DEBUG_MODULE 1
  70 #undef HAVE_EEPROM      /* does not work, yet. */
  71
  72 #ifdef CONFIG_ATM_IDT77252_DEBUG
  73 static unsigned long debug = DBG_GENERAL;
  74 #endif
  75
  76
  77 #define SAR_RX_DELAY    (SAR_CFG_RXINT_NODELAY)
  78
  79
  80 /*
  81  * SCQ Handling.
  82  */
  83 static struct scq_info *alloc_scq(struct idt77252_dev *, int);
  84 static void free_scq(struct idt77252_dev *, struct scq_info *);
  85 static int queue_skb(struct idt77252_dev *, struct vc_map *,
  86                      struct sk_buff *, int oam);
  87 static void drain_scq(struct idt77252_dev *, struct vc_map *);
  88 static unsigned long get_free_scd(struct idt77252_dev *, struct vc_map *);
  89 static void fill_scd(struct idt77252_dev *, struct scq_info *, int);
  90
  91 /*
  92  * FBQ Handling.
  93  */
  94 static int push_rx_skb(struct idt77252_dev *,
  95                        struct sk_buff *, int queue);
  96 static void recycle_rx_skb(struct idt77252_dev *, struct sk_buff *);
  97 static void flush_rx_pool(struct idt77252_dev *, struct rx_pool *);
  98 static void recycle_rx_pool_skb(struct idt77252_dev *,
  99                                 struct rx_pool *);
 100 static void add_rx_skb(struct idt77252_dev *, int queue,
 101                        unsigned int size, unsigned int count);
 102
 103 /*
 104  * RSQ Handling.
 105  */
 106 static int init_rsq(struct idt77252_dev *);
 107 static void deinit_rsq(struct idt77252_dev *);
 108 static void idt77252_rx(struct idt77252_dev *);
 109
 110 /*
 111  * TSQ handling.
 112  */
 113 static int init_tsq(struct idt77252_dev *);
 114 static void deinit_tsq(struct idt77252_dev *);
 115 static void idt77252_tx(struct idt77252_dev *);
 116
 117
 118 /*
 119  * ATM Interface.
 120  */
 121 static void idt77252_dev_close(struct atm_dev *dev);
 122 static int idt77252_open(struct atm_vcc *vcc);
 123 static void idt77252_close(struct atm_vcc *vcc);
 124 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb);
 125 static int idt77252_send_oam(struct atm_vcc *vcc, void *cell,
 126                              int flags);
 127 static void idt77252_phy_put(struct atm_dev *dev, unsigned char value,
 128                              unsigned long addr);
 129 static unsigned char idt77252_phy_get(struct atm_dev *dev, unsigned long addr);
 130 static int idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos,
 131                                int flags);
 132 static int idt77252_proc_read(struct atm_dev *dev, loff_t * pos,
 133                               char *page);
 134 static void idt77252_softint(struct work_struct *work);
 135
 136
 137 static const struct atmdev_ops idt77252_ops =
 138 {
 139         .dev_close      = idt77252_dev_close,
 140         .open           = idt77252_open,
 141         .close          = idt77252_close,
 142         .send           = idt77252_send,
 143         .send_oam       = idt77252_send_oam,
 144         .phy_put        = idt77252_phy_put,
 145         .phy_get        = idt77252_phy_get,
 146         .change_qos     = idt77252_change_qos,
 147         .proc_read      = idt77252_proc_read,
 148         .owner          = THIS_MODULE
 149 };
 150
 151 static struct idt77252_dev *idt77252_chain = NULL;
 152 static unsigned int idt77252_sram_write_errors = 0;
 153
 154 /*****************************************************************************/
 155 /*                                                                           */
 156 /* I/O and Utility Bus                                                       */
 157 /*                                                                           */
 158 /*****************************************************************************/
 159
 160 static void
 161 waitfor_idle(struct idt77252_dev *card)
 162 {
 163         u32 stat;
 164
 165         stat = readl(SAR_REG_STAT);
 166         while (stat & SAR_STAT_CMDBZ)
 167                 stat = readl(SAR_REG_STAT);
 168 }
 169
 170 static u32
 171 read_sram(struct idt77252_dev *card, unsigned long addr)
 172 {
 173         unsigned long flags;
 174         u32 value;
 175
 176         spin_lock_irqsave(&card->cmd_lock, flags);
 177         writel(SAR_CMD_READ_SRAM | (addr << 2), SAR_REG_CMD);
 178         waitfor_idle(card);
 179         value = readl(SAR_REG_DR0);
 180         spin_unlock_irqrestore(&card->cmd_lock, flags);
 181         return value;
 182 }
 183
 184 static void
 185 write_sram(struct idt77252_dev *card, unsigned long addr, u32 value)
 186 {
 187         unsigned long flags;
 188
 189         if ((idt77252_sram_write_errors == 0) &&
 190             (((addr > card->tst[0] + card->tst_size - 2) &&
 191               (addr < card->tst[0] + card->tst_size)) ||
 192              ((addr > card->tst[1] + card->tst_size - 2) &&
 193               (addr < card->tst[1] + card->tst_size)))) {
 194                 printk("%s: ERROR: TST JMP section at %08lx written: %08x\n",
 195                        card->name, addr, value);
 196         }
 197
 198         spin_lock_irqsave(&card->cmd_lock, flags);
 199         writel(value, SAR_REG_DR0);
 200         writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
 201         waitfor_idle(card);
 202         spin_unlock_irqrestore(&card->cmd_lock, flags);
 203 }
 204
 205 static u8
 206 read_utility(void *dev, unsigned long ubus_addr)
 207 {
 208         struct idt77252_dev *card = dev;
 209         unsigned long flags;
 210         u8 value;
 211
 212         if (!card) {
 213                 printk("Error: No such device.\n");
 214                 return -1;
 215         }
 216
 217         spin_lock_irqsave(&card->cmd_lock, flags);
 218         writel(SAR_CMD_READ_UTILITY + ubus_addr, SAR_REG_CMD);
 219         waitfor_idle(card);
 220         value = readl(SAR_REG_DR0);
 221         spin_unlock_irqrestore(&card->cmd_lock, flags);
 222         return value;
 223 }
 224
 225 static void
 226 write_utility(void *dev, unsigned long ubus_addr, u8 value)
 227 {
 228         struct idt77252_dev *card = dev;
 229         unsigned long flags;
 230
 231         if (!card) {
 232                 printk("Error: No such device.\n");
 233                 return;
 234         }
 235
 236         spin_lock_irqsave(&card->cmd_lock, flags);
 237         writel((u32) value, SAR_REG_DR0);
 238         writel(SAR_CMD_WRITE_UTILITY + ubus_addr, SAR_REG_CMD);
 239         waitfor_idle(card);
 240         spin_unlock_irqrestore(&card->cmd_lock, flags);
 241 }
 242
 243 #ifdef HAVE_EEPROM
 244 static u32 rdsrtab[] =
 245 {
 246         SAR_GP_EECS | SAR_GP_EESCLK,
 247         0,
 248         SAR_GP_EESCLK,                  /* 0 */
 249         0,
 250         SAR_GP_EESCLK,                  /* 0 */
 251         0,
 252         SAR_GP_EESCLK,                  /* 0 */
 253         0,
 254         SAR_GP_EESCLK,                  /* 0 */
 255         0,
 256         SAR_GP_EESCLK,                  /* 0 */
 257         SAR_GP_EEDO,
 258         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 259         0,
 260         SAR_GP_EESCLK,                  /* 0 */
 261         SAR_GP_EEDO,
 262         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 263 };
 264
 265 static u32 wrentab[] =
 266 {
 267         SAR_GP_EECS | SAR_GP_EESCLK,
 268         0,
 269         SAR_GP_EESCLK,                  /* 0 */
 270         0,
 271         SAR_GP_EESCLK,                  /* 0 */
 272         0,
 273         SAR_GP_EESCLK,                  /* 0 */
 274         0,
 275         SAR_GP_EESCLK,                  /* 0 */
 276         SAR_GP_EEDO,
 277         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 278         SAR_GP_EEDO,
 279         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 280         0,
 281         SAR_GP_EESCLK,                  /* 0 */
 282         0,
 283         SAR_GP_EESCLK                   /* 0 */
 284 };
 285
 286 static u32 rdtab[] =
 287 {
 288         SAR_GP_EECS | SAR_GP_EESCLK,
 289         0,
 290         SAR_GP_EESCLK,                  /* 0 */
 291         0,
 292         SAR_GP_EESCLK,                  /* 0 */
 293         0,
 294         SAR_GP_EESCLK,                  /* 0 */
 295         0,
 296         SAR_GP_EESCLK,                  /* 0 */
 297         0,
 298         SAR_GP_EESCLK,                  /* 0 */
 299         0,
 300         SAR_GP_EESCLK,                  /* 0 */
 301         SAR_GP_EEDO,
 302         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 303         SAR_GP_EEDO,
 304         SAR_GP_EESCLK | SAR_GP_EEDO     /* 1 */
 305 };
 306
 307 static u32 wrtab[] =
 308 {
 309         SAR_GP_EECS | SAR_GP_EESCLK,
 310         0,
 311         SAR_GP_EESCLK,                  /* 0 */
 312         0,
 313         SAR_GP_EESCLK,                  /* 0 */
 314         0,
 315         SAR_GP_EESCLK,                  /* 0 */
 316         0,
 317         SAR_GP_EESCLK,                  /* 0 */
 318         0,
 319         SAR_GP_EESCLK,                  /* 0 */
 320         0,
 321         SAR_GP_EESCLK,                  /* 0 */
 322         SAR_GP_EEDO,
 323         SAR_GP_EESCLK | SAR_GP_EEDO,    /* 1 */
 324         0,
 325         SAR_GP_EESCLK                   /* 0 */
 326 };
 327
 328 static u32 clktab[] =
 329 {
 330         0,
 331         SAR_GP_EESCLK,
 332         0,
 333         SAR_GP_EESCLK,
 334         0,
 335         SAR_GP_EESCLK,
 336         0,
 337         SAR_GP_EESCLK,
 338         0,
 339         SAR_GP_EESCLK,
 340         0,
 341         SAR_GP_EESCLK,
 342         0,
 343         SAR_GP_EESCLK,
 344         0,
 345         SAR_GP_EESCLK,
 346         0
 347 };
 348
 349 static u32
 350 idt77252_read_gp(struct idt77252_dev *card)
 351 {
 352         u32 gp;
 353
 354         gp = readl(SAR_REG_GP);
 355 #if 0
 356         printk("RD: %s\n", gp & SAR_GP_EEDI ? "1" : "0");
 357 #endif
 358         return gp;
 359 }
 360
 361 static void
 362 idt77252_write_gp(struct idt77252_dev *card, u32 value)
 363 {
 364         unsigned long flags;
 365
 366 #if 0
 367         printk("WR: %s %s %s\n", value & SAR_GP_EECS ? "   " : "/CS",
 368                value & SAR_GP_EESCLK ? "HIGH" : "LOW ",
 369                value & SAR_GP_EEDO   ? "1" : "0");
 370 #endif
 371
 372         spin_lock_irqsave(&card->cmd_lock, flags);
 373         waitfor_idle(card);
 374         writel(value, SAR_REG_GP);
 375         spin_unlock_irqrestore(&card->cmd_lock, flags);
 376 }
 377
 378 static u8
 379 idt77252_eeprom_read_status(struct idt77252_dev *card)
 380 {
 381         u8 byte;
 382         u32 gp;
 383         int i, j;
 384
 385         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 386
 387         for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
 388                 idt77252_write_gp(card, gp | rdsrtab[i]);
 389                 udelay(5);
 390         }
 391         idt77252_write_gp(card, gp | SAR_GP_EECS);
 392         udelay(5);
 393
 394         byte = 0;
 395         for (i = 0, j = 0; i < 8; i++) {
 396                 byte <<= 1;
 397
 398                 idt77252_write_gp(card, gp | clktab[j++]);
 399                 udelay(5);
 400
 401                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 402
 403                 idt77252_write_gp(card, gp | clktab[j++]);
 404                 udelay(5);
 405         }
 406         idt77252_write_gp(card, gp | SAR_GP_EECS);
 407         udelay(5);
 408
 409         return byte;
 410 }
 411
 412 static u8
 413 idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
 414 {
 415         u8 byte;
 416         u32 gp;
 417         int i, j;
 418
 419         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 420
 421         for (i = 0; i < ARRAY_SIZE(rdtab); i++) {
 422                 idt77252_write_gp(card, gp | rdtab[i]);
 423                 udelay(5);
 424         }
 425         idt77252_write_gp(card, gp | SAR_GP_EECS);
 426         udelay(5);
 427
 428         for (i = 0, j = 0; i < 8; i++) {
 429                 idt77252_write_gp(card, gp | clktab[j++] |
 430                                         (offset & 1 ? SAR_GP_EEDO : 0));
 431                 udelay(5);
 432
 433                 idt77252_write_gp(card, gp | clktab[j++] |
 434                                         (offset & 1 ? SAR_GP_EEDO : 0));
 435                 udelay(5);
 436
 437                 offset >>= 1;
 438         }
 439         idt77252_write_gp(card, gp | SAR_GP_EECS);
 440         udelay(5);
 441
 442         byte = 0;
 443         for (i = 0, j = 0; i < 8; i++) {
 444                 byte <<= 1;
 445
 446                 idt77252_write_gp(card, gp | clktab[j++]);
 447                 udelay(5);
 448
 449                 byte |= idt77252_read_gp(card) & SAR_GP_EEDI ? 1 : 0;
 450
 451                 idt77252_write_gp(card, gp | clktab[j++]);
 452                 udelay(5);
 453         }
 454         idt77252_write_gp(card, gp | SAR_GP_EECS);
 455         udelay(5);
 456
 457         return byte;
 458 }
 459
 460 static void
 461 idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
 462 {
 463         u32 gp;
 464         int i, j;
 465
 466         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 467
 468         for (i = 0; i < ARRAY_SIZE(wrentab); i++) {
 469                 idt77252_write_gp(card, gp | wrentab[i]);
 470                 udelay(5);
 471         }
 472         idt77252_write_gp(card, gp | SAR_GP_EECS);
 473         udelay(5);
 474
 475         for (i = 0; i < ARRAY_SIZE(wrtab); i++) {
 476                 idt77252_write_gp(card, gp | wrtab[i]);
 477                 udelay(5);
 478         }
 479         idt77252_write_gp(card, gp | SAR_GP_EECS);
 480         udelay(5);
 481
 482         for (i = 0, j = 0; i < 8; i++) {
 483                 idt77252_write_gp(card, gp | clktab[j++] |
 484                                         (offset & 1 ? SAR_GP_EEDO : 0));
 485                 udelay(5);
 486
 487                 idt77252_write_gp(card, gp | clktab[j++] |
 488                                         (offset & 1 ? SAR_GP_EEDO : 0));
 489                 udelay(5);
 490
 491                 offset >>= 1;
 492         }
 493         idt77252_write_gp(card, gp | SAR_GP_EECS);
 494         udelay(5);
 495
 496         for (i = 0, j = 0; i < 8; i++) {
 497                 idt77252_write_gp(card, gp | clktab[j++] |
 498                                         (data & 1 ? SAR_GP_EEDO : 0));
 499                 udelay(5);
 500
 501                 idt77252_write_gp(card, gp | clktab[j++] |
 502                                         (data & 1 ? SAR_GP_EEDO : 0));
 503                 udelay(5);
 504
 505                 data >>= 1;
 506         }
 507         idt77252_write_gp(card, gp | SAR_GP_EECS);
 508         udelay(5);
 509 }
 510
 511 static void
 512 idt77252_eeprom_init(struct idt77252_dev *card)
 513 {
 514         u32 gp;
 515
 516         gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
 517
 518         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 519         udelay(5);
 520         idt77252_write_gp(card, gp | SAR_GP_EECS);
 521         udelay(5);
 522         idt77252_write_gp(card, gp | SAR_GP_EECS | SAR_GP_EESCLK);
 523         udelay(5);
 524         idt77252_write_gp(card, gp | SAR_GP_EECS);
 525         udelay(5);
 526 }
 527 #endif /* HAVE_EEPROM */
 528
 529
 530 #ifdef CONFIG_ATM_IDT77252_DEBUG
 531 static void
 532 dump_tct(struct idt77252_dev *card, int index)
 533 {
 534         unsigned long tct;
 535         int i;
 536
 537         tct = (unsigned long) (card->tct_base + index * SAR_SRAM_TCT_SIZE);
 538
 539         printk("%s: TCT %x:", card->name, index);
 540         for (i = 0; i < 8; i++) {
 541                 printk(" %08x", read_sram(card, tct + i));
 542         }
 543         printk("\n");
 544 }
 545
 546 static void
 547 idt77252_tx_dump(struct idt77252_dev *card)
 548 {
 549         struct atm_vcc *vcc;
 550         struct vc_map *vc;
 551         int i;
 552
 553         printk("%s\n", __func__);
 554         for (i = 0; i < card->tct_size; i++) {
 555                 vc = card->vcs[i];
 556                 if (!vc)
 557                         continue;
 558
 559                 vcc = NULL;
 560                 if (vc->rx_vcc)
 561                         vcc = vc->rx_vcc;
 562                 else if (vc->tx_vcc)
 563                         vcc = vc->tx_vcc;
 564
 565                 if (!vcc)
 566                         continue;
 567
 568                 printk("%s: Connection %d:\n", card->name, vc->index);
 569                 dump_tct(card, vc->index);
 570         }
 571 }
 572 #endif
 573
 574
 575 /*****************************************************************************/
 576 /*                                                                           */
 577 /* SCQ Handling                                                              */
 578 /*                                                                           */
 579 /*****************************************************************************/
 580
 581 static int
 582 sb_pool_add(struct idt77252_dev *card, struct sk_buff *skb, int queue)
 583 {
 584         struct sb_pool *pool = &card->sbpool[queue];
 585         int index;
 586
 587         index = pool->index;
 588         while (pool->skb[index]) {
 589                 index = (index + 1) & FBQ_MASK;
 590                 if (index == pool->index)
 591                         return -ENOBUFS;
 592         }
 593
 594         pool->skb[index] = skb;
 595         IDT77252_PRV_POOL(skb) = POOL_HANDLE(queue, index);
 596
 597         pool->index = (index + 1) & FBQ_MASK;
 598         return 0;
 599 }
 600
 601 static void
 602 sb_pool_remove(struct idt77252_dev *card, struct sk_buff *skb)
 603 {
 604         unsigned int queue, index;
 605         u32 handle;
 606
 607         handle = IDT77252_PRV_POOL(skb);
 608
 609         queue = POOL_QUEUE(handle);
 610         if (queue > 3)
 611                 return;
 612
 613         index = POOL_INDEX(handle);
 614         if (index > FBQ_SIZE - 1)
 615                 return;
 616
 617         card->sbpool[queue].skb[index] = NULL;
 618 }
 619
 620 static struct sk_buff *
 621 sb_pool_skb(struct idt77252_dev *card, u32 handle)
 622 {
 623         unsigned int queue, index;
 624
 625         queue = POOL_QUEUE(handle);
 626         if (queue > 3)
 627                 return NULL;
 628
 629         index = POOL_INDEX(handle);
 630         if (index > FBQ_SIZE - 1)
 631                 return NULL;
 632
 633         return card->sbpool[queue].skb[index];
 634 }
 635
 636 static struct scq_info *
 637 alloc_scq(struct idt77252_dev *card, int class)
 638 {
 639         struct scq_info *scq;
 640
 641         scq = kzalloc(sizeof(struct scq_info), GFP_KERNEL);
 642         if (!scq)
 643                 return NULL;
 644         scq->base = dma_zalloc_coherent(&card->pcidev->dev, SCQ_SIZE,
 645                                         &scq->paddr, GFP_KERNEL);
 646         if (scq->base == NULL) {
 647                 kfree(scq);
 648                 return NULL;
 649         }
 650
 651         scq->next = scq->base;
 652         scq->last = scq->base + (SCQ_ENTRIES - 1);
 653         atomic_set(&scq->used, 0);
 654
 655         spin_lock_init(&scq->lock);
 656         spin_lock_init(&scq->skblock);
 657
 658         skb_queue_head_init(&scq->transmit);
 659         skb_queue_head_init(&scq->pending);
 660
 661         TXPRINTK("idt77252: SCQ: base 0x%p, next 0x%p, last 0x%p, paddr %08llx\n",
 662                  scq->base, scq->next, scq->last, (unsigned long long)scq->paddr);
 663
 664         return scq;
 665 }
 666
 667 static void
 668 free_scq(struct idt77252_dev *card, struct scq_info *scq)
 669 {
 670         struct sk_buff *skb;
 671         struct atm_vcc *vcc;
 672
 673         dma_free_coherent(&card->pcidev->dev, SCQ_SIZE,
 674                           scq->base, scq->paddr);
 675
 676         while ((skb = skb_dequeue(&scq->transmit))) {
 677                 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
 678                                  skb->len, DMA_TO_DEVICE);
 679
 680                 vcc = ATM_SKB(skb)->vcc;
 681                 if (vcc->pop)
 682                         vcc->pop(vcc, skb);
 683                 else
 684                         dev_kfree_skb(skb);
 685         }
 686
 687         while ((skb = skb_dequeue(&scq->pending))) {
 688                 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
 689                                  skb->len, DMA_TO_DEVICE);
 690
 691                 vcc = ATM_SKB(skb)->vcc;
 692                 if (vcc->pop)
 693                         vcc->pop(vcc, skb);
 694                 else
 695                         dev_kfree_skb(skb);
 696         }
 697
 698         kfree(scq);
 699 }
 700
 701
 702 static int
 703 push_on_scq(struct idt77252_dev *card, struct vc_map *vc, struct sk_buff *skb)
 704 {
 705         struct scq_info *scq = vc->scq;
 706         unsigned long flags;
 707         struct scqe *tbd;
 708         int entries;
 709
 710         TXPRINTK("%s: SCQ: next 0x%p\n", card->name, scq->next);
 711
 712         atomic_inc(&scq->used);
 713         entries = atomic_read(&scq->used);
 714         if (entries > (SCQ_ENTRIES - 1)) {
 715                 atomic_dec(&scq->used);
 716                 goto out;
 717         }
 718
 719         skb_queue_tail(&scq->transmit, skb);
 720
 721         spin_lock_irqsave(&vc->lock, flags);
 722         if (vc->estimator) {
 723                 struct atm_vcc *vcc = vc->tx_vcc;
 724                 struct sock *sk = sk_atm(vcc);
 725
 726                 vc->estimator->cells += (skb->len + 47) / 48;
 727                 if (refcount_read(&sk->sk_wmem_alloc) >
 728                     (sk->sk_sndbuf >> 1)) {
 729                         u32 cps = vc->estimator->maxcps;
 730
 731                         vc->estimator->cps = cps;
 732                         vc->estimator->avcps = cps << 5;
 733                         if (vc->lacr < vc->init_er) {
 734                                 vc->lacr = vc->init_er;
 735                                 writel(TCMDQ_LACR | (vc->lacr << 16) |
 736                                        vc->index, SAR_REG_TCMDQ);
 737                         }
 738                 }
 739         }
 740         spin_unlock_irqrestore(&vc->lock, flags);
 741
 742         tbd = &IDT77252_PRV_TBD(skb);
 743
 744         spin_lock_irqsave(&scq->lock, flags);
 745         scq->next->word_1 = cpu_to_le32(tbd->word_1 |
 746                                         SAR_TBD_TSIF | SAR_TBD_GTSI);
 747         scq->next->word_2 = cpu_to_le32(tbd->word_2);
 748         scq->next->word_3 = cpu_to_le32(tbd->word_3);
 749         scq->next->word_4 = cpu_to_le32(tbd->word_4);
 750
 751         if (scq->next == scq->last)
 752                 scq->next = scq->base;
 753         else
 754                 scq->next++;
 755
 756         write_sram(card, scq->scd,
 757                    scq->paddr +
 758                    (u32)((unsigned long)scq->next - (unsigned long)scq->base));
 759         spin_unlock_irqrestore(&scq->lock, flags);
 760
 761         scq->trans_start = jiffies;
 762
 763         if (test_and_clear_bit(VCF_IDLE, &vc->flags)) {
 764                 writel(TCMDQ_START_LACR | (vc->lacr << 16) | vc->index,
 765                        SAR_REG_TCMDQ);
 766         }
 767
 768         TXPRINTK("%d entries in SCQ used (push).\n", atomic_read(&scq->used));
 769
 770         XPRINTK("%s: SCQ (after push %2d) head = 0x%x, next = 0x%p.\n",
 771                 card->name, atomic_read(&scq->used),
 772                 read_sram(card, scq->scd + 1), scq->next);
 773
 774         return 0;
 775
 776 out:
 777         if (time_after(jiffies, scq->trans_start + HZ)) {
 778                 printk("%s: Error pushing TBD for %d.%d\n",
 779                        card->name, vc->tx_vcc->vpi, vc->tx_vcc->vci);
 780 #ifdef CONFIG_ATM_IDT77252_DEBUG
 781                 idt77252_tx_dump(card);
 782 #endif
 783                 scq->trans_start = jiffies;
 784         }
 785
 786         return -ENOBUFS;
 787 }
 788
 789
 790 static void
 791 drain_scq(struct idt77252_dev *card, struct vc_map *vc)
 792 {
 793         struct scq_info *scq = vc->scq;
 794         struct sk_buff *skb;
 795         struct atm_vcc *vcc;
 796
 797         TXPRINTK("%s: SCQ (before drain %2d) next = 0x%p.\n",
 798                  card->name, atomic_read(&scq->used), scq->next);
 799
 800         skb = skb_dequeue(&scq->transmit);
 801         if (skb) {
 802                 TXPRINTK("%s: freeing skb at %p.\n", card->name, skb);
 803
 804                 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
 805                                  skb->len, DMA_TO_DEVICE);
 806
 807                 vcc = ATM_SKB(skb)->vcc;
 808
 809                 if (vcc->pop)
 810                         vcc->pop(vcc, skb);
 811                 else
 812                         dev_kfree_skb(skb);
 813
 814                 atomic_inc(&vcc->stats->tx);
 815         }
 816
 817         atomic_dec(&scq->used);
 818
 819         spin_lock(&scq->skblock);
 820         while ((skb = skb_dequeue(&scq->pending))) {
 821                 if (push_on_scq(card, vc, skb)) {
 822                         skb_queue_head(&vc->scq->pending, skb);
 823                         break;
 824                 }
 825         }
 826         spin_unlock(&scq->skblock);
 827 }
 828
 829 static int
 830 queue_skb(struct idt77252_dev *card, struct vc_map *vc,
 831           struct sk_buff *skb, int oam)
 832 {
 833         struct atm_vcc *vcc;
 834         struct scqe *tbd;
 835         unsigned long flags;
 836         int error;
 837         int aal;
 838
 839         if (skb->len == 0) {
 840                 printk("%s: invalid skb->len (%d)\n", card->name, skb->len);
 841                 return -EINVAL;
 842         }
 843
 844         TXPRINTK("%s: Sending %d bytes of data.\n",
 845                  card->name, skb->len);
 846
 847         tbd = &IDT77252_PRV_TBD(skb);
 848         vcc = ATM_SKB(skb)->vcc;
 849
 850         IDT77252_PRV_PADDR(skb) = dma_map_single(&card->pcidev->dev, skb->data,
 851                                                  skb->len, DMA_TO_DEVICE);
 852
 853         error = -EINVAL;
 854
 855         if (oam) {
 856                 if (skb->len != 52)
 857                         goto errout;
 858
 859                 tbd->word_1 = SAR_TBD_OAM | ATM_CELL_PAYLOAD | SAR_TBD_EPDU;
 860                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 861                 tbd->word_3 = 0x00000000;
 862                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 863                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 864
 865                 if (test_bit(VCF_RSV, &vc->flags))
 866                         vc = card->vcs[0];
 867
 868                 goto done;
 869         }
 870
 871         if (test_bit(VCF_RSV, &vc->flags)) {
 872                 printk("%s: Trying to transmit on reserved VC\n", card->name);
 873                 goto errout;
 874         }
 875
 876         aal = vcc->qos.aal;
 877
 878         switch (aal) {
 879         case ATM_AAL0:
 880         case ATM_AAL34:
 881                 if (skb->len > 52)
 882                         goto errout;
 883
 884                 if (aal == ATM_AAL0)
 885                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL0 |
 886                                       ATM_CELL_PAYLOAD;
 887                 else
 888                         tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL34 |
 889                                       ATM_CELL_PAYLOAD;
 890
 891                 tbd->word_2 = IDT77252_PRV_PADDR(skb) + 4;
 892                 tbd->word_3 = 0x00000000;
 893                 tbd->word_4 = (skb->data[0] << 24) | (skb->data[1] << 16) |
 894                               (skb->data[2] <<  8) | (skb->data[3] <<  0);
 895                 break;
 896
 897         case ATM_AAL5:
 898                 tbd->word_1 = SAR_TBD_EPDU | SAR_TBD_AAL5 | skb->len;
 899                 tbd->word_2 = IDT77252_PRV_PADDR(skb);
 900                 tbd->word_3 = skb->len;
 901                 tbd->word_4 = (vcc->vpi << SAR_TBD_VPI_SHIFT) |
 902                               (vcc->vci << SAR_TBD_VCI_SHIFT);
 903                 break;
 904
 905         case ATM_AAL1:
 906         case ATM_AAL2:
 907         default:
 908                 printk("%s: Traffic type not supported.\n", card->name);
 909                 error = -EPROTONOSUPPORT;
 910                 goto errout;
 911         }
 912
 913 done:
 914         spin_lock_irqsave(&vc->scq->skblock, flags);
 915         skb_queue_tail(&vc->scq->pending, skb);
 916
 917         while ((skb = skb_dequeue(&vc->scq->pending))) {
 918                 if (push_on_scq(card, vc, skb)) {
 919                         skb_queue_head(&vc->scq->pending, skb);
 920                         break;
 921                 }
 922         }
 923         spin_unlock_irqrestore(&vc->scq->skblock, flags);
 924
 925         return 0;
 926
 927 errout:
 928         dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
 929                          skb->len, DMA_TO_DEVICE);
 930         return error;
 931 }
 932
 933 static unsigned long
 934 get_free_scd(struct idt77252_dev *card, struct vc_map *vc)
 935 {
 936         int i;
 937
 938         for (i = 0; i < card->scd_size; i++) {
 939                 if (!card->scd2vc[i]) {
 940                         card->scd2vc[i] = vc;
 941                         vc->scd_index = i;
 942                         return card->scd_base + i * SAR_SRAM_SCD_SIZE;
 943                 }
 944         }
 945         return 0;
 946 }
 947
 948 static void
 949 fill_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 950 {
 951         write_sram(card, scq->scd, scq->paddr);
 952         write_sram(card, scq->scd + 1, 0x00000000);
 953         write_sram(card, scq->scd + 2, 0xffffffff);
 954         write_sram(card, scq->scd + 3, 0x00000000);
 955 }
 956
 957 static void
 958 clear_scd(struct idt77252_dev *card, struct scq_info *scq, int class)
 959 {
 960         return;
 961 }
 962
 963 /*****************************************************************************/
 964 /*                                                                           */
 965 /* RSQ Handling                                                              */
 966 /*                                                                           */
 967 /*****************************************************************************/
 968
 969 static int
 970 init_rsq(struct idt77252_dev *card)
 971 {
 972         struct rsq_entry *rsqe;
 973
 974         card->rsq.base = dma_zalloc_coherent(&card->pcidev->dev, RSQSIZE,
 975                                              &card->rsq.paddr, GFP_KERNEL);
 976         if (card->rsq.base == NULL) {
 977                 printk("%s: can't allocate RSQ.\n", card->name);
 978                 return -1;
 979         }
 980
 981         card->rsq.last = card->rsq.base + RSQ_NUM_ENTRIES - 1;
 982         card->rsq.next = card->rsq.last;
 983         for (rsqe = card->rsq.base; rsqe <= card->rsq.last; rsqe++)
 984                 rsqe->word_4 = 0;
 985
 986         writel((unsigned long) card->rsq.last - (unsigned long) card->rsq.base,
 987                SAR_REG_RSQH);
 988         writel(card->rsq.paddr, SAR_REG_RSQB);
 989
 990         IPRINTK("%s: RSQ base at 0x%lx (0x%x).\n", card->name,
 991                 (unsigned long) card->rsq.base,
 992                 readl(SAR_REG_RSQB));
 993         IPRINTK("%s: RSQ head = 0x%x, base = 0x%x, tail = 0x%x.\n",
 994                 card->name,
 995                 readl(SAR_REG_RSQH),
 996                 readl(SAR_REG_RSQB),
 997                 readl(SAR_REG_RSQT));
 998
 999         return 0;
1000 }
1001
1002 static void
1003 deinit_rsq(struct idt77252_dev *card)
1004 {
1005         dma_free_coherent(&card->pcidev->dev, RSQSIZE,
1006                           card->rsq.base, card->rsq.paddr);
1007 }
1008
1009 static void
1010 dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe)
1011 {
1012         struct atm_vcc *vcc;
1013         struct sk_buff *skb;
1014         struct rx_pool *rpp;
1015         struct vc_map *vc;
1016         u32 header, vpi, vci;
1017         u32 stat;
1018         int i;
1019
1020         stat = le32_to_cpu(rsqe->word_4);
1021
1022         if (stat & SAR_RSQE_IDLE) {
1023                 RXPRINTK("%s: message about inactive connection.\n",
1024                          card->name);
1025                 return;
1026         }
1027
1028         skb = sb_pool_skb(card, le32_to_cpu(rsqe->word_2));
1029         if (skb == NULL) {
1030                 printk("%s: NULL skb in %s, rsqe: %08x %08x %08x %08x\n",
1031                        card->name, __func__,
1032                        le32_to_cpu(rsqe->word_1), le32_to_cpu(rsqe->word_2),
1033                        le32_to_cpu(rsqe->word_3), le32_to_cpu(rsqe->word_4));
1034                 return;
1035         }
1036
1037         header = le32_to_cpu(rsqe->word_1);
1038         vpi = (header >> 16) & 0x00ff;
1039         vci = (header >>  0) & 0xffff;
1040
1041         RXPRINTK("%s: SDU for %d.%d received in buffer 0x%p (data 0x%p).\n",
1042                  card->name, vpi, vci, skb, skb->data);
1043
1044         if ((vpi >= (1 << card->vpibits)) || (vci != (vci & card->vcimask))) {
1045                 printk("%s: SDU received for out-of-range vc %u.%u\n",
1046                        card->name, vpi, vci);
1047                 recycle_rx_skb(card, skb);
1048                 return;
1049         }
1050
1051         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1052         if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1053                 printk("%s: SDU received on non RX vc %u.%u\n",
1054                        card->name, vpi, vci);
1055                 recycle_rx_skb(card, skb);
1056                 return;
1057         }
1058
1059         vcc = vc->rx_vcc;
1060
1061         dma_sync_single_for_cpu(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1062                                 skb_end_pointer(skb) - skb->data,
1063                                 DMA_FROM_DEVICE);
1064
1065         if ((vcc->qos.aal == ATM_AAL0) ||
1066             (vcc->qos.aal == ATM_AAL34)) {
1067                 struct sk_buff *sb;
1068                 unsigned char *cell;
1069                 u32 aal0;
1070
1071                 cell = skb->data;
1072                 for (i = (stat & SAR_RSQE_CELLCNT); i; i--) {
1073                         if ((sb = dev_alloc_skb(64)) == NULL) {
1074                                 printk("%s: Can't allocate buffers for aal0.\n",
1075                                        card->name);
1076                                 atomic_add(i, &vcc->stats->rx_drop);
1077                                 break;
1078                         }
1079                         if (!atm_charge(vcc, sb->truesize)) {
1080                                 RXPRINTK("%s: atm_charge() dropped aal0 packets.\n",
1081                                          card->name);
1082                                 atomic_add(i - 1, &vcc->stats->rx_drop);
1083                                 dev_kfree_skb(sb);
1084                                 break;
1085                         }
1086                         aal0 = (vpi << ATM_HDR_VPI_SHIFT) |
1087                                (vci << ATM_HDR_VCI_SHIFT);
1088                         aal0 |= (stat & SAR_RSQE_EPDU) ? 0x00000002 : 0;
1089                         aal0 |= (stat & SAR_RSQE_CLP)  ? 0x00000001 : 0;
1090
1091                         *((u32 *) sb->data) = aal0;
1092                         skb_put(sb, sizeof(u32));
1093                         skb_put_data(sb, cell, ATM_CELL_PAYLOAD);
1094
1095                         ATM_SKB(sb)->vcc = vcc;
1096                         __net_timestamp(sb);
1097                         vcc->push(vcc, sb);
1098                         atomic_inc(&vcc->stats->rx);
1099
1100                         cell += ATM_CELL_PAYLOAD;
1101                 }
1102
1103                 recycle_rx_skb(card, skb);
1104                 return;
1105         }
1106         if (vcc->qos.aal != ATM_AAL5) {
1107                 printk("%s: Unexpected AAL type in dequeue_rx(): %d.\n",
1108                        card->name, vcc->qos.aal);
1109                 recycle_rx_skb(card, skb);
1110                 return;
1111         }
1112         skb->len = (stat & SAR_RSQE_CELLCNT) * ATM_CELL_PAYLOAD;
1113
1114         rpp = &vc->rcv.rx_pool;
1115
1116         __skb_queue_tail(&rpp->queue, skb);
1117         rpp->len += skb->len;
1118
1119         if (stat & SAR_RSQE_EPDU) {
1120                 unsigned char *l1l2;
1121                 unsigned int len;
1122
1123                 l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6);
1124
1125                 len = (l1l2[0] << 8) | l1l2[1];
1126                 len = len ? len : 0x10000;
1127
1128                 RXPRINTK("%s: PDU has %d bytes.\n", card->name, len);
1129
1130                 if ((len + 8 > rpp->len) || (len + (47 + 8) < rpp->len)) {
1131                         RXPRINTK("%s: AAL5 PDU size mismatch: %d != %d. "
1132                                  "(CDC: %08x)\n",
1133                                  card->name, len, rpp->len, readl(SAR_REG_CDC));
1134                         recycle_rx_pool_skb(card, rpp);
1135                         atomic_inc(&vcc->stats->rx_err);
1136                         return;
1137                 }
1138                 if (stat & SAR_RSQE_CRC) {
1139                         RXPRINTK("%s: AAL5 CRC error.\n", card->name);
1140                         recycle_rx_pool_skb(card, rpp);
1141                         atomic_inc(&vcc->stats->rx_err);
1142                         return;
1143                 }
1144                 if (skb_queue_len(&rpp->queue) > 1) {
1145                         struct sk_buff *sb;
1146
1147                         skb = dev_alloc_skb(rpp->len);
1148                         if (!skb) {
1149                                 RXPRINTK("%s: Can't alloc RX skb.\n",
1150                                          card->name);
1151                                 recycle_rx_pool_skb(card, rpp);
1152                                 atomic_inc(&vcc->stats->rx_err);
1153                                 return;
1154                         }
1155                         if (!atm_charge(vcc, skb->truesize)) {
1156                                 recycle_rx_pool_skb(card, rpp);
1157                                 dev_kfree_skb(skb);
1158                                 return;
1159                         }
1160                         skb_queue_walk(&rpp->queue, sb)
1161                                 skb_put_data(skb, sb->data, sb->len);
1162
1163                         recycle_rx_pool_skb(card, rpp);
1164
1165                         skb_trim(skb, len);
1166                         ATM_SKB(skb)->vcc = vcc;
1167                         __net_timestamp(skb);
1168
1169                         vcc->push(vcc, skb);
1170                         atomic_inc(&vcc->stats->rx);
1171
1172                         return;
1173                 }
1174
1175                 flush_rx_pool(card, rpp);
1176
1177                 if (!atm_charge(vcc, skb->truesize)) {
1178                         recycle_rx_skb(card, skb);
1179                         return;
1180                 }
1181
1182                 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1183                                  skb_end_pointer(skb) - skb->data,
1184                                  DMA_FROM_DEVICE);
1185                 sb_pool_remove(card, skb);
1186
1187                 skb_trim(skb, len);
1188                 ATM_SKB(skb)->vcc = vcc;
1189                 __net_timestamp(skb);
1190
1191                 vcc->push(vcc, skb);
1192                 atomic_inc(&vcc->stats->rx);
1193
1194                 if (skb->truesize > SAR_FB_SIZE_3)
1195                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1196                 else if (skb->truesize > SAR_FB_SIZE_2)
1197                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1198                 else if (skb->truesize > SAR_FB_SIZE_1)
1199                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
1200                 else
1201                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
1202                 return;
1203         }
1204 }
1205
1206 static void
1207 idt77252_rx(struct idt77252_dev *card)
1208 {
1209         struct rsq_entry *rsqe;
1210
1211         if (card->rsq.next == card->rsq.last)
1212                 rsqe = card->rsq.base;
1213         else
1214                 rsqe = card->rsq.next + 1;
1215
1216         if (!(le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID)) {
1217                 RXPRINTK("%s: no entry in RSQ.\n", card->name);
1218                 return;
1219         }
1220
1221         do {
1222                 dequeue_rx(card, rsqe);
1223                 rsqe->word_4 = 0;
1224                 card->rsq.next = rsqe;
1225                 if (card->rsq.next == card->rsq.last)
1226                         rsqe = card->rsq.base;
1227                 else
1228                         rsqe = card->rsq.next + 1;
1229         } while (le32_to_cpu(rsqe->word_4) & SAR_RSQE_VALID);
1230
1231         writel((unsigned long) card->rsq.next - (unsigned long) card->rsq.base,
1232                SAR_REG_RSQH);
1233 }
1234
1235 static void
1236 idt77252_rx_raw(struct idt77252_dev *card)
1237 {
1238         struct sk_buff  *queue;
1239         u32             head, tail;
1240         struct atm_vcc  *vcc;
1241         struct vc_map   *vc;
1242         struct sk_buff  *sb;
1243
1244         if (card->raw_cell_head == NULL) {
1245                 u32 handle = le32_to_cpu(*(card->raw_cell_hnd + 1));
1246                 card->raw_cell_head = sb_pool_skb(card, handle);
1247         }
1248
1249         queue = card->raw_cell_head;
1250         if (!queue)
1251                 return;
1252
1253         head = IDT77252_PRV_PADDR(queue) + (queue->data - queue->head - 16);
1254         tail = readl(SAR_REG_RAWCT);
1255
1256         dma_sync_single_for_cpu(&card->pcidev->dev, IDT77252_PRV_PADDR(queue),
1257                                 skb_end_offset(queue) - 16,
1258                                 DMA_FROM_DEVICE);
1259
1260         while (head != tail) {
1261                 unsigned int vpi, vci;
1262                 u32 header;
1263
1264                 header = le32_to_cpu(*(u32 *) &queue->data[0]);
1265
1266                 vpi = (header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1267                 vci = (header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1268
1269 #ifdef CONFIG_ATM_IDT77252_DEBUG
1270                 if (debug & DBG_RAW_CELL) {
1271                         int i;
1272
1273                         printk("%s: raw cell %x.%02x.%04x.%x.%x\n",
1274                                card->name, (header >> 28) & 0x000f,
1275                                (header >> 20) & 0x00ff,
1276                                (header >>  4) & 0xffff,
1277                                (header >>  1) & 0x0007,
1278                                (header >>  0) & 0x0001);
1279                         for (i = 16; i < 64; i++)
1280                                 printk(" %02x", queue->data[i]);
1281                         printk("\n");
1282                 }
1283 #endif
1284
1285                 if (vpi >= (1<<card->vpibits) || vci >= (1<<card->vcibits)) {
1286                         RPRINTK("%s: SDU received for out-of-range vc %u.%u\n",
1287                                 card->name, vpi, vci);
1288                         goto drop;
1289                 }
1290
1291                 vc = card->vcs[VPCI2VC(card, vpi, vci)];
1292                 if (!vc || !test_bit(VCF_RX, &vc->flags)) {
1293                         RPRINTK("%s: SDU received on non RX vc %u.%u\n",
1294                                 card->name, vpi, vci);
1295                         goto drop;
1296                 }
1297
1298                 vcc = vc->rx_vcc;
1299
1300                 if (vcc->qos.aal != ATM_AAL0) {
1301                         RPRINTK("%s: raw cell for non AAL0 vc %u.%u\n",
1302                                 card->name, vpi, vci);
1303                         atomic_inc(&vcc->stats->rx_drop);
1304                         goto drop;
1305                 }
1306
1307                 if ((sb = dev_alloc_skb(64)) == NULL) {
1308                         printk("%s: Can't allocate buffers for AAL0.\n",
1309                                card->name);
1310                         atomic_inc(&vcc->stats->rx_err);
1311                         goto drop;
1312                 }
1313
1314                 if (!atm_charge(vcc, sb->truesize)) {
1315                         RXPRINTK("%s: atm_charge() dropped AAL0 packets.\n",
1316                                  card->name);
1317                         dev_kfree_skb(sb);
1318                         goto drop;
1319                 }
1320
1321                 *((u32 *) sb->data) = header;
1322                 skb_put(sb, sizeof(u32));
1323                 skb_put_data(sb, &(queue->data[16]), ATM_CELL_PAYLOAD);
1324
1325                 ATM_SKB(sb)->vcc = vcc;
1326                 __net_timestamp(sb);
1327                 vcc->push(vcc, sb);
1328                 atomic_inc(&vcc->stats->rx);
1329
1330 drop:
1331                 skb_pull(queue, 64);
1332
1333                 head = IDT77252_PRV_PADDR(queue)
1334                                         + (queue->data - queue->head - 16);
1335
1336                 if (queue->len < 128) {
1337                         struct sk_buff *next;
1338                         u32 handle;
1339
1340                         head = le32_to_cpu(*(u32 *) &queue->data[0]);
1341                         handle = le32_to_cpu(*(u32 *) &queue->data[4]);
1342
1343                         next = sb_pool_skb(card, handle);
1344                         recycle_rx_skb(card, queue);
1345
1346                         if (next) {
1347                                 card->raw_cell_head = next;
1348                                 queue = card->raw_cell_head;
1349                                 dma_sync_single_for_cpu(&card->pcidev->dev,
1350                                                         IDT77252_PRV_PADDR(queue),
1351                                                         (skb_end_pointer(queue) -
1352                                                          queue->data),
1353                                                         DMA_FROM_DEVICE);
1354                         } else {
1355                                 card->raw_cell_head = NULL;
1356                                 printk("%s: raw cell queue overrun\n",
1357                                        card->name);
1358                                 break;
1359                         }
1360                 }
1361         }
1362 }
1363
1364
1365 /*****************************************************************************/
1366 /*                                                                           */
1367 /* TSQ Handling                                                              */
1368 /*                                                                           */
1369 /*****************************************************************************/
1370
1371 static int
1372 init_tsq(struct idt77252_dev *card)
1373 {
1374         struct tsq_entry *tsqe;
1375
1376         card->tsq.base = dma_alloc_coherent(&card->pcidev->dev, RSQSIZE,
1377                                             &card->tsq.paddr, GFP_KERNEL);
1378         if (card->tsq.base == NULL) {
1379                 printk("%s: can't allocate TSQ.\n", card->name);
1380                 return -1;
1381         }
1382         memset(card->tsq.base, 0, TSQSIZE);
1383
1384         card->tsq.last = card->tsq.base + TSQ_NUM_ENTRIES - 1;
1385         card->tsq.next = card->tsq.last;
1386         for (tsqe = card->tsq.base; tsqe <= card->tsq.last; tsqe++)
1387                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1388
1389         writel(card->tsq.paddr, SAR_REG_TSQB);
1390         writel((unsigned long) card->tsq.next - (unsigned long) card->tsq.base,
1391                SAR_REG_TSQH);
1392
1393         return 0;
1394 }
1395
1396 static void
1397 deinit_tsq(struct idt77252_dev *card)
1398 {
1399         dma_free_coherent(&card->pcidev->dev, TSQSIZE,
1400                           card->tsq.base, card->tsq.paddr);
1401 }
1402
1403 static void
1404 idt77252_tx(struct idt77252_dev *card)
1405 {
1406         struct tsq_entry *tsqe;
1407         unsigned int vpi, vci;
1408         struct vc_map *vc;
1409         u32 conn, stat;
1410
1411         if (card->tsq.next == card->tsq.last)
1412                 tsqe = card->tsq.base;
1413         else
1414                 tsqe = card->tsq.next + 1;
1415
1416         TXPRINTK("idt77252_tx: tsq  %p: base %p, next %p, last %p\n", tsqe,
1417                  card->tsq.base, card->tsq.next, card->tsq.last);
1418         TXPRINTK("idt77252_tx: tsqb %08x, tsqt %08x, tsqh %08x, \n",
1419                  readl(SAR_REG_TSQB),
1420                  readl(SAR_REG_TSQT),
1421                  readl(SAR_REG_TSQH));
1422
1423         stat = le32_to_cpu(tsqe->word_2);
1424
1425         if (stat & SAR_TSQE_INVALID)
1426                 return;
1427
1428         do {
1429                 TXPRINTK("tsqe: 0x%p [0x%08x 0x%08x]\n", tsqe,
1430                          le32_to_cpu(tsqe->word_1),
1431                          le32_to_cpu(tsqe->word_2));
1432
1433                 switch (stat & SAR_TSQE_TYPE) {
1434                 case SAR_TSQE_TYPE_TIMER:
1435                         TXPRINTK("%s: Timer RollOver detected.\n", card->name);
1436                         break;
1437
1438                 case SAR_TSQE_TYPE_IDLE:
1439
1440                         conn = le32_to_cpu(tsqe->word_1);
1441
1442                         if (SAR_TSQE_TAG(stat) == 0x10) {
1443 #ifdef  NOTDEF
1444                                 printk("%s: Connection %d halted.\n",
1445                                        card->name,
1446                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1447 #endif
1448                                 break;
1449                         }
1450
1451                         vc = card->vcs[conn & 0x1fff];
1452                         if (!vc) {
1453                                 printk("%s: could not find VC from conn %d\n",
1454                                        card->name, conn & 0x1fff);
1455                                 break;
1456                         }
1457
1458                         printk("%s: Connection %d IDLE.\n",
1459                                card->name, vc->index);
1460
1461                         set_bit(VCF_IDLE, &vc->flags);
1462                         break;
1463
1464                 case SAR_TSQE_TYPE_TSR:
1465
1466                         conn = le32_to_cpu(tsqe->word_1);
1467
1468                         vc = card->vcs[conn & 0x1fff];
1469                         if (!vc) {
1470                                 printk("%s: no VC at index %d\n",
1471                                        card->name,
1472                                        le32_to_cpu(tsqe->word_1) & 0x1fff);
1473                                 break;
1474                         }
1475
1476                         drain_scq(card, vc);
1477                         break;
1478
1479                 case SAR_TSQE_TYPE_TBD_COMP:
1480
1481                         conn = le32_to_cpu(tsqe->word_1);
1482
1483                         vpi = (conn >> SAR_TBD_VPI_SHIFT) & 0x00ff;
1484                         vci = (conn >> SAR_TBD_VCI_SHIFT) & 0xffff;
1485
1486                         if (vpi >= (1 << card->vpibits) ||
1487                             vci >= (1 << card->vcibits)) {
1488                                 printk("%s: TBD complete: "
1489                                        "out of range VPI.VCI %u.%u\n",
1490                                        card->name, vpi, vci);
1491                                 break;
1492                         }
1493
1494                         vc = card->vcs[VPCI2VC(card, vpi, vci)];
1495                         if (!vc) {
1496                                 printk("%s: TBD complete: "
1497                                        "no VC at VPI.VCI %u.%u\n",
1498                                        card->name, vpi, vci);
1499                                 break;
1500                         }
1501
1502                         drain_scq(card, vc);
1503                         break;
1504                 }
1505
1506                 tsqe->word_2 = cpu_to_le32(SAR_TSQE_INVALID);
1507
1508                 card->tsq.next = tsqe;
1509                 if (card->tsq.next == card->tsq.last)
1510                         tsqe = card->tsq.base;
1511                 else
1512                         tsqe = card->tsq.next + 1;
1513
1514                 TXPRINTK("tsqe: %p: base %p, next %p, last %p\n", tsqe,
1515                          card->tsq.base, card->tsq.next, card->tsq.last);
1516
1517                 stat = le32_to_cpu(tsqe->word_2);
1518
1519         } while (!(stat & SAR_TSQE_INVALID));
1520
1521         writel((unsigned long)card->tsq.next - (unsigned long)card->tsq.base,
1522                SAR_REG_TSQH);
1523
1524         XPRINTK("idt77252_tx-after writel%d: TSQ head = 0x%x, tail = 0x%x, next = 0x%p.\n",
1525                 card->index, readl(SAR_REG_TSQH),
1526                 readl(SAR_REG_TSQT), card->tsq.next);
1527 }
1528
1529
1530 static void
1531 tst_timer(unsigned long data)
1532 {
1533         struct idt77252_dev *card = (struct idt77252_dev *)data;
1534         unsigned long base, idle, jump;
1535         unsigned long flags;
1536         u32 pc;
1537         int e;
1538
1539         spin_lock_irqsave(&card->tst_lock, flags);
1540
1541         base = card->tst[card->tst_index];
1542         idle = card->tst[card->tst_index ^ 1];
1543
1544         if (test_bit(TST_SWITCH_WAIT, &card->tst_state)) {
1545                 jump = base + card->tst_size - 2;
1546
1547                 pc = readl(SAR_REG_NOW) >> 2;
1548                 if ((pc ^ idle) & ~(card->tst_size - 1)) {
1549                         mod_timer(&card->tst_timer, jiffies + 1);
1550                         goto out;
1551                 }
1552
1553                 clear_bit(TST_SWITCH_WAIT, &card->tst_state);
1554
1555                 card->tst_index ^= 1;
1556                 write_sram(card, jump, TSTE_OPC_JMP | (base << 2));
1557
1558                 base = card->tst[card->tst_index];
1559                 idle = card->tst[card->tst_index ^ 1];
1560
1561                 for (e = 0; e < card->tst_size - 2; e++) {
1562                         if (card->soft_tst[e].tste & TSTE_PUSH_IDLE) {
1563                                 write_sram(card, idle + e,
1564                                            card->soft_tst[e].tste & TSTE_MASK);
1565                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_IDLE);
1566                         }
1567                 }
1568         }
1569
1570         if (test_and_clear_bit(TST_SWITCH_PENDING, &card->tst_state)) {
1571
1572                 for (e = 0; e < card->tst_size - 2; e++) {
1573                         if (card->soft_tst[e].tste & TSTE_PUSH_ACTIVE) {
1574                                 write_sram(card, idle + e,
1575                                            card->soft_tst[e].tste & TSTE_MASK);
1576                                 card->soft_tst[e].tste &= ~(TSTE_PUSH_ACTIVE);
1577                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1578                         }
1579                 }
1580
1581                 jump = base + card->tst_size - 2;
1582
1583                 write_sram(card, jump, TSTE_OPC_NULL);
1584                 set_bit(TST_SWITCH_WAIT, &card->tst_state);
1585
1586                 mod_timer(&card->tst_timer, jiffies + 1);
1587         }
1588
1589 out:
1590         spin_unlock_irqrestore(&card->tst_lock, flags);
1591 }
1592
1593 static int
1594 __fill_tst(struct idt77252_dev *card, struct vc_map *vc,
1595            int n, unsigned int opc)
1596 {
1597         unsigned long cl, avail;
1598         unsigned long idle;
1599         int e, r;
1600         u32 data;
1601
1602         avail = card->tst_size - 2;
1603         for (e = 0; e < avail; e++) {
1604                 if (card->soft_tst[e].vc == NULL)
1605                         break;
1606         }
1607         if (e >= avail) {
1608                 printk("%s: No free TST entries found\n", card->name);
1609                 return -1;
1610         }
1611
1612         NPRINTK("%s: conn %d: first TST entry at %d.\n",
1613                 card->name, vc ? vc->index : -1, e);
1614
1615         r = n;
1616         cl = avail;
1617         data = opc & TSTE_OPC_MASK;
1618         if (vc && (opc != TSTE_OPC_NULL))
1619                 data = opc | vc->index;
1620
1621         idle = card->tst[card->tst_index ^ 1];
1622
1623         /*
1624          * Fill Soft TST.
1625          */
1626         while (r > 0) {
1627                 if ((cl >= avail) && (card->soft_tst[e].vc == NULL)) {
1628                         if (vc)
1629                                 card->soft_tst[e].vc = vc;
1630                         else
1631                                 card->soft_tst[e].vc = (void *)-1;
1632
1633                         card->soft_tst[e].tste = data;
1634                         if (timer_pending(&card->tst_timer))
1635                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1636                         else {
1637                                 write_sram(card, idle + e, data);
1638                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1639                         }
1640
1641                         cl -= card->tst_size;
1642                         r--;
1643                 }
1644
1645                 if (++e == avail)
1646                         e = 0;
1647                 cl += n;
1648         }
1649
1650         return 0;
1651 }
1652
1653 static int
1654 fill_tst(struct idt77252_dev *card, struct vc_map *vc, int n, unsigned int opc)
1655 {
1656         unsigned long flags;
1657         int res;
1658
1659         spin_lock_irqsave(&card->tst_lock, flags);
1660
1661         res = __fill_tst(card, vc, n, opc);
1662
1663         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1664         if (!timer_pending(&card->tst_timer))
1665                 mod_timer(&card->tst_timer, jiffies + 1);
1666
1667         spin_unlock_irqrestore(&card->tst_lock, flags);
1668         return res;
1669 }
1670
1671 static int
1672 __clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1673 {
1674         unsigned long idle;
1675         int e;
1676
1677         idle = card->tst[card->tst_index ^ 1];
1678
1679         for (e = 0; e < card->tst_size - 2; e++) {
1680                 if (card->soft_tst[e].vc == vc) {
1681                         card->soft_tst[e].vc = NULL;
1682
1683                         card->soft_tst[e].tste = TSTE_OPC_VAR;
1684                         if (timer_pending(&card->tst_timer))
1685                                 card->soft_tst[e].tste |= TSTE_PUSH_ACTIVE;
1686                         else {
1687                                 write_sram(card, idle + e, TSTE_OPC_VAR);
1688                                 card->soft_tst[e].tste |= TSTE_PUSH_IDLE;
1689                         }
1690                 }
1691         }
1692
1693         return 0;
1694 }
1695
1696 static int
1697 clear_tst(struct idt77252_dev *card, struct vc_map *vc)
1698 {
1699         unsigned long flags;
1700         int res;
1701
1702         spin_lock_irqsave(&card->tst_lock, flags);
1703
1704         res = __clear_tst(card, vc);
1705
1706         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1707         if (!timer_pending(&card->tst_timer))
1708                 mod_timer(&card->tst_timer, jiffies + 1);
1709
1710         spin_unlock_irqrestore(&card->tst_lock, flags);
1711         return res;
1712 }
1713
1714 static int
1715 change_tst(struct idt77252_dev *card, struct vc_map *vc,
1716            int n, unsigned int opc)
1717 {
1718         unsigned long flags;
1719         int res;
1720
1721         spin_lock_irqsave(&card->tst_lock, flags);
1722
1723         __clear_tst(card, vc);
1724         res = __fill_tst(card, vc, n, opc);
1725
1726         set_bit(TST_SWITCH_PENDING, &card->tst_state);
1727         if (!timer_pending(&card->tst_timer))
1728                 mod_timer(&card->tst_timer, jiffies + 1);
1729
1730         spin_unlock_irqrestore(&card->tst_lock, flags);
1731         return res;
1732 }
1733
1734
1735 static int
1736 set_tct(struct idt77252_dev *card, struct vc_map *vc)
1737 {
1738         unsigned long tct;
1739
1740         tct = (unsigned long) (card->tct_base + vc->index * SAR_SRAM_TCT_SIZE);
1741
1742         switch (vc->class) {
1743         case SCHED_CBR:
1744                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1745                         card->name, tct, vc->scq->scd);
1746
1747                 write_sram(card, tct + 0, TCT_CBR | vc->scq->scd);
1748                 write_sram(card, tct + 1, 0);
1749                 write_sram(card, tct + 2, 0);
1750                 write_sram(card, tct + 3, 0);
1751                 write_sram(card, tct + 4, 0);
1752                 write_sram(card, tct + 5, 0);
1753                 write_sram(card, tct + 6, 0);
1754                 write_sram(card, tct + 7, 0);
1755                 break;
1756
1757         case SCHED_UBR:
1758                 OPRINTK("%s: writing TCT at 0x%lx, SCD 0x%lx.\n",
1759                         card->name, tct, vc->scq->scd);
1760
1761                 write_sram(card, tct + 0, TCT_UBR | vc->scq->scd);
1762                 write_sram(card, tct + 1, 0);
1763                 write_sram(card, tct + 2, TCT_TSIF);
1764                 write_sram(card, tct + 3, TCT_HALT | TCT_IDLE);
1765                 write_sram(card, tct + 4, 0);
1766                 write_sram(card, tct + 5, vc->init_er);
1767                 write_sram(card, tct + 6, 0);
1768                 write_sram(card, tct + 7, TCT_FLAG_UBR);
1769                 break;
1770
1771         case SCHED_VBR:
1772         case SCHED_ABR:
1773         default:
1774                 return -ENOSYS;
1775         }
1776
1777         return 0;
1778 }
1779
1780 /*****************************************************************************/
1781 /*                                                                           */
1782 /* FBQ Handling                                                              */
1783 /*                                                                           */
1784 /*****************************************************************************/
1785
1786 static __inline__ int
1787 idt77252_fbq_level(struct idt77252_dev *card, int queue)
1788 {
1789         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) & 0x0f;
1790 }
1791
1792 static __inline__ int
1793 idt77252_fbq_full(struct idt77252_dev *card, int queue)
1794 {
1795         return (readl(SAR_REG_STAT) >> (16 + (queue << 2))) == 0x0f;
1796 }
1797
1798 static int
1799 push_rx_skb(struct idt77252_dev *card, struct sk_buff *skb, int queue)
1800 {
1801         unsigned long flags;
1802         u32 handle;
1803         u32 addr;
1804
1805         skb->data = skb->head;
1806         skb_reset_tail_pointer(skb);
1807         skb->len = 0;
1808
1809         skb_reserve(skb, 16);
1810
1811         switch (queue) {
1812         case 0:
1813                 skb_put(skb, SAR_FB_SIZE_0);
1814                 break;
1815         case 1:
1816                 skb_put(skb, SAR_FB_SIZE_1);
1817                 break;
1818         case 2:
1819                 skb_put(skb, SAR_FB_SIZE_2);
1820                 break;
1821         case 3:
1822                 skb_put(skb, SAR_FB_SIZE_3);
1823                 break;
1824         default:
1825                 return -1;
1826         }
1827
1828         if (idt77252_fbq_full(card, queue))
1829                 return -1;
1830
1831         memset(&skb->data[(skb->len & ~(0x3f)) - 64], 0, 2 * sizeof(u32));
1832
1833         handle = IDT77252_PRV_POOL(skb);
1834         addr = IDT77252_PRV_PADDR(skb);
1835
1836         spin_lock_irqsave(&card->cmd_lock, flags);
1837         writel(handle, card->fbq[queue]);
1838         writel(addr, card->fbq[queue]);
1839         spin_unlock_irqrestore(&card->cmd_lock, flags);
1840
1841         return 0;
1842 }
1843
1844 static void
1845 add_rx_skb(struct idt77252_dev *card, int queue,
1846            unsigned int size, unsigned int count)
1847 {
1848         struct sk_buff *skb;
1849         dma_addr_t paddr;
1850         u32 handle;
1851
1852         while (count--) {
1853                 skb = dev_alloc_skb(size);
1854                 if (!skb)
1855                         return;
1856
1857                 if (sb_pool_add(card, skb, queue)) {
1858                         printk("%s: SB POOL full\n", __func__);
1859                         goto outfree;
1860                 }
1861
1862                 paddr = dma_map_single(&card->pcidev->dev, skb->data,
1863                                        skb_end_pointer(skb) - skb->data,
1864                                        DMA_FROM_DEVICE);
1865                 IDT77252_PRV_PADDR(skb) = paddr;
1866
1867                 if (push_rx_skb(card, skb, queue)) {
1868                         printk("%s: FB QUEUE full\n", __func__);
1869                         goto outunmap;
1870                 }
1871         }
1872
1873         return;
1874
1875 outunmap:
1876         dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1877                          skb_end_pointer(skb) - skb->data, DMA_FROM_DEVICE);
1878
1879         handle = IDT77252_PRV_POOL(skb);
1880         card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
1881
1882 outfree:
1883         dev_kfree_skb(skb);
1884 }
1885
1886
1887 static void
1888 recycle_rx_skb(struct idt77252_dev *card, struct sk_buff *skb)
1889 {
1890         u32 handle = IDT77252_PRV_POOL(skb);
1891         int err;
1892
1893         dma_sync_single_for_device(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1894                                    skb_end_pointer(skb) - skb->data,
1895                                    DMA_FROM_DEVICE);
1896
1897         err = push_rx_skb(card, skb, POOL_QUEUE(handle));
1898         if (err) {
1899                 dma_unmap_single(&card->pcidev->dev, IDT77252_PRV_PADDR(skb),
1900                                  skb_end_pointer(skb) - skb->data,
1901                                  DMA_FROM_DEVICE);
1902                 sb_pool_remove(card, skb);
1903                 dev_kfree_skb(skb);
1904         }
1905 }
1906
1907 static void
1908 flush_rx_pool(struct idt77252_dev *card, struct rx_pool *rpp)
1909 {
1910         skb_queue_head_init(&rpp->queue);
1911         rpp->len = 0;
1912 }
1913
1914 static void
1915 recycle_rx_pool_skb(struct idt77252_dev *card, struct rx_pool *rpp)
1916 {
1917         struct sk_buff *skb, *tmp;
1918
1919         skb_queue_walk_safe(&rpp->queue, skb, tmp)
1920                 recycle_rx_skb(card, skb);
1921
1922         flush_rx_pool(card, rpp);
1923 }
1924
1925 /*****************************************************************************/
1926 /*                                                                           */
1927 /* ATM Interface                                                             */
1928 /*                                                                           */
1929 /*****************************************************************************/
1930
1931 static void
1932 idt77252_phy_put(struct atm_dev *dev, unsigned char value, unsigned long addr)
1933 {
1934         write_utility(dev->dev_data, 0x100 + (addr & 0x1ff), value);
1935 }
1936
1937 static unsigned char
1938 idt77252_phy_get(struct atm_dev *dev, unsigned long addr)
1939 {
1940         return read_utility(dev->dev_data, 0x100 + (addr & 0x1ff));
1941 }
1942
1943 static inline int
1944 idt77252_send_skb(struct atm_vcc *vcc, struct sk_buff *skb, int oam)
1945 {
1946         struct atm_dev *dev = vcc->dev;
1947         struct idt77252_dev *card = dev->dev_data;
1948         struct vc_map *vc = vcc->dev_data;
1949         int err;
1950
1951         if (vc == NULL) {
1952                 printk("%s: NULL connection in send().\n", card->name);
1953                 atomic_inc(&vcc->stats->tx_err);
1954                 dev_kfree_skb(skb);
1955                 return -EINVAL;
1956         }
1957         if (!test_bit(VCF_TX, &vc->flags)) {
1958                 printk("%s: Trying to transmit on a non-tx VC.\n", card->name);
1959                 atomic_inc(&vcc->stats->tx_err);
1960                 dev_kfree_skb(skb);
1961                 return -EINVAL;
1962         }
1963
1964         switch (vcc->qos.aal) {
1965         case ATM_AAL0:
1966         case ATM_AAL1:
1967         case ATM_AAL5:
1968                 break;
1969         default:
1970                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
1971                 atomic_inc(&vcc->stats->tx_err);
1972                 dev_kfree_skb(skb);
1973                 return -EINVAL;
1974         }
1975
1976         if (skb_shinfo(skb)->nr_frags != 0) {
1977                 printk("%s: No scatter-gather yet.\n", card->name);
1978                 atomic_inc(&vcc->stats->tx_err);
1979                 dev_kfree_skb(skb);
1980                 return -EINVAL;
1981         }
1982         ATM_SKB(skb)->vcc = vcc;
1983
1984         err = queue_skb(card, vc, skb, oam);
1985         if (err) {
1986                 atomic_inc(&vcc->stats->tx_err);
1987                 dev_kfree_skb(skb);
1988                 return err;
1989         }
1990
1991         return 0;
1992 }
1993
1994 static int idt77252_send(struct atm_vcc *vcc, struct sk_buff *skb)
1995 {
1996         return idt77252_send_skb(vcc, skb, 0);
1997 }
1998
1999 static int
2000 idt77252_send_oam(struct atm_vcc *vcc, void *cell, int flags)
2001 {
2002         struct atm_dev *dev = vcc->dev;
2003         struct idt77252_dev *card = dev->dev_data;
2004         struct sk_buff *skb;
2005
2006         skb = dev_alloc_skb(64);
2007         if (!skb) {
2008                 printk("%s: Out of memory in send_oam().\n", card->name);
2009                 atomic_inc(&vcc->stats->tx_err);
2010                 return -ENOMEM;
2011         }
2012         refcount_add(skb->truesize, &sk_atm(vcc)->sk_wmem_alloc);
2013
2014         skb_put_data(skb, cell, 52);
2015
2016         return idt77252_send_skb(vcc, skb, 1);
2017 }
2018
2019 static __inline__ unsigned int
2020 idt77252_fls(unsigned int x)
2021 {
2022         int r = 1;
2023
2024         if (x == 0)
2025                 return 0;
2026         if (x & 0xffff0000) {
2027                 x >>= 16;
2028                 r += 16;
2029         }
2030         if (x & 0xff00) {
2031                 x >>= 8;
2032                 r += 8;
2033         }
2034         if (x & 0xf0) {
2035                 x >>= 4;
2036                 r += 4;
2037         }
2038         if (x & 0xc) {
2039                 x >>= 2;
2040                 r += 2;
2041         }
2042         if (x & 0x2)
2043                 r += 1;
2044         return r;
2045 }
2046
2047 static u16
2048 idt77252_int_to_atmfp(unsigned int rate)
2049 {
2050         u16 m, e;
2051
2052         if (rate == 0)
2053                 return 0;
2054         e = idt77252_fls(rate) - 1;
2055         if (e < 9)
2056                 m = (rate - (1 << e)) << (9 - e);
2057         else if (e == 9)
2058                 m = (rate - (1 << e));
2059         else /* e > 9 */
2060                 m = (rate - (1 << e)) >> (e - 9);
2061         return 0x4000 | (e << 9) | m;
2062 }
2063
2064 static u8
2065 idt77252_rate_logindex(struct idt77252_dev *card, int pcr)
2066 {
2067         u16 afp;
2068
2069         afp = idt77252_int_to_atmfp(pcr < 0 ? -pcr : pcr);
2070         if (pcr < 0)
2071                 return rate_to_log[(afp >> 5) & 0x1ff];
2072         return rate_to_log[((afp >> 5) + 1) & 0x1ff];
2073 }
2074
2075 static void
2076 idt77252_est_timer(unsigned long data)
2077 {
2078         struct vc_map *vc = (struct vc_map *)data;
2079         struct idt77252_dev *card = vc->card;
2080         struct rate_estimator *est;
2081         unsigned long flags;
2082         u32 rate, cps;
2083         u64 ncells;
2084         u8 lacr;
2085
2086         spin_lock_irqsave(&vc->lock, flags);
2087         est = vc->estimator;
2088         if (!est)
2089                 goto out;
2090
2091         ncells = est->cells;
2092
2093         rate = ((u32)(ncells - est->last_cells)) << (7 - est->interval);
2094         est->last_cells = ncells;
2095         est->avcps += ((long)rate - (long)est->avcps) >> est->ewma_log;
2096         est->cps = (est->avcps + 0x1f) >> 5;
2097
2098         cps = est->cps;
2099         if (cps < (est->maxcps >> 4))
2100                 cps = est->maxcps >> 4;
2101
2102         lacr = idt77252_rate_logindex(card, cps);
2103         if (lacr > vc->max_er)
2104                 lacr = vc->max_er;
2105
2106         if (lacr != vc->lacr) {
2107                 vc->lacr = lacr;
2108                 writel(TCMDQ_LACR|(vc->lacr << 16)|vc->index, SAR_REG_TCMDQ);
2109         }
2110
2111         est->timer.expires = jiffies + ((HZ / 4) << est->interval);
2112         add_timer(&est->timer);
2113
2114 out:
2115         spin_unlock_irqrestore(&vc->lock, flags);
2116 }
2117
2118 static struct rate_estimator *
2119 idt77252_init_est(struct vc_map *vc, int pcr)
2120 {
2121         struct rate_estimator *est;
2122
2123         est = kzalloc(sizeof(struct rate_estimator), GFP_KERNEL);
2124         if (!est)
2125                 return NULL;
2126         est->maxcps = pcr < 0 ? -pcr : pcr;
2127         est->cps = est->maxcps;
2128         est->avcps = est->cps << 5;
2129
2130         est->interval = 2;              /* XXX: make this configurable */
2131         est->ewma_log = 2;              /* XXX: make this configurable */
2132         setup_timer(&est->timer, idt77252_est_timer, (unsigned long)vc);
2133         mod_timer(&est->timer, jiffies + ((HZ / 4) << est->interval));
2134
2135         return est;
2136 }
2137
2138 static int
2139 idt77252_init_cbr(struct idt77252_dev *card, struct vc_map *vc,
2140                   struct atm_vcc *vcc, struct atm_qos *qos)
2141 {
2142         int tst_free, tst_used, tst_entries;
2143         unsigned long tmpl, modl;
2144         int tcr, tcra;
2145
2146         if ((qos->txtp.max_pcr == 0) &&
2147             (qos->txtp.pcr == 0) && (qos->txtp.min_pcr == 0)) {
2148                 printk("%s: trying to open a CBR VC with cell rate = 0\n",
2149                        card->name);
2150                 return -EINVAL;
2151         }
2152
2153         tst_used = 0;
2154         tst_free = card->tst_free;
2155         if (test_bit(VCF_TX, &vc->flags))
2156                 tst_used = vc->ntste;
2157         tst_free += tst_used;
2158
2159         tcr = atm_pcr_goal(&qos->txtp);
2160         tcra = tcr >= 0 ? tcr : -tcr;
2161
2162         TXPRINTK("%s: CBR target cell rate = %d\n", card->name, tcra);
2163
2164         tmpl = (unsigned long) tcra * ((unsigned long) card->tst_size - 2);
2165         modl = tmpl % (unsigned long)card->utopia_pcr;
2166
2167         tst_entries = (int) (tmpl / card->utopia_pcr);
2168         if (tcr > 0) {
2169                 if (modl > 0)
2170                         tst_entries++;
2171         } else if (tcr == 0) {
2172                 tst_entries = tst_free - SAR_TST_RESERVED;
2173                 if (tst_entries <= 0) {
2174                         printk("%s: no CBR bandwidth free.\n", card->name);
2175                         return -ENOSR;
2176                 }
2177         }
2178
2179         if (tst_entries == 0) {
2180                 printk("%s: selected CBR bandwidth < granularity.\n",
2181                        card->name);
2182                 return -EINVAL;
2183         }
2184
2185         if (tst_entries > (tst_free - SAR_TST_RESERVED)) {
2186                 printk("%s: not enough CBR bandwidth free.\n", card->name);
2187                 return -ENOSR;
2188         }
2189
2190         vc->ntste = tst_entries;
2191
2192         card->tst_free = tst_free - tst_entries;
2193         if (test_bit(VCF_TX, &vc->flags)) {
2194                 if (tst_used == tst_entries)
2195                         return 0;
2196
2197                 OPRINTK("%s: modify %d -> %d entries in TST.\n",
2198                         card->name, tst_used, tst_entries);
2199                 change_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2200                 return 0;
2201         }
2202
2203         OPRINTK("%s: setting %d entries in TST.\n", card->name, tst_entries);
2204         fill_tst(card, vc, tst_entries, TSTE_OPC_CBR);
2205         return 0;
2206 }
2207
2208 static int
2209 idt77252_init_ubr(struct idt77252_dev *card, struct vc_map *vc,
2210                   struct atm_vcc *vcc, struct atm_qos *qos)
2211 {
2212         unsigned long flags;
2213         int tcr;
2214
2215         spin_lock_irqsave(&vc->lock, flags);
2216         if (vc->estimator) {
2217                 del_timer(&vc->estimator->timer);
2218                 kfree(vc->estimator);
2219                 vc->estimator = NULL;
2220         }
2221         spin_unlock_irqrestore(&vc->lock, flags);
2222
2223         tcr = atm_pcr_goal(&qos->txtp);
2224         if (tcr == 0)
2225                 tcr = card->link_pcr;
2226
2227         vc->estimator = idt77252_init_est(vc, tcr);
2228
2229         vc->class = SCHED_UBR;
2230         vc->init_er = idt77252_rate_logindex(card, tcr);
2231         vc->lacr = vc->init_er;
2232         if (tcr < 0)
2233                 vc->max_er = vc->init_er;
2234         else
2235                 vc->max_er = 0xff;
2236
2237         return 0;
2238 }
2239
2240 static int
2241 idt77252_init_tx(struct idt77252_dev *card, struct vc_map *vc,
2242                  struct atm_vcc *vcc, struct atm_qos *qos)
2243 {
2244         int error;
2245
2246         if (test_bit(VCF_TX, &vc->flags))
2247                 return -EBUSY;
2248
2249         switch (qos->txtp.traffic_class) {
2250                 case ATM_CBR:
2251                         vc->class = SCHED_CBR;
2252                         break;
2253
2254                 case ATM_UBR:
2255                         vc->class = SCHED_UBR;
2256                         break;
2257
2258                 case ATM_VBR:
2259                 case ATM_ABR:
2260                 default:
2261                         return -EPROTONOSUPPORT;
2262         }
2263
2264         vc->scq = alloc_scq(card, vc->class);
2265         if (!vc->scq) {
2266                 printk("%s: can't get SCQ.\n", card->name);
2267                 return -ENOMEM;
2268         }
2269
2270         vc->scq->scd = get_free_scd(card, vc);
2271         if (vc->scq->scd == 0) {
2272                 printk("%s: no SCD available.\n", card->name);
2273                 free_scq(card, vc->scq);
2274                 return -ENOMEM;
2275         }
2276
2277         fill_scd(card, vc->scq, vc->class);
2278
2279         if (set_tct(card, vc)) {
2280                 printk("%s: class %d not supported.\n",
2281                        card->name, qos->txtp.traffic_class);
2282
2283                 card->scd2vc[vc->scd_index] = NULL;
2284                 free_scq(card, vc->scq);
2285                 return -EPROTONOSUPPORT;
2286         }
2287
2288         switch (vc->class) {
2289                 case SCHED_CBR:
2290                         error = idt77252_init_cbr(card, vc, vcc, qos);
2291                         if (error) {
2292                                 card->scd2vc[vc->scd_index] = NULL;
2293                                 free_scq(card, vc->scq);
2294                                 return error;
2295                         }
2296
2297                         clear_bit(VCF_IDLE, &vc->flags);
2298                         writel(TCMDQ_START | vc->index, SAR_REG_TCMDQ);
2299                         break;
2300
2301                 case SCHED_UBR:
2302                         error = idt77252_init_ubr(card, vc, vcc, qos);
2303                         if (error) {
2304                                 card->scd2vc[vc->scd_index] = NULL;
2305                                 free_scq(card, vc->scq);
2306                                 return error;
2307                         }
2308
2309                         set_bit(VCF_IDLE, &vc->flags);
2310                         break;
2311         }
2312
2313         vc->tx_vcc = vcc;
2314         set_bit(VCF_TX, &vc->flags);
2315         return 0;
2316 }
2317
2318 static int
2319 idt77252_init_rx(struct idt77252_dev *card, struct vc_map *vc,
2320                  struct atm_vcc *vcc, struct atm_qos *qos)
2321 {
2322         unsigned long flags;
2323         unsigned long addr;
2324         u32 rcte = 0;
2325
2326         if (test_bit(VCF_RX, &vc->flags))
2327                 return -EBUSY;
2328
2329         vc->rx_vcc = vcc;
2330         set_bit(VCF_RX, &vc->flags);
2331
2332         if ((vcc->vci == 3) || (vcc->vci == 4))
2333                 return 0;
2334
2335         flush_rx_pool(card, &vc->rcv.rx_pool);
2336
2337         rcte |= SAR_RCTE_CONNECTOPEN;
2338         rcte |= SAR_RCTE_RAWCELLINTEN;
2339
2340         switch (qos->aal) {
2341                 case ATM_AAL0:
2342                         rcte |= SAR_RCTE_RCQ;
2343                         break;
2344                 case ATM_AAL1:
2345                         rcte |= SAR_RCTE_OAM; /* Let SAR drop Video */
2346                         break;
2347                 case ATM_AAL34:
2348                         rcte |= SAR_RCTE_AAL34;
2349                         break;
2350                 case ATM_AAL5:
2351                         rcte |= SAR_RCTE_AAL5;
2352                         break;
2353                 default:
2354                         rcte |= SAR_RCTE_RCQ;
2355                         break;
2356         }
2357
2358         if (qos->aal != ATM_AAL5)
2359                 rcte |= SAR_RCTE_FBP_1;
2360         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_2)
2361                 rcte |= SAR_RCTE_FBP_3;
2362         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_1)
2363                 rcte |= SAR_RCTE_FBP_2;
2364         else if (qos->rxtp.max_sdu > SAR_FB_SIZE_0)
2365                 rcte |= SAR_RCTE_FBP_1;
2366         else
2367                 rcte |= SAR_RCTE_FBP_01;
2368
2369         addr = card->rct_base + (vc->index << 2);
2370
2371         OPRINTK("%s: writing RCT at 0x%lx\n", card->name, addr);
2372         write_sram(card, addr, rcte);
2373
2374         spin_lock_irqsave(&card->cmd_lock, flags);
2375         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2), SAR_REG_CMD);
2376         waitfor_idle(card);
2377         spin_unlock_irqrestore(&card->cmd_lock, flags);
2378
2379         return 0;
2380 }
2381
2382 static int
2383 idt77252_open(struct atm_vcc *vcc)
2384 {
2385         struct atm_dev *dev = vcc->dev;
2386         struct idt77252_dev *card = dev->dev_data;
2387         struct vc_map *vc;
2388         unsigned int index;
2389         unsigned int inuse;
2390         int error;
2391         int vci = vcc->vci;
2392         short vpi = vcc->vpi;
2393
2394         if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC)
2395                 return 0;
2396
2397         if (vpi >= (1 << card->vpibits)) {
2398                 printk("%s: unsupported VPI: %d\n", card->name, vpi);
2399                 return -EINVAL;
2400         }
2401
2402         if (vci >= (1 << card->vcibits)) {
2403                 printk("%s: unsupported VCI: %d\n", card->name, vci);
2404                 return -EINVAL;
2405         }
2406
2407         set_bit(ATM_VF_ADDR, &vcc->flags);
2408
2409         mutex_lock(&card->mutex);
2410
2411         OPRINTK("%s: opening vpi.vci: %d.%d\n", card->name, vpi, vci);
2412
2413         switch (vcc->qos.aal) {
2414         case ATM_AAL0:
2415         case ATM_AAL1:
2416         case ATM_AAL5:
2417                 break;
2418         default:
2419                 printk("%s: Unsupported AAL: %d\n", card->name, vcc->qos.aal);
2420                 mutex_unlock(&card->mutex);
2421                 return -EPROTONOSUPPORT;
2422         }
2423
2424         index = VPCI2VC(card, vpi, vci);
2425         if (!card->vcs[index]) {
2426                 card->vcs[index] = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2427                 if (!card->vcs[index]) {
2428                         printk("%s: can't alloc vc in open()\n", card->name);
2429                         mutex_unlock(&card->mutex);
2430                         return -ENOMEM;
2431                 }
2432                 card->vcs[index]->card = card;
2433                 card->vcs[index]->index = index;
2434
2435                 spin_lock_init(&card->vcs[index]->lock);
2436         }
2437         vc = card->vcs[index];
2438
2439         vcc->dev_data = vc;
2440
2441         IPRINTK("%s: idt77252_open: vc = %d (%d.%d) %s/%s (max RX SDU: %u)\n",
2442                 card->name, vc->index, vcc->vpi, vcc->vci,
2443                 vcc->qos.rxtp.traffic_class != ATM_NONE ? "rx" : "--",
2444                 vcc->qos.txtp.traffic_class != ATM_NONE ? "tx" : "--",
2445                 vcc->qos.rxtp.max_sdu);
2446
2447         inuse = 0;
2448         if (vcc->qos.txtp.traffic_class != ATM_NONE &&
2449             test_bit(VCF_TX, &vc->flags))
2450                 inuse = 1;
2451         if (vcc->qos.rxtp.traffic_class != ATM_NONE &&
2452             test_bit(VCF_RX, &vc->flags))
2453                 inuse += 2;
2454
2455         if (inuse) {
2456                 printk("%s: %s vci already in use.\n", card->name,
2457                        inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
2458                 mutex_unlock(&card->mutex);
2459                 return -EADDRINUSE;
2460         }
2461
2462         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2463                 error = idt77252_init_tx(card, vc, vcc, &vcc->qos);
2464                 if (error) {
2465                         mutex_unlock(&card->mutex);
2466                         return error;
2467                 }
2468         }
2469
2470         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2471                 error = idt77252_init_rx(card, vc, vcc, &vcc->qos);
2472                 if (error) {
2473                         mutex_unlock(&card->mutex);
2474                         return error;
2475                 }
2476         }
2477
2478         set_bit(ATM_VF_READY, &vcc->flags);
2479
2480         mutex_unlock(&card->mutex);
2481         return 0;
2482 }
2483
2484 static void
2485 idt77252_close(struct atm_vcc *vcc)
2486 {
2487         struct atm_dev *dev = vcc->dev;
2488         struct idt77252_dev *card = dev->dev_data;
2489         struct vc_map *vc = vcc->dev_data;
2490         unsigned long flags;
2491         unsigned long addr;
2492         unsigned long timeout;
2493
2494         mutex_lock(&card->mutex);
2495
2496         IPRINTK("%s: idt77252_close: vc = %d (%d.%d)\n",
2497                 card->name, vc->index, vcc->vpi, vcc->vci);
2498
2499         clear_bit(ATM_VF_READY, &vcc->flags);
2500
2501         if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
2502
2503                 spin_lock_irqsave(&vc->lock, flags);
2504                 clear_bit(VCF_RX, &vc->flags);
2505                 vc->rx_vcc = NULL;
2506                 spin_unlock_irqrestore(&vc->lock, flags);
2507
2508                 if ((vcc->vci == 3) || (vcc->vci == 4))
2509                         goto done;
2510
2511                 addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2512
2513                 spin_lock_irqsave(&card->cmd_lock, flags);
2514                 writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2), SAR_REG_CMD);
2515                 waitfor_idle(card);
2516                 spin_unlock_irqrestore(&card->cmd_lock, flags);
2517
2518                 if (skb_queue_len(&vc->rcv.rx_pool.queue) != 0) {
2519                         DPRINTK("%s: closing a VC with pending rx buffers.\n",
2520                                 card->name);
2521
2522                         recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2523                 }
2524         }
2525
2526 done:
2527         if (vcc->qos.txtp.traffic_class != ATM_NONE) {
2528
2529                 spin_lock_irqsave(&vc->lock, flags);
2530                 clear_bit(VCF_TX, &vc->flags);
2531                 clear_bit(VCF_IDLE, &vc->flags);
2532                 clear_bit(VCF_RSV, &vc->flags);
2533                 vc->tx_vcc = NULL;
2534
2535                 if (vc->estimator) {
2536                         del_timer(&vc->estimator->timer);
2537                         kfree(vc->estimator);
2538                         vc->estimator = NULL;
2539                 }
2540                 spin_unlock_irqrestore(&vc->lock, flags);
2541
2542                 timeout = 5 * 1000;
2543                 while (atomic_read(&vc->scq->used) > 0) {
2544                         timeout = msleep_interruptible(timeout);
2545                         if (!timeout) {
2546                                 pr_warn("%s: SCQ drain timeout: %u used\n",
2547                                         card->name, atomic_read(&vc->scq->used));
2548                                 break;
2549                         }
2550                 }
2551
2552                 writel(TCMDQ_HALT | vc->index, SAR_REG_TCMDQ);
2553                 clear_scd(card, vc->scq, vc->class);
2554
2555                 if (vc->class == SCHED_CBR) {
2556                         clear_tst(card, vc);
2557                         card->tst_free += vc->ntste;
2558                         vc->ntste = 0;
2559                 }
2560
2561                 card->scd2vc[vc->scd_index] = NULL;
2562                 free_scq(card, vc->scq);
2563         }
2564
2565         mutex_unlock(&card->mutex);
2566 }
2567
2568 static int
2569 idt77252_change_qos(struct atm_vcc *vcc, struct atm_qos *qos, int flags)
2570 {
2571         struct atm_dev *dev = vcc->dev;
2572         struct idt77252_dev *card = dev->dev_data;
2573         struct vc_map *vc = vcc->dev_data;
2574         int error = 0;
2575
2576         mutex_lock(&card->mutex);
2577
2578         if (qos->txtp.traffic_class != ATM_NONE) {
2579                 if (!test_bit(VCF_TX, &vc->flags)) {
2580                         error = idt77252_init_tx(card, vc, vcc, qos);
2581                         if (error)
2582                                 goto out;
2583                 } else {
2584                         switch (qos->txtp.traffic_class) {
2585                         case ATM_CBR:
2586                                 error = idt77252_init_cbr(card, vc, vcc, qos);
2587                                 if (error)
2588                                         goto out;
2589                                 break;
2590
2591                         case ATM_UBR:
2592                                 error = idt77252_init_ubr(card, vc, vcc, qos);
2593                                 if (error)
2594                                         goto out;
2595
2596                                 if (!test_bit(VCF_IDLE, &vc->flags)) {
2597                                         writel(TCMDQ_LACR | (vc->lacr << 16) |
2598                                                vc->index, SAR_REG_TCMDQ);
2599                                 }
2600                                 break;
2601
2602                         case ATM_VBR:
2603                         case ATM_ABR:
2604                                 error = -EOPNOTSUPP;
2605                                 goto out;
2606                         }
2607                 }
2608         }
2609
2610         if ((qos->rxtp.traffic_class != ATM_NONE) &&
2611             !test_bit(VCF_RX, &vc->flags)) {
2612                 error = idt77252_init_rx(card, vc, vcc, qos);
2613                 if (error)
2614                         goto out;
2615         }
2616
2617         memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2618
2619         set_bit(ATM_VF_HASQOS, &vcc->flags);
2620
2621 out:
2622         mutex_unlock(&card->mutex);
2623         return error;
2624 }
2625
2626 static int
2627 idt77252_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2628 {
2629         struct idt77252_dev *card = dev->dev_data;
2630         int i, left;
2631
2632         left = (int) *pos;
2633         if (!left--)
2634                 return sprintf(page, "IDT77252 Interrupts:\n");
2635         if (!left--)
2636                 return sprintf(page, "TSIF:  %lu\n", card->irqstat[15]);
2637         if (!left--)
2638                 return sprintf(page, "TXICP: %lu\n", card->irqstat[14]);
2639         if (!left--)
2640                 return sprintf(page, "TSQF:  %lu\n", card->irqstat[12]);
2641         if (!left--)
2642                 return sprintf(page, "TMROF: %lu\n", card->irqstat[11]);
2643         if (!left--)
2644                 return sprintf(page, "PHYI:  %lu\n", card->irqstat[10]);
2645         if (!left--)
2646                 return sprintf(page, "FBQ3A: %lu\n", card->irqstat[8]);
2647         if (!left--)
2648                 return sprintf(page, "FBQ2A: %lu\n", card->irqstat[7]);
2649         if (!left--)
2650                 return sprintf(page, "RSQF:  %lu\n", card->irqstat[6]);
2651         if (!left--)
2652                 return sprintf(page, "EPDU:  %lu\n", card->irqstat[5]);
2653         if (!left--)
2654                 return sprintf(page, "RAWCF: %lu\n", card->irqstat[4]);
2655         if (!left--)
2656                 return sprintf(page, "FBQ1A: %lu\n", card->irqstat[3]);
2657         if (!left--)
2658                 return sprintf(page, "FBQ0A: %lu\n", card->irqstat[2]);
2659         if (!left--)
2660                 return sprintf(page, "RSQAF: %lu\n", card->irqstat[1]);
2661         if (!left--)
2662                 return sprintf(page, "IDT77252 Transmit Connection Table:\n");
2663
2664         for (i = 0; i < card->tct_size; i++) {
2665                 unsigned long tct;
2666                 struct atm_vcc *vcc;
2667                 struct vc_map *vc;
2668                 char *p;
2669
2670                 vc = card->vcs[i];
2671                 if (!vc)
2672                         continue;
2673
2674                 vcc = NULL;
2675                 if (vc->tx_vcc)
2676                         vcc = vc->tx_vcc;
2677                 if (!vcc)
2678                         continue;
2679                 if (left--)
2680                         continue;
2681
2682                 p = page;
2683                 p += sprintf(p, "  %4u: %u.%u: ", i, vcc->vpi, vcc->vci);
2684                 tct = (unsigned long) (card->tct_base + i * SAR_SRAM_TCT_SIZE);
2685
2686                 for (i = 0; i < 8; i++)
2687                         p += sprintf(p, " %08x", read_sram(card, tct + i));
2688                 p += sprintf(p, "\n");
2689                 return p - page;
2690         }
2691         return 0;
2692 }
2693
2694 /*****************************************************************************/
2695 /*                                                                           */
2696 /* Interrupt handler                                                         */
2697 /*                                                                           */
2698 /*****************************************************************************/
2699
2700 static void
2701 idt77252_collect_stat(struct idt77252_dev *card)
2702 {
2703         (void) readl(SAR_REG_CDC);
2704         (void) readl(SAR_REG_VPEC);
2705         (void) readl(SAR_REG_ICC);
2706
2707 }
2708
2709 static irqreturn_t
2710 idt77252_interrupt(int irq, void *dev_id)
2711 {
2712         struct idt77252_dev *card = dev_id;
2713         u32 stat;
2714
2715         stat = readl(SAR_REG_STAT) & 0xffff;
2716         if (!stat)      /* no interrupt for us */
2717                 return IRQ_NONE;
2718
2719         if (test_and_set_bit(IDT77252_BIT_INTERRUPT, &card->flags)) {
2720                 printk("%s: Re-entering irq_handler()\n", card->name);
2721                 goto out;
2722         }
2723
2724         writel(stat, SAR_REG_STAT);     /* reset interrupt */
2725
2726         if (stat & SAR_STAT_TSIF) {     /* entry written to TSQ  */
2727                 INTPRINTK("%s: TSIF\n", card->name);
2728                 card->irqstat[15]++;
2729                 idt77252_tx(card);
2730         }
2731         if (stat & SAR_STAT_TXICP) {    /* Incomplete CS-PDU has  */
2732                 INTPRINTK("%s: TXICP\n", card->name);
2733                 card->irqstat[14]++;
2734 #ifdef CONFIG_ATM_IDT77252_DEBUG
2735                 idt77252_tx_dump(card);
2736 #endif
2737         }
2738         if (stat & SAR_STAT_TSQF) {     /* TSQ 7/8 full           */
2739                 INTPRINTK("%s: TSQF\n", card->name);
2740                 card->irqstat[12]++;
2741                 idt77252_tx(card);
2742         }
2743         if (stat & SAR_STAT_TMROF) {    /* Timer overflow         */
2744                 INTPRINTK("%s: TMROF\n", card->name);
2745                 card->irqstat[11]++;
2746                 idt77252_collect_stat(card);
2747         }
2748
2749         if (stat & SAR_STAT_EPDU) {     /* Got complete CS-PDU    */
2750                 INTPRINTK("%s: EPDU\n", card->name);
2751                 card->irqstat[5]++;
2752                 idt77252_rx(card);
2753         }
2754         if (stat & SAR_STAT_RSQAF) {    /* RSQ is 7/8 full        */
2755                 INTPRINTK("%s: RSQAF\n", card->name);
2756                 card->irqstat[1]++;
2757                 idt77252_rx(card);
2758         }
2759         if (stat & SAR_STAT_RSQF) {     /* RSQ is full            */
2760                 INTPRINTK("%s: RSQF\n", card->name);
2761                 card->irqstat[6]++;
2762                 idt77252_rx(card);
2763         }
2764         if (stat & SAR_STAT_RAWCF) {    /* Raw cell received      */
2765                 INTPRINTK("%s: RAWCF\n", card->name);
2766                 card->irqstat[4]++;
2767                 idt77252_rx_raw(card);
2768         }
2769
2770         if (stat & SAR_STAT_PHYI) {     /* PHY device interrupt   */
2771                 INTPRINTK("%s: PHYI", card->name);
2772                 card->irqstat[10]++;
2773                 if (card->atmdev->phy && card->atmdev->phy->interrupt)
2774                         card->atmdev->phy->interrupt(card->atmdev);
2775         }
2776
2777         if (stat & (SAR_STAT_FBQ0A | SAR_STAT_FBQ1A |
2778                     SAR_STAT_FBQ2A | SAR_STAT_FBQ3A)) {
2779
2780                 writel(readl(SAR_REG_CFG) & ~(SAR_CFG_FBIE), SAR_REG_CFG);
2781
2782                 INTPRINTK("%s: FBQA: %04x\n", card->name, stat);
2783
2784                 if (stat & SAR_STAT_FBQ0A)
2785                         card->irqstat[2]++;
2786                 if (stat & SAR_STAT_FBQ1A)
2787                         card->irqstat[3]++;
2788                 if (stat & SAR_STAT_FBQ2A)
2789                         card->irqstat[7]++;
2790                 if (stat & SAR_STAT_FBQ3A)
2791                         card->irqstat[8]++;
2792
2793                 schedule_work(&card->tqueue);
2794         }
2795
2796 out:
2797         clear_bit(IDT77252_BIT_INTERRUPT, &card->flags);
2798         return IRQ_HANDLED;
2799 }
2800
2801 static void
2802 idt77252_softint(struct work_struct *work)
2803 {
2804         struct idt77252_dev *card =
2805                 container_of(work, struct idt77252_dev, tqueue);
2806         u32 stat;
2807         int done;
2808
2809         for (done = 1; ; done = 1) {
2810                 stat = readl(SAR_REG_STAT) >> 16;
2811
2812                 if ((stat & 0x0f) < SAR_FBQ0_HIGH) {
2813                         add_rx_skb(card, 0, SAR_FB_SIZE_0, 32);
2814                         done = 0;
2815                 }
2816
2817                 stat >>= 4;
2818                 if ((stat & 0x0f) < SAR_FBQ1_HIGH) {
2819                         add_rx_skb(card, 1, SAR_FB_SIZE_1, 32);
2820                         done = 0;
2821                 }
2822
2823                 stat >>= 4;
2824                 if ((stat & 0x0f) < SAR_FBQ2_HIGH) {
2825                         add_rx_skb(card, 2, SAR_FB_SIZE_2, 32);
2826                         done = 0;
2827                 }
2828
2829                 stat >>= 4;
2830                 if ((stat & 0x0f) < SAR_FBQ3_HIGH) {
2831                         add_rx_skb(card, 3, SAR_FB_SIZE_3, 32);
2832                         done = 0;
2833                 }
2834
2835                 if (done)
2836                         break;
2837         }
2838
2839         writel(readl(SAR_REG_CFG) | SAR_CFG_FBIE, SAR_REG_CFG);
2840 }
2841
2842
2843 static int
2844 open_card_oam(struct idt77252_dev *card)
2845 {
2846         unsigned long flags;
2847         unsigned long addr;
2848         struct vc_map *vc;
2849         int vpi, vci;
2850         int index;
2851         u32 rcte;
2852
2853         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2854                 for (vci = 3; vci < 5; vci++) {
2855                         index = VPCI2VC(card, vpi, vci);
2856
2857                         vc = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2858                         if (!vc) {
2859                                 printk("%s: can't alloc vc\n", card->name);
2860                                 return -ENOMEM;
2861                         }
2862                         vc->index = index;
2863                         card->vcs[index] = vc;
2864
2865                         flush_rx_pool(card, &vc->rcv.rx_pool);
2866
2867                         rcte = SAR_RCTE_CONNECTOPEN |
2868                                SAR_RCTE_RAWCELLINTEN |
2869                                SAR_RCTE_RCQ |
2870                                SAR_RCTE_FBP_1;
2871
2872                         addr = card->rct_base + (vc->index << 2);
2873                         write_sram(card, addr, rcte);
2874
2875                         spin_lock_irqsave(&card->cmd_lock, flags);
2876                         writel(SAR_CMD_OPEN_CONNECTION | (addr << 2),
2877                                SAR_REG_CMD);
2878                         waitfor_idle(card);
2879                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2880                 }
2881         }
2882
2883         return 0;
2884 }
2885
2886 static void
2887 close_card_oam(struct idt77252_dev *card)
2888 {
2889         unsigned long flags;
2890         unsigned long addr;
2891         struct vc_map *vc;
2892         int vpi, vci;
2893         int index;
2894
2895         for (vpi = 0; vpi < (1 << card->vpibits); vpi++) {
2896                 for (vci = 3; vci < 5; vci++) {
2897                         index = VPCI2VC(card, vpi, vci);
2898                         vc = card->vcs[index];
2899
2900                         addr = card->rct_base + vc->index * SAR_SRAM_RCT_SIZE;
2901
2902                         spin_lock_irqsave(&card->cmd_lock, flags);
2903                         writel(SAR_CMD_CLOSE_CONNECTION | (addr << 2),
2904                                SAR_REG_CMD);
2905                         waitfor_idle(card);
2906                         spin_unlock_irqrestore(&card->cmd_lock, flags);
2907
2908                         if (skb_queue_len(&vc->rcv.rx_pool.queue) != 0) {
2909                                 DPRINTK("%s: closing a VC "
2910                                         "with pending rx buffers.\n",
2911                                         card->name);
2912
2913                                 recycle_rx_pool_skb(card, &vc->rcv.rx_pool);
2914                         }
2915                 }
2916         }
2917 }
2918
2919 static int
2920 open_card_ubr0(struct idt77252_dev *card)
2921 {
2922         struct vc_map *vc;
2923
2924         vc = kzalloc(sizeof(struct vc_map), GFP_KERNEL);
2925         if (!vc) {
2926                 printk("%s: can't alloc vc\n", card->name);
2927                 return -ENOMEM;
2928         }
2929         card->vcs[0] = vc;
2930         vc->class = SCHED_UBR0;
2931
2932         vc->scq = alloc_scq(card, vc->class);
2933         if (!vc->scq) {
2934                 printk("%s: can't get SCQ.\n", card->name);
2935                 return -ENOMEM;
2936         }
2937
2938         card->scd2vc[0] = vc;
2939         vc->scd_index = 0;
2940         vc->scq->scd = card->scd_base;
2941
2942         fill_scd(card, vc->scq, vc->class);
2943
2944         write_sram(card, card->tct_base + 0, TCT_UBR | card->scd_base);
2945         write_sram(card, card->tct_base + 1, 0);
2946         write_sram(card, card->tct_base + 2, 0);
2947         write_sram(card, card->tct_base + 3, 0);
2948         write_sram(card, card->tct_base + 4, 0);
2949         write_sram(card, card->tct_base + 5, 0);
2950         write_sram(card, card->tct_base + 6, 0);
2951         write_sram(card, card->tct_base + 7, TCT_FLAG_UBR);
2952
2953         clear_bit(VCF_IDLE, &vc->flags);
2954         writel(TCMDQ_START | 0, SAR_REG_TCMDQ);
2955         return 0;
2956 }
2957
2958 static int
2959 idt77252_dev_open(struct idt77252_dev *card)
2960 {
2961         u32 conf;
2962
2963         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
2964                 printk("%s: SAR not yet initialized.\n", card->name);
2965                 return -1;
2966         }
2967
2968         conf = SAR_CFG_RXPTH|   /* enable receive path                  */
2969             SAR_RX_DELAY |      /* interrupt on complete PDU            */
2970             SAR_CFG_RAWIE |     /* interrupt enable on raw cells        */
2971             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full         */
2972             SAR_CFG_TMOIE |     /* interrupt on timer overflow          */
2973             SAR_CFG_FBIE |      /* interrupt on low free buffers        */
2974             SAR_CFG_TXEN |      /* transmit operation enable            */
2975             SAR_CFG_TXINT |     /* interrupt on transmit status         */
2976             SAR_CFG_TXUIE |     /* interrupt on transmit underrun       */
2977             SAR_CFG_TXSFI |     /* interrupt on TSQ almost full         */
2978             SAR_CFG_PHYIE       /* enable PHY interrupts                */
2979             ;
2980
2981 #ifdef CONFIG_ATM_IDT77252_RCV_ALL
2982         /* Test RAW cell receive. */
2983         conf |= SAR_CFG_VPECA;
2984 #endif
2985
2986         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
2987
2988         if (open_card_oam(card)) {
2989                 printk("%s: Error initializing OAM.\n", card->name);
2990                 return -1;
2991         }
2992
2993         if (open_card_ubr0(card)) {
2994                 printk("%s: Error initializing UBR0.\n", card->name);
2995                 return -1;
2996         }
2997
2998         IPRINTK("%s: opened IDT77252 ABR SAR.\n", card->name);
2999         return 0;
3000 }
3001
3002 static void idt77252_dev_close(struct atm_dev *dev)
3003 {
3004         struct idt77252_dev *card = dev->dev_data;
3005         u32 conf;
3006
3007         close_card_oam(card);
3008
3009         conf = SAR_CFG_RXPTH |  /* enable receive path           */
3010             SAR_RX_DELAY |      /* interrupt on complete PDU     */
3011             SAR_CFG_RAWIE |     /* interrupt enable on raw cells */
3012             SAR_CFG_RQFIE |     /* interrupt on RSQ almost full  */
3013             SAR_CFG_TMOIE |     /* interrupt on timer overflow   */
3014             SAR_CFG_FBIE |      /* interrupt on low free buffers */
3015             SAR_CFG_TXEN |      /* transmit operation enable     */
3016             SAR_CFG_TXINT |     /* interrupt on transmit status  */
3017             SAR_CFG_TXUIE |     /* interrupt on xmit underrun    */
3018             SAR_CFG_TXSFI       /* interrupt on TSQ almost full  */
3019             ;
3020
3021         writel(readl(SAR_REG_CFG) & ~(conf), SAR_REG_CFG);
3022
3023         DIPRINTK("%s: closed IDT77252 ABR SAR.\n", card->name);
3024 }
3025
3026
3027 /*****************************************************************************/
3028 /*                                                                           */
3029 /* Initialisation and Deinitialization of IDT77252                           */
3030 /*                                                                           */
3031 /*****************************************************************************/
3032
3033
3034 static void
3035 deinit_card(struct idt77252_dev *card)
3036 {
3037         struct sk_buff *skb;
3038         int i, j;
3039
3040         if (!test_bit(IDT77252_BIT_INIT, &card->flags)) {
3041                 printk("%s: SAR not yet initialized.\n", card->name);
3042                 return;
3043         }
3044         DIPRINTK("idt77252: deinitialize card %u\n", card->index);
3045
3046         writel(0, SAR_REG_CFG);
3047
3048         if (card->atmdev)
3049                 atm_dev_deregister(card->atmdev);
3050
3051         for (i = 0; i < 4; i++) {
3052                 for (j = 0; j < FBQ_SIZE; j++) {
3053                         skb = card->sbpool[i].skb[j];
3054                         if (skb) {
3055                                 dma_unmap_single(&card->pcidev->dev,
3056                                                  IDT77252_PRV_PADDR(skb),
3057                                                  (skb_end_pointer(skb) -
3058                                                   skb->data),
3059                                                  DMA_FROM_DEVICE);
3060                                 card->sbpool[i].skb[j] = NULL;
3061                                 dev_kfree_skb(skb);
3062                         }
3063                 }
3064         }
3065
3066         vfree(card->soft_tst);
3067
3068         vfree(card->scd2vc);
3069
3070         vfree(card->vcs);
3071
3072         if (card->raw_cell_hnd) {
3073                 dma_free_coherent(&card->pcidev->dev, 2 * sizeof(u32),
3074                                   card->raw_cell_hnd, card->raw_cell_paddr);
3075         }
3076
3077         if (card->rsq.base) {
3078                 DIPRINTK("%s: Release RSQ ...\n", card->name);
3079                 deinit_rsq(card);
3080         }
3081
3082         if (card->tsq.base) {
3083                 DIPRINTK("%s: Release TSQ ...\n", card->name);
3084                 deinit_tsq(card);
3085         }
3086
3087         DIPRINTK("idt77252: Release IRQ.\n");
3088         free_irq(card->pcidev->irq, card);
3089
3090         for (i = 0; i < 4; i++) {
3091                 if (card->fbq[i])
3092                         iounmap(card->fbq[i]);
3093         }
3094
3095         if (card->membase)
3096                 iounmap(card->membase);
3097
3098         clear_bit(IDT77252_BIT_INIT, &card->flags);
3099         DIPRINTK("%s: Card deinitialized.\n", card->name);
3100 }
3101
3102
3103 static void init_sram(struct idt77252_dev *card)
3104 {
3105         int i;
3106
3107         for (i = 0; i < card->sramsize; i += 4)
3108                 write_sram(card, (i >> 2), 0);
3109
3110         /* set SRAM layout for THIS card */
3111         if (card->sramsize == (512 * 1024)) {
3112                 card->tct_base = SAR_SRAM_TCT_128_BASE;
3113                 card->tct_size = (SAR_SRAM_TCT_128_TOP - card->tct_base + 1)
3114                     / SAR_SRAM_TCT_SIZE;
3115                 card->rct_base = SAR_SRAM_RCT_128_BASE;
3116                 card->rct_size = (SAR_SRAM_RCT_128_TOP - card->rct_base + 1)
3117                     / SAR_SRAM_RCT_SIZE;
3118                 card->rt_base = SAR_SRAM_RT_128_BASE;
3119                 card->scd_base = SAR_SRAM_SCD_128_BASE;
3120                 card->scd_size = (SAR_SRAM_SCD_128_TOP - card->scd_base + 1)
3121                     / SAR_SRAM_SCD_SIZE;
3122                 card->tst[0] = SAR_SRAM_TST1_128_BASE;
3123                 card->tst[1] = SAR_SRAM_TST2_128_BASE;
3124                 card->tst_size = SAR_SRAM_TST1_128_TOP - card->tst[0] + 1;
3125                 card->abrst_base = SAR_SRAM_ABRSTD_128_BASE;
3126                 card->abrst_size = SAR_ABRSTD_SIZE_8K;
3127                 card->fifo_base = SAR_SRAM_FIFO_128_BASE;
3128                 card->fifo_size = SAR_RXFD_SIZE_32K;
3129         } else {
3130                 card->tct_base = SAR_SRAM_TCT_32_BASE;
3131                 card->tct_size = (SAR_SRAM_TCT_32_TOP - card->tct_base + 1)
3132                     / SAR_SRAM_TCT_SIZE;
3133                 card->rct_base = SAR_SRAM_RCT_32_BASE;
3134                 card->rct_size = (SAR_SRAM_RCT_32_TOP - card->rct_base + 1)
3135                     / SAR_SRAM_RCT_SIZE;
3136                 card->rt_base = SAR_SRAM_RT_32_BASE;
3137                 card->scd_base = SAR_SRAM_SCD_32_BASE;
3138                 card->scd_size = (SAR_SRAM_SCD_32_TOP - card->scd_base + 1)
3139                     / SAR_SRAM_SCD_SIZE;
3140                 card->tst[0] = SAR_SRAM_TST1_32_BASE;
3141                 card->tst[1] = SAR_SRAM_TST2_32_BASE;
3142                 card->tst_size = (SAR_SRAM_TST1_32_TOP - card->tst[0] + 1);
3143                 card->abrst_base = SAR_SRAM_ABRSTD_32_BASE;
3144                 card->abrst_size = SAR_ABRSTD_SIZE_1K;
3145                 card->fifo_base = SAR_SRAM_FIFO_32_BASE;
3146                 card->fifo_size = SAR_RXFD_SIZE_4K;
3147         }
3148
3149         /* Initialize TCT */
3150         for (i = 0; i < card->tct_size; i++) {
3151                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 0, 0);
3152                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 1, 0);
3153                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 2, 0);
3154                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 3, 0);
3155                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 4, 0);
3156                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 5, 0);
3157                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 6, 0);
3158                 write_sram(card, i * SAR_SRAM_TCT_SIZE + 7, 0);
3159         }
3160
3161         /* Initialize RCT */
3162         for (i = 0; i < card->rct_size; i++) {
3163                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE,
3164                                     (u32) SAR_RCTE_RAWCELLINTEN);
3165                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 1,
3166                                     (u32) 0);
3167                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 2,
3168                                     (u32) 0);
3169                 write_sram(card, card->rct_base + i * SAR_SRAM_RCT_SIZE + 3,
3170                                     (u32) 0xffffffff);
3171         }
3172
3173         writel((SAR_FBQ0_LOW << 28) | 0x00000000 | 0x00000000 |
3174                (SAR_FB_SIZE_0 / 48), SAR_REG_FBQS0);
3175         writel((SAR_FBQ1_LOW << 28) | 0x00000000 | 0x00000000 |
3176                (SAR_FB_SIZE_1 / 48), SAR_REG_FBQS1);
3177         writel((SAR_FBQ2_LOW << 28) | 0x00000000 | 0x00000000 |
3178                (SAR_FB_SIZE_2 / 48), SAR_REG_FBQS2);
3179         writel((SAR_FBQ3_LOW << 28) | 0x00000000 | 0x00000000 |
3180                (SAR_FB_SIZE_3 / 48), SAR_REG_FBQS3);
3181
3182         /* Initialize rate table  */
3183         for (i = 0; i < 256; i++) {
3184                 write_sram(card, card->rt_base + i, log_to_rate[i]);
3185         }
3186
3187         for (i = 0; i < 128; i++) {
3188                 unsigned int tmp;
3189
3190                 tmp  = rate_to_log[(i << 2) + 0] << 0;
3191                 tmp |= rate_to_log[(i << 2) + 1] << 8;
3192                 tmp |= rate_to_log[(i << 2) + 2] << 16;
3193                 tmp |= rate_to_log[(i << 2) + 3] << 24;
3194                 write_sram(card, card->rt_base + 256 + i, tmp);
3195         }
3196
3197 #if 0 /* Fill RDF and AIR tables. */
3198         for (i = 0; i < 128; i++) {
3199                 unsigned int tmp;
3200
3201                 tmp = RDF[0][(i << 1) + 0] << 16;
3202                 tmp |= RDF[0][(i << 1) + 1] << 0;
3203                 write_sram(card, card->rt_base + 512 + i, tmp);
3204         }
3205
3206         for (i = 0; i < 128; i++) {
3207                 unsigned int tmp;
3208
3209                 tmp = AIR[0][(i << 1) + 0] << 16;
3210                 tmp |= AIR[0][(i << 1) + 1] << 0;
3211                 write_sram(card, card->rt_base + 640 + i, tmp);
3212         }
3213 #endif
3214
3215         IPRINTK("%s: initialize rate table ...\n", card->name);
3216         writel(card->rt_base << 2, SAR_REG_RTBL);
3217
3218         /* Initialize TSTs */
3219         IPRINTK("%s: initialize TST ...\n", card->name);
3220         card->tst_free = card->tst_size - 2;    /* last two are jumps */
3221
3222         for (i = card->tst[0]; i < card->tst[0] + card->tst_size - 2; i++)
3223                 write_sram(card, i, TSTE_OPC_VAR);
3224         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3225         idt77252_sram_write_errors = 1;
3226         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3227         idt77252_sram_write_errors = 0;
3228         for (i = card->tst[1]; i < card->tst[1] + card->tst_size - 2; i++)
3229                 write_sram(card, i, TSTE_OPC_VAR);
3230         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[1] << 2));
3231         idt77252_sram_write_errors = 1;
3232         write_sram(card, i++, TSTE_OPC_JMP | (card->tst[0] << 2));
3233         idt77252_sram_write_errors = 0;
3234
3235         card->tst_index = 0;
3236         writel(card->tst[0] << 2, SAR_REG_TSTB);
3237
3238         /* Initialize ABRSTD and Receive FIFO */
3239         IPRINTK("%s: initialize ABRSTD ...\n", card->name);
3240         writel(card->abrst_size | (card->abrst_base << 2),
3241                SAR_REG_ABRSTD);
3242
3243         IPRINTK("%s: initialize receive fifo ...\n", card->name);
3244         writel(card->fifo_size | (card->fifo_base << 2),
3245                SAR_REG_RXFD);
3246
3247         IPRINTK("%s: SRAM initialization complete.\n", card->name);
3248 }
3249
3250 static int init_card(struct atm_dev *dev)
3251 {
3252         struct idt77252_dev *card = dev->dev_data;
3253         struct pci_dev *pcidev = card->pcidev;
3254         unsigned long tmpl, modl;
3255         unsigned int linkrate, rsvdcr;
3256         unsigned int tst_entries;
3257         struct net_device *tmp;
3258         char tname[10];
3259
3260         u32 size;
3261         u_char pci_byte;
3262         u32 conf;
3263         int i, k;
3264
3265         if (test_bit(IDT77252_BIT_INIT, &card->flags)) {
3266                 printk("Error: SAR already initialized.\n");
3267                 return -1;
3268         }
3269
3270 /*****************************************************************/
3271 /*   P C I   C O N F I G U R A T I O N                           */
3272 /*****************************************************************/
3273
3274         /* Set PCI Retry-Timeout and TRDY timeout */
3275         IPRINTK("%s: Checking PCI retries.\n", card->name);
3276         if (pci_read_config_byte(pcidev, 0x40, &pci_byte) != 0) {
3277                 printk("%s: can't read PCI retry timeout.\n", card->name);
3278                 deinit_card(card);
3279                 return -1;
3280         }
3281         if (pci_byte != 0) {
3282                 IPRINTK("%s: PCI retry timeout: %d, set to 0.\n",
3283                         card->name, pci_byte);
3284                 if (pci_write_config_byte(pcidev, 0x40, 0) != 0) {
3285                         printk("%s: can't set PCI retry timeout.\n",
3286                                card->name);
3287                         deinit_card(card);
3288                         return -1;
3289                 }
3290         }
3291         IPRINTK("%s: Checking PCI TRDY.\n", card->name);
3292         if (pci_read_config_byte(pcidev, 0x41, &pci_byte) != 0) {
3293                 printk("%s: can't read PCI TRDY timeout.\n", card->name);
3294                 deinit_card(card);
3295                 return -1;
3296         }
3297         if (pci_byte != 0) {
3298                 IPRINTK("%s: PCI TRDY timeout: %d, set to 0.\n",
3299                         card->name, pci_byte);
3300                 if (pci_write_config_byte(pcidev, 0x41, 0) != 0) {
3301                         printk("%s: can't set PCI TRDY timeout.\n", card->name);
3302                         deinit_card(card);
3303                         return -1;
3304                 }
3305         }
3306         /* Reset Timer register */
3307         if (readl(SAR_REG_STAT) & SAR_STAT_TMROF) {
3308                 printk("%s: resetting timer overflow.\n", card->name);
3309                 writel(SAR_STAT_TMROF, SAR_REG_STAT);
3310         }
3311         IPRINTK("%s: Request IRQ ... ", card->name);
3312         if (request_irq(pcidev->irq, idt77252_interrupt, IRQF_SHARED,
3313                         card->name, card) != 0) {
3314                 printk("%s: can't allocate IRQ.\n", card->name);
3315                 deinit_card(card);
3316                 return -1;
3317         }
3318         IPRINTK("got %d.\n", pcidev->irq);
3319
3320 /*****************************************************************/
3321 /*   C H E C K   A N D   I N I T   S R A M                       */
3322 /*****************************************************************/
3323
3324         IPRINTK("%s: Initializing SRAM\n", card->name);
3325
3326         /* preset size of connecton table, so that init_sram() knows about it */
3327         conf =  SAR_CFG_TX_FIFO_SIZE_9 |        /* Use maximum fifo size */
3328                 SAR_CFG_RXSTQ_SIZE_8k |         /* Receive Status Queue is 8k */
3329                 SAR_CFG_IDLE_CLP |              /* Set CLP on idle cells */
3330 #ifndef ATM_IDT77252_SEND_IDLE
3331                 SAR_CFG_NO_IDLE |               /* Do not send idle cells */
3332 #endif
3333                 0;
3334
3335         if (card->sramsize == (512 * 1024))
3336                 conf |= SAR_CFG_CNTBL_1k;
3337         else
3338                 conf |= SAR_CFG_CNTBL_512;
3339
3340         switch (vpibits) {
3341         case 0:
3342                 conf |= SAR_CFG_VPVCS_0;
3343                 break;
3344         default:
3345         case 1:
3346                 conf |= SAR_CFG_VPVCS_1;
3347                 break;
3348         case 2:
3349                 conf |= SAR_CFG_VPVCS_2;
3350                 break;
3351         case 8:
3352                 conf |= SAR_CFG_VPVCS_8;
3353                 break;
3354         }
3355
3356         writel(readl(SAR_REG_CFG) | conf, SAR_REG_CFG);
3357
3358         init_sram(card);
3359
3360 /********************************************************************/
3361 /*  A L L O C   R A M   A N D   S E T   V A R I O U S   T H I N G S */
3362 /********************************************************************/
3363         /* Initialize TSQ */
3364         if (0 != init_tsq(card)) {
3365                 deinit_card(card);
3366                 return -1;
3367         }
3368         /* Initialize RSQ */
3369         if (0 != init_rsq(card)) {
3370                 deinit_card(card);
3371                 return -1;
3372         }
3373
3374         card->vpibits = vpibits;
3375         if (card->sramsize == (512 * 1024)) {
3376                 card->vcibits = 10 - card->vpibits;
3377         } else {
3378                 card->vcibits = 9 - card->vpibits;
3379         }
3380
3381         card->vcimask = 0;
3382         for (k = 0, i = 1; k < card->vcibits; k++) {
3383                 card->vcimask |= i;
3384                 i <<= 1;
3385         }
3386
3387         IPRINTK("%s: Setting VPI/VCI mask to zero.\n", card->name);
3388         writel(0, SAR_REG_VPM);
3389
3390         /* Little Endian Order   */
3391         writel(0, SAR_REG_GP);
3392
3393         /* Initialize RAW Cell Handle Register  */
3394         card->raw_cell_hnd = dma_zalloc_coherent(&card->pcidev->dev,
3395                                                  2 * sizeof(u32),
3396                                                  &card->raw_cell_paddr,
3397                                                  GFP_KERNEL);
3398         if (!card->raw_cell_hnd) {
3399                 printk("%s: memory allocation failure.\n", card->name);
3400                 deinit_card(card);
3401                 return -1;
3402         }
3403         writel(card->raw_cell_paddr, SAR_REG_RAWHND);
3404         IPRINTK("%s: raw cell handle is at 0x%p.\n", card->name,
3405                 card->raw_cell_hnd);
3406
3407         size = sizeof(struct vc_map *) * card->tct_size;
3408         IPRINTK("%s: allocate %d byte for VC map.\n", card->name, size);
3409         card->vcs = vzalloc(size);
3410         if (!card->vcs) {
3411                 printk("%s: memory allocation failure.\n", card->name);
3412                 deinit_card(card);
3413                 return -1;
3414         }
3415
3416         size = sizeof(struct vc_map *) * card->scd_size;
3417         IPRINTK("%s: allocate %d byte for SCD to VC mapping.\n",
3418                 card->name, size);
3419         card->scd2vc = vzalloc(size);
3420         if (!card->scd2vc) {
3421                 printk("%s: memory allocation failure.\n", card->name);
3422                 deinit_card(card);
3423                 return -1;
3424         }
3425
3426         size = sizeof(struct tst_info) * (card->tst_size - 2);
3427         IPRINTK("%s: allocate %d byte for TST to VC mapping.\n",
3428                 card->name, size);
3429         card->soft_tst = vmalloc(size);
3430         if (!card->soft_tst) {
3431                 printk("%s: memory allocation failure.\n", card->name);
3432                 deinit_card(card);
3433                 return -1;
3434         }
3435         for (i = 0; i < card->tst_size - 2; i++) {
3436                 card->soft_tst[i].tste = TSTE_OPC_VAR;
3437                 card->soft_tst[i].vc = NULL;
3438         }
3439
3440         if (dev->phy == NULL) {
3441                 printk("%s: No LT device defined.\n", card->name);
3442                 deinit_card(card);
3443                 return -1;
3444         }
3445         if (dev->phy->ioctl == NULL) {
3446                 printk("%s: LT had no IOCTL function defined.\n", card->name);
3447                 deinit_card(card);
3448                 return -1;
3449         }
3450
3451 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3452         /*
3453          * this is a jhs hack to get around special functionality in the
3454          * phy driver for the atecom hardware; the functionality doesn't
3455          * exist in the linux atm suni driver
3456          *
3457          * it isn't the right way to do things, but as the guy from NIST
3458          * said, talking about their measurement of the fine structure
3459          * constant, "it's good enough for government work."
3460          */
3461         linkrate = 149760000;
3462 #endif
3463
3464         card->link_pcr = (linkrate / 8 / 53);
3465         printk("%s: Linkrate on ATM line : %u bit/s, %u cell/s.\n",
3466                card->name, linkrate, card->link_pcr);
3467
3468 #ifdef ATM_IDT77252_SEND_IDLE
3469         card->utopia_pcr = card->link_pcr;
3470 #else
3471         card->utopia_pcr = (160000000 / 8 / 54);
3472 #endif
3473
3474         rsvdcr = 0;
3475         if (card->utopia_pcr > card->link_pcr)
3476                 rsvdcr = card->utopia_pcr - card->link_pcr;
3477
3478         tmpl = (unsigned long) rsvdcr * ((unsigned long) card->tst_size - 2);
3479         modl = tmpl % (unsigned long)card->utopia_pcr;
3480         tst_entries = (int) (tmpl / (unsigned long)card->utopia_pcr);
3481         if (modl)
3482                 tst_entries++;
3483         card->tst_free -= tst_entries;
3484         fill_tst(card, NULL, tst_entries, TSTE_OPC_NULL);
3485
3486 #ifdef HAVE_EEPROM
3487         idt77252_eeprom_init(card);
3488         printk("%s: EEPROM: %02x:", card->name,
3489                 idt77252_eeprom_read_status(card));
3490
3491         for (i = 0; i < 0x80; i++) {
3492                 printk(" %02x",
3493                 idt77252_eeprom_read_byte(card, i)
3494                 );
3495         }
3496         printk("\n");
3497 #endif /* HAVE_EEPROM */
3498
3499         /*
3500          * XXX: <hack>
3501          */
3502         sprintf(tname, "eth%d", card->index);
3503         tmp = dev_get_by_name(&init_net, tname);        /* jhs: was "tmp = dev_get(tname);" */
3504         if (tmp) {
3505                 memcpy(card->atmdev->esi, tmp->dev_addr, 6);
3506                 dev_put(tmp);
3507                 printk("%s: ESI %pM\n", card->name, card->atmdev->esi);
3508         }
3509         /*
3510          * XXX: </hack>
3511          */
3512
3513         /* Set Maximum Deficit Count for now. */
3514         writel(0xffff, SAR_REG_MDFCT);
3515
3516         set_bit(IDT77252_BIT_INIT, &card->flags);
3517
3518         XPRINTK("%s: IDT77252 ABR SAR initialization complete.\n", card->name);
3519         return 0;
3520 }
3521
3522
3523 /*****************************************************************************/
3524 /*                                                                           */
3525 /* Probing of IDT77252 ABR SAR                                               */
3526 /*                                                                           */
3527 /*****************************************************************************/
3528
3529
3530 static int idt77252_preset(struct idt77252_dev *card)
3531 {
3532         u16 pci_command;
3533
3534 /*****************************************************************/
3535 /*   P C I   C O N F I G U R A T I O N                           */
3536 /*****************************************************************/
3537
3538         XPRINTK("%s: Enable PCI master and memory access for SAR.\n",
3539                 card->name);
3540         if (pci_read_config_word(card->pcidev, PCI_COMMAND, &pci_command)) {
3541                 printk("%s: can't read PCI_COMMAND.\n", card->name);
3542                 deinit_card(card);
3543                 return -1;
3544         }
3545         if (!(pci_command & PCI_COMMAND_IO)) {
3546                 printk("%s: PCI_COMMAND: %04x (???)\n",
3547                        card->name, pci_command);
3548                 deinit_card(card);
3549                 return (-1);
3550         }
3551         pci_command |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
3552         if (pci_write_config_word(card->pcidev, PCI_COMMAND, pci_command)) {
3553                 printk("%s: can't write PCI_COMMAND.\n", card->name);
3554                 deinit_card(card);
3555                 return -1;
3556         }
3557 /*****************************************************************/
3558 /*   G E N E R I C   R E S E T                                   */
3559 /*****************************************************************/
3560
3561         /* Software reset */
3562         writel(SAR_CFG_SWRST, SAR_REG_CFG);
3563         mdelay(1);
3564         writel(0, SAR_REG_CFG);
3565
3566         IPRINTK("%s: Software resetted.\n", card->name);
3567         return 0;
3568 }
3569
3570
3571 static unsigned long probe_sram(struct idt77252_dev *card)
3572 {
3573         u32 data, addr;
3574
3575         writel(0, SAR_REG_DR0);
3576         writel(SAR_CMD_WRITE_SRAM | (0 << 2), SAR_REG_CMD);
3577
3578         for (addr = 0x4000; addr < 0x80000; addr += 0x4000) {
3579                 writel(ATM_POISON, SAR_REG_DR0);
3580                 writel(SAR_CMD_WRITE_SRAM | (addr << 2), SAR_REG_CMD);
3581
3582                 writel(SAR_CMD_READ_SRAM | (0 << 2), SAR_REG_CMD);
3583                 data = readl(SAR_REG_DR0);
3584
3585                 if (data != 0)
3586                         break;
3587         }
3588
3589         return addr * sizeof(u32);
3590 }
3591
3592 static int idt77252_init_one(struct pci_dev *pcidev,
3593                              const struct pci_device_id *id)
3594 {
3595         static struct idt77252_dev **last = &idt77252_chain;
3596         static int index = 0;
3597
3598         unsigned long membase, srambase;
3599         struct idt77252_dev *card;
3600         struct atm_dev *dev;
3601         int i, err;
3602
3603
3604         if ((err = pci_enable_device(pcidev))) {
3605                 printk("idt77252: can't enable PCI device at %s\n", pci_name(pcidev));
3606                 return err;
3607         }
3608
3609         if ((err = dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)))) {
3610                 printk("idt77252: can't enable DMA for PCI device at %s\n", pci_name(pcidev));
3611                 goto err_out_disable_pdev;
3612         }
3613
3614         card = kzalloc(sizeof(struct idt77252_dev), GFP_KERNEL);
3615         if (!card) {
3616                 printk("idt77252-%d: can't allocate private data\n", index);
3617                 err = -ENOMEM;
3618                 goto err_out_disable_pdev;
3619         }
3620         card->revision = pcidev->revision;
3621         card->index = index;
3622         card->pcidev = pcidev;
3623         sprintf(card->name, "idt77252-%d", card->index);
3624
3625         INIT_WORK(&card->tqueue, idt77252_softint);
3626
3627         membase = pci_resource_start(pcidev, 1);
3628         srambase = pci_resource_start(pcidev, 2);
3629
3630         mutex_init(&card->mutex);
3631         spin_lock_init(&card->cmd_lock);
3632         spin_lock_init(&card->tst_lock);
3633
3634         setup_timer(&card->tst_timer, tst_timer, (unsigned long)card);
3635
3636         /* Do the I/O remapping... */
3637         card->membase = ioremap(membase, 1024);
3638         if (!card->membase) {
3639                 printk("%s: can't ioremap() membase\n", card->name);
3640                 err = -EIO;
3641                 goto err_out_free_card;
3642         }
3643
3644         if (idt77252_preset(card)) {
3645                 printk("%s: preset failed\n", card->name);
3646                 err = -EIO;
3647                 goto err_out_iounmap;
3648         }
3649
3650         dev = atm_dev_register("idt77252", &pcidev->dev, &idt77252_ops, -1,
3651                                NULL);
3652         if (!dev) {
3653                 printk("%s: can't register atm device\n", card->name);
3654                 err = -EIO;
3655                 goto err_out_iounmap;
3656         }
3657         dev->dev_data = card;
3658         card->atmdev = dev;
3659
3660 #ifdef  CONFIG_ATM_IDT77252_USE_SUNI
3661         suni_init(dev);
3662         if (!dev->phy) {
3663                 printk("%s: can't init SUNI\n", card->name);
3664                 err = -EIO;
3665                 goto err_out_deinit_card;
3666         }
3667 #endif  /* CONFIG_ATM_IDT77252_USE_SUNI */
3668
3669         card->sramsize = probe_sram(card);
3670
3671         for (i = 0; i < 4; i++) {
3672                 card->fbq[i] = ioremap(srambase | 0x200000 | (i << 18), 4);
3673                 if (!card->fbq[i]) {
3674                         printk("%s: can't ioremap() FBQ%d\n", card->name, i);
3675                         err = -EIO;
3676                         goto err_out_deinit_card;
3677                 }
3678         }
3679
3680         printk("%s: ABR SAR (Rev %c): MEM %08lx SRAM %08lx [%u KB]\n",
3681                card->name, ((card->revision > 1) && (card->revision < 25)) ?
3682                'A' + card->revision - 1 : '?', membase, srambase,
3683                card->sramsize / 1024);
3684
3685         if (init_card(dev)) {
3686                 printk("%s: init_card failed\n", card->name);
3687                 err = -EIO;
3688                 goto err_out_deinit_card;
3689         }
3690
3691         dev->ci_range.vpi_bits = card->vpibits;
3692         dev->ci_range.vci_bits = card->vcibits;
3693         dev->link_rate = card->link_pcr;
3694
3695         if (dev->phy->start)
3696                 dev->phy->start(dev);
3697
3698         if (idt77252_dev_open(card)) {
3699                 printk("%s: dev_open failed\n", card->name);
3700                 err = -EIO;
3701                 goto err_out_stop;
3702         }
3703
3704         *last = card;
3705         last = &card->next;
3706         index++;
3707
3708         return 0;
3709
3710 err_out_stop:
3711         if (dev->phy->stop)
3712                 dev->phy->stop(dev);
3713
3714 err_out_deinit_card:
3715         deinit_card(card);
3716
3717 err_out_iounmap:
3718         iounmap(card->membase);
3719
3720 err_out_free_card:
3721         kfree(card);
3722
3723 err_out_disable_pdev:
3724         pci_disable_device(pcidev);
3725         return err;
3726 }
3727
3728 static const struct pci_device_id idt77252_pci_tbl[] =
3729 {
3730         { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77252), 0 },
3731         { 0, }
3732 };
3733
3734 MODULE_DEVICE_TABLE(pci, idt77252_pci_tbl);
3735
3736 static struct pci_driver idt77252_driver = {
3737         .name           = "idt77252",
3738         .id_table       = idt77252_pci_tbl,
3739         .probe          = idt77252_init_one,
3740 };
3741
3742 static int __init idt77252_init(void)
3743 {
3744         struct sk_buff *skb;
3745
3746         printk("%s: at %p\n", __func__, idt77252_init);
3747
3748         if (sizeof(skb->cb) < sizeof(struct atm_skb_data) +
3749                               sizeof(struct idt77252_skb_prv)) {
3750                 printk(KERN_ERR "%s: skb->cb is too small (%lu < %lu)\n",
3751                        __func__, (unsigned long) sizeof(skb->cb),
3752                        (unsigned long) sizeof(struct atm_skb_data) +
3753                                        sizeof(struct idt77252_skb_prv));
3754                 return -EIO;
3755         }
3756
3757         return pci_register_driver(&idt77252_driver);
3758 }
3759
3760 static void __exit idt77252_exit(void)
3761 {
3762         struct idt77252_dev *card;
3763         struct atm_dev *dev;
3764
3765         pci_unregister_driver(&idt77252_driver);
3766
3767         while (idt77252_chain) {
3768                 card = idt77252_chain;
3769                 dev = card->atmdev;
3770                 idt77252_chain = card->next;
3771
3772                 if (dev->phy->stop)
3773                         dev->phy->stop(dev);
3774                 deinit_card(card);
3775                 pci_disable_device(card->pcidev);
3776                 kfree(card);
3777         }
3778
3779         DIPRINTK("idt77252: finished cleanup-module().\n");
3780 }
3781
3782 module_init(idt77252_init);
3783 module_exit(idt77252_exit);
3784
3785 MODULE_LICENSE("GPL");
3786
3787 module_param(vpibits, uint, 0);
3788 MODULE_PARM_DESC(vpibits, "number of VPI bits supported (0, 1, or 2)");
3789 #ifdef CONFIG_ATM_IDT77252_DEBUG
3790 module_param(debug, ulong, 0644);
3791 MODULE_PARM_DESC(debug,   "debug bitmap, see drivers/atm/idt77252.h");
3792 #endif
3793
3794 MODULE_AUTHOR("Eddie C. Dost <ecd@atecom.com>");
3795 MODULE_DESCRIPTION("IDT77252 ABR SAR Driver");