drivers/edac/edac_mc.c

   1 /*
   2  * edac_mc kernel module
   3  * (C) 2005, 2006 Linux Networx (http://lnxi.com)
   4  * This file may be distributed under the terms of the
   5  * GNU General Public License.
   6  *
   7  * Written by Thayne Harbaugh
   8  * Based on work by Dan Hollis <goemon at anime dot net> and others.
   9  *      http://www.anime.net/~goemon/linux-ecc/
  10  *
  11  * Modified by Dave Peterson and Doug Thompson
  12  *
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/proc_fs.h>
  17 #include <linux/kernel.h>
  18 #include <linux/types.h>
  19 #include <linux/smp.h>
  20 #include <linux/init.h>
  21 #include <linux/sysctl.h>
  22 #include <linux/highmem.h>
  23 #include <linux/timer.h>
  24 #include <linux/slab.h>
  25 #include <linux/jiffies.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/list.h>
  28 #include <linux/ctype.h>
  29 #include <linux/edac.h>
  30 #include <linux/bitops.h>
  31 #include <linux/uaccess.h>
  32 #include <asm/page.h>
  33 #include "edac_mc.h"
  34 #include "edac_module.h"
  35 #include <ras/ras_event.h>
  36
  37 #ifdef CONFIG_EDAC_ATOMIC_SCRUB
  38 #include <asm/edac.h>
  39 #else
  40 #define edac_atomic_scrub(va, size) do { } while (0)
  41 #endif
  42
  43 int edac_op_state = EDAC_OPSTATE_INVAL;
  44 EXPORT_SYMBOL_GPL(edac_op_state);
  45
  46 static int edac_report = EDAC_REPORTING_ENABLED;
  47
  48 /* lock to memory controller's control array */
  49 static DEFINE_MUTEX(mem_ctls_mutex);
  50 static LIST_HEAD(mc_devices);
  51
  52 /*
  53  * Used to lock EDAC MC to just one module, avoiding two drivers e. g.
  54  *      apei/ghes and i7core_edac to be used at the same time.
  55  */
  56 static const char *edac_mc_owner;
  57
  58 static struct bus_type mc_bus[EDAC_MAX_MCS];
  59
  60 int edac_get_report_status(void)
  61 {
  62         return edac_report;
  63 }
  64 EXPORT_SYMBOL_GPL(edac_get_report_status);
  65
  66 void edac_set_report_status(int new)
  67 {
  68         if (new == EDAC_REPORTING_ENABLED ||
  69             new == EDAC_REPORTING_DISABLED ||
  70             new == EDAC_REPORTING_FORCE)
  71                 edac_report = new;
  72 }
  73 EXPORT_SYMBOL_GPL(edac_set_report_status);
  74
  75 static int edac_report_set(const char *str, const struct kernel_param *kp)
  76 {
  77         if (!str)
  78                 return -EINVAL;
  79
  80         if (!strncmp(str, "on", 2))
  81                 edac_report = EDAC_REPORTING_ENABLED;
  82         else if (!strncmp(str, "off", 3))
  83                 edac_report = EDAC_REPORTING_DISABLED;
  84         else if (!strncmp(str, "force", 5))
  85                 edac_report = EDAC_REPORTING_FORCE;
  86
  87         return 0;
  88 }
  89
  90 static int edac_report_get(char *buffer, const struct kernel_param *kp)
  91 {
  92         int ret = 0;
  93
  94         switch (edac_report) {
  95         case EDAC_REPORTING_ENABLED:
  96                 ret = sprintf(buffer, "on");
  97                 break;
  98         case EDAC_REPORTING_DISABLED:
  99                 ret = sprintf(buffer, "off");
 100                 break;
 101         case EDAC_REPORTING_FORCE:
 102                 ret = sprintf(buffer, "force");
 103                 break;
 104         default:
 105                 ret = -EINVAL;
 106                 break;
 107         }
 108
 109         return ret;
 110 }
 111
 112 static const struct kernel_param_ops edac_report_ops = {
 113         .set = edac_report_set,
 114         .get = edac_report_get,
 115 };
 116
 117 module_param_cb(edac_report, &edac_report_ops, &edac_report, 0644);
 118
 119 unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
 120                                  unsigned len)
 121 {
 122         struct mem_ctl_info *mci = dimm->mci;
 123         int i, n, count = 0;
 124         char *p = buf;
 125
 126         for (i = 0; i < mci->n_layers; i++) {
 127                 n = snprintf(p, len, "%s %d ",
 128                               edac_layer_name[mci->layers[i].type],
 129                               dimm->location[i]);
 130                 p += n;
 131                 len -= n;
 132                 count += n;
 133                 if (!len)
 134                         break;
 135         }
 136
 137         return count;
 138 }
 139
 140 #ifdef CONFIG_EDAC_DEBUG
 141
 142 static void edac_mc_dump_channel(struct rank_info *chan)
 143 {
 144         edac_dbg(4, "  channel->chan_idx = %d\n", chan->chan_idx);
 145         edac_dbg(4, "    channel = %p\n", chan);
 146         edac_dbg(4, "    channel->csrow = %p\n", chan->csrow);
 147         edac_dbg(4, "    channel->dimm = %p\n", chan->dimm);
 148 }
 149
 150 static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
 151 {
 152         char location[80];
 153
 154         edac_dimm_info_location(dimm, location, sizeof(location));
 155
 156         edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
 157                  dimm->mci->csbased ? "rank" : "dimm",
 158                  number, location, dimm->csrow, dimm->cschannel);
 159         edac_dbg(4, "  dimm = %p\n", dimm);
 160         edac_dbg(4, "  dimm->label = '%s'\n", dimm->label);
 161         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 162         edac_dbg(4, "  dimm->grain = %d\n", dimm->grain);
 163         edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
 164 }
 165
 166 static void edac_mc_dump_csrow(struct csrow_info *csrow)
 167 {
 168         edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
 169         edac_dbg(4, "  csrow = %p\n", csrow);
 170         edac_dbg(4, "  csrow->first_page = 0x%lx\n", csrow->first_page);
 171         edac_dbg(4, "  csrow->last_page = 0x%lx\n", csrow->last_page);
 172         edac_dbg(4, "  csrow->page_mask = 0x%lx\n", csrow->page_mask);
 173         edac_dbg(4, "  csrow->nr_channels = %d\n", csrow->nr_channels);
 174         edac_dbg(4, "  csrow->channels = %p\n", csrow->channels);
 175         edac_dbg(4, "  csrow->mci = %p\n", csrow->mci);
 176 }
 177
 178 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
 179 {
 180         edac_dbg(3, "\tmci = %p\n", mci);
 181         edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
 182         edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
 183         edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
 184         edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
 185         edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
 186                  mci->nr_csrows, mci->csrows);
 187         edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
 188                  mci->tot_dimms, mci->dimms);
 189         edac_dbg(3, "\tdev = %p\n", mci->pdev);
 190         edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
 191                  mci->mod_name, mci->ctl_name);
 192         edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
 193 }
 194
 195 #endif                          /* CONFIG_EDAC_DEBUG */
 196
 197 const char * const edac_mem_types[] = {
 198         [MEM_EMPTY]     = "Empty",
 199         [MEM_RESERVED]  = "Reserved",
 200         [MEM_UNKNOWN]   = "Unknown",
 201         [MEM_FPM]       = "FPM",
 202         [MEM_EDO]       = "EDO",
 203         [MEM_BEDO]      = "BEDO",
 204         [MEM_SDR]       = "Unbuffered-SDR",
 205         [MEM_RDR]       = "Registered-SDR",
 206         [MEM_DDR]       = "Unbuffered-DDR",
 207         [MEM_RDDR]      = "Registered-DDR",
 208         [MEM_RMBS]      = "RMBS",
 209         [MEM_DDR2]      = "Unbuffered-DDR2",
 210         [MEM_FB_DDR2]   = "FullyBuffered-DDR2",
 211         [MEM_RDDR2]     = "Registered-DDR2",
 212         [MEM_XDR]       = "XDR",
 213         [MEM_DDR3]      = "Unbuffered-DDR3",
 214         [MEM_RDDR3]     = "Registered-DDR3",
 215         [MEM_LRDDR3]    = "Load-Reduced-DDR3-RAM",
 216         [MEM_DDR4]      = "Unbuffered-DDR4",
 217         [MEM_RDDR4]     = "Registered-DDR4",
 218         [MEM_LRDDR4]    = "Load-Reduced-DDR4-RAM",
 219         [MEM_NVDIMM]    = "Non-volatile-RAM",
 220 };
 221 EXPORT_SYMBOL_GPL(edac_mem_types);
 222
 223 /**
 224  * edac_align_ptr - Prepares the pointer offsets for a single-shot allocation
 225  * @p:          pointer to a pointer with the memory offset to be used. At
 226  *              return, this will be incremented to point to the next offset
 227  * @size:       Size of the data structure to be reserved
 228  * @n_elems:    Number of elements that should be reserved
 229  *
 230  * If 'size' is a constant, the compiler will optimize this whole function
 231  * down to either a no-op or the addition of a constant to the value of '*p'.
 232  *
 233  * The 'p' pointer is absolutely needed to keep the proper advancing
 234  * further in memory to the proper offsets when allocating the struct along
 235  * with its embedded structs, as edac_device_alloc_ctl_info() does it
 236  * above, for example.
 237  *
 238  * At return, the pointer 'p' will be incremented to be used on a next call
 239  * to this function.
 240  */
 241 void *edac_align_ptr(void **p, unsigned size, int n_elems)
 242 {
 243         unsigned align, r;
 244         void *ptr = *p;
 245
 246         *p += size * n_elems;
 247
 248         /*
 249          * 'p' can possibly be an unaligned item X such that sizeof(X) is
 250          * 'size'.  Adjust 'p' so that its alignment is at least as
 251          * stringent as what the compiler would provide for X and return
 252          * the aligned result.
 253          * Here we assume that the alignment of a "long long" is the most
 254          * stringent alignment that the compiler will ever provide by default.
 255          * As far as I know, this is a reasonable assumption.
 256          */
 257         if (size > sizeof(long))
 258                 align = sizeof(long long);
 259         else if (size > sizeof(int))
 260                 align = sizeof(long);
 261         else if (size > sizeof(short))
 262                 align = sizeof(int);
 263         else if (size > sizeof(char))
 264                 align = sizeof(short);
 265         else
 266                 return (char *)ptr;
 267
 268         r = (unsigned long)ptr % align;
 269
 270         if (r == 0)
 271                 return (char *)ptr;
 272
 273         *p += align - r;
 274
 275         return (void *)(((unsigned long)ptr) + align - r);
 276 }
 277
 278 static void _edac_mc_free(struct mem_ctl_info *mci)
 279 {
 280         int i, chn, row;
 281         struct csrow_info *csr;
 282         const unsigned int tot_dimms = mci->tot_dimms;
 283         const unsigned int tot_channels = mci->num_cschannel;
 284         const unsigned int tot_csrows = mci->nr_csrows;
 285
 286         if (mci->dimms) {
 287                 for (i = 0; i < tot_dimms; i++)
 288                         kfree(mci->dimms[i]);
 289                 kfree(mci->dimms);
 290         }
 291         if (mci->csrows) {
 292                 for (row = 0; row < tot_csrows; row++) {
 293                         csr = mci->csrows[row];
 294                         if (csr) {
 295                                 if (csr->channels) {
 296                                         for (chn = 0; chn < tot_channels; chn++)
 297                                                 kfree(csr->channels[chn]);
 298                                         kfree(csr->channels);
 299                                 }
 300                                 kfree(csr);
 301                         }
 302                 }
 303                 kfree(mci->csrows);
 304         }
 305         kfree(mci);
 306 }
 307
 308 struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
 309                                    unsigned n_layers,
 310                                    struct edac_mc_layer *layers,
 311                                    unsigned sz_pvt)
 312 {
 313         struct mem_ctl_info *mci;
 314         struct edac_mc_layer *layer;
 315         struct csrow_info *csr;
 316         struct rank_info *chan;
 317         struct dimm_info *dimm;
 318         u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
 319         unsigned pos[EDAC_MAX_LAYERS];
 320         unsigned size, tot_dimms = 1, count = 1;
 321         unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
 322         void *pvt, *p, *ptr = NULL;
 323         int i, j, row, chn, n, len, off;
 324         bool per_rank = false;
 325
 326         BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
 327         /*
 328          * Calculate the total amount of dimms and csrows/cschannels while
 329          * in the old API emulation mode
 330          */
 331         for (i = 0; i < n_layers; i++) {
 332                 tot_dimms *= layers[i].size;
 333                 if (layers[i].is_virt_csrow)
 334                         tot_csrows *= layers[i].size;
 335                 else
 336                         tot_channels *= layers[i].size;
 337
 338                 if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT)
 339                         per_rank = true;
 340         }
 341
 342         /* Figure out the offsets of the various items from the start of an mc
 343          * structure.  We want the alignment of each item to be at least as
 344          * stringent as what the compiler would provide if we could simply
 345          * hardcode everything into a single struct.
 346          */
 347         mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
 348         layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
 349         for (i = 0; i < n_layers; i++) {
 350                 count *= layers[i].size;
 351                 edac_dbg(4, "errcount layer %d size %d\n", i, count);
 352                 ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
 353                 ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
 354                 tot_errcount += 2 * count;
 355         }
 356
 357         edac_dbg(4, "allocating %d error counters\n", tot_errcount);
 358         pvt = edac_align_ptr(&ptr, sz_pvt, 1);
 359         size = ((unsigned long)pvt) + sz_pvt;
 360
 361         edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
 362                  size,
 363                  tot_dimms,
 364                  per_rank ? "ranks" : "dimms",
 365                  tot_csrows * tot_channels);
 366
 367         mci = kzalloc(size, GFP_KERNEL);
 368         if (mci == NULL)
 369                 return NULL;
 370
 371         /* Adjust pointers so they point within the memory we just allocated
 372          * rather than an imaginary chunk of memory located at address 0.
 373          */
 374         layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
 375         for (i = 0; i < n_layers; i++) {
 376                 mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
 377                 mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
 378         }
 379         pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
 380
 381         /* setup index and various internal pointers */
 382         mci->mc_idx = mc_num;
 383         mci->tot_dimms = tot_dimms;
 384         mci->pvt_info = pvt;
 385         mci->n_layers = n_layers;
 386         mci->layers = layer;
 387         memcpy(mci->layers, layers, sizeof(*layer) * n_layers);
 388         mci->nr_csrows = tot_csrows;
 389         mci->num_cschannel = tot_channels;
 390         mci->csbased = per_rank;
 391
 392         /*
 393          * Alocate and fill the csrow/channels structs
 394          */
 395         mci->csrows = kcalloc(tot_csrows, sizeof(*mci->csrows), GFP_KERNEL);
 396         if (!mci->csrows)
 397                 goto error;
 398         for (row = 0; row < tot_csrows; row++) {
 399                 csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
 400                 if (!csr)
 401                         goto error;
 402                 mci->csrows[row] = csr;
 403                 csr->csrow_idx = row;
 404                 csr->mci = mci;
 405                 csr->nr_channels = tot_channels;
 406                 csr->channels = kcalloc(tot_channels, sizeof(*csr->channels),
 407                                         GFP_KERNEL);
 408                 if (!csr->channels)
 409                         goto error;
 410
 411                 for (chn = 0; chn < tot_channels; chn++) {
 412                         chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
 413                         if (!chan)
 414                                 goto error;
 415                         csr->channels[chn] = chan;
 416                         chan->chan_idx = chn;
 417                         chan->csrow = csr;
 418                 }
 419         }
 420
 421         /*
 422          * Allocate and fill the dimm structs
 423          */
 424         mci->dimms  = kcalloc(tot_dimms, sizeof(*mci->dimms), GFP_KERNEL);
 425         if (!mci->dimms)
 426                 goto error;
 427
 428         memset(&pos, 0, sizeof(pos));
 429         row = 0;
 430         chn = 0;
 431         for (i = 0; i < tot_dimms; i++) {
 432                 chan = mci->csrows[row]->channels[chn];
 433                 off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
 434                 if (off < 0 || off >= tot_dimms) {
 435                         edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
 436                         goto error;
 437                 }
 438
 439                 dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
 440                 if (!dimm)
 441                         goto error;
 442                 mci->dimms[off] = dimm;
 443                 dimm->mci = mci;
 444
 445                 /*
 446                  * Copy DIMM location and initialize it.
 447                  */
 448                 len = sizeof(dimm->label);
 449                 p = dimm->label;
 450                 n = snprintf(p, len, "mc#%u", mc_num);
 451                 p += n;
 452                 len -= n;
 453                 for (j = 0; j < n_layers; j++) {
 454                         n = snprintf(p, len, "%s#%u",
 455                                      edac_layer_name[layers[j].type],
 456                                      pos[j]);
 457                         p += n;
 458                         len -= n;
 459                         dimm->location[j] = pos[j];
 460
 461                         if (len <= 0)
 462                                 break;
 463                 }
 464
 465                 /* Link it to the csrows old API data */
 466                 chan->dimm = dimm;
 467                 dimm->csrow = row;
 468                 dimm->cschannel = chn;
 469
 470                 /* Increment csrow location */
 471                 if (layers[0].is_virt_csrow) {
 472                         chn++;
 473                         if (chn == tot_channels) {
 474                                 chn = 0;
 475                                 row++;
 476                         }
 477                 } else {
 478                         row++;
 479                         if (row == tot_csrows) {
 480                                 row = 0;
 481                                 chn++;
 482                         }
 483                 }
 484
 485                 /* Increment dimm location */
 486                 for (j = n_layers - 1; j >= 0; j--) {
 487                         pos[j]++;
 488                         if (pos[j] < layers[j].size)
 489                                 break;
 490                         pos[j] = 0;
 491                 }
 492         }
 493
 494         mci->op_state = OP_ALLOC;
 495
 496         return mci;
 497
 498 error:
 499         _edac_mc_free(mci);
 500
 501         return NULL;
 502 }
 503 EXPORT_SYMBOL_GPL(edac_mc_alloc);
 504
 505 void edac_mc_free(struct mem_ctl_info *mci)
 506 {
 507         edac_dbg(1, "\n");
 508
 509         /* If we're not yet registered with sysfs free only what was allocated
 510          * in edac_mc_alloc().
 511          */
 512         if (!device_is_registered(&mci->dev)) {
 513                 _edac_mc_free(mci);
 514                 return;
 515         }
 516
 517         /* the mci instance is freed here, when the sysfs object is dropped */
 518         edac_unregister_sysfs(mci);
 519 }
 520 EXPORT_SYMBOL_GPL(edac_mc_free);
 521
 522 bool edac_has_mcs(void)
 523 {
 524         bool ret;
 525
 526         mutex_lock(&mem_ctls_mutex);
 527
 528         ret = list_empty(&mc_devices);
 529
 530         mutex_unlock(&mem_ctls_mutex);
 531
 532         return !ret;
 533 }
 534 EXPORT_SYMBOL_GPL(edac_has_mcs);
 535
 536 /* Caller must hold mem_ctls_mutex */
 537 static struct mem_ctl_info *__find_mci_by_dev(struct device *dev)
 538 {
 539         struct mem_ctl_info *mci;
 540         struct list_head *item;
 541
 542         edac_dbg(3, "\n");
 543
 544         list_for_each(item, &mc_devices) {
 545                 mci = list_entry(item, struct mem_ctl_info, link);
 546
 547                 if (mci->pdev == dev)
 548                         return mci;
 549         }
 550
 551         return NULL;
 552 }
 553
 554 /**
 555  * find_mci_by_dev
 556  *
 557  *      scan list of controllers looking for the one that manages
 558  *      the 'dev' device
 559  * @dev: pointer to a struct device related with the MCI
 560  */
 561 struct mem_ctl_info *find_mci_by_dev(struct device *dev)
 562 {
 563         struct mem_ctl_info *ret;
 564
 565         mutex_lock(&mem_ctls_mutex);
 566         ret = __find_mci_by_dev(dev);
 567         mutex_unlock(&mem_ctls_mutex);
 568
 569         return ret;
 570 }
 571 EXPORT_SYMBOL_GPL(find_mci_by_dev);
 572
 573 /*
 574  * edac_mc_workq_function
 575  *      performs the operation scheduled by a workq request
 576  */
 577 static void edac_mc_workq_function(struct work_struct *work_req)
 578 {
 579         struct delayed_work *d_work = to_delayed_work(work_req);
 580         struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
 581
 582         mutex_lock(&mem_ctls_mutex);
 583
 584         if (mci->op_state != OP_RUNNING_POLL) {
 585                 mutex_unlock(&mem_ctls_mutex);
 586                 return;
 587         }
 588
 589         if (edac_op_state == EDAC_OPSTATE_POLL)
 590                 mci->edac_check(mci);
 591
 592         mutex_unlock(&mem_ctls_mutex);
 593
 594         /* Queue ourselves again. */
 595         edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 596 }
 597
 598 /*
 599  * edac_mc_reset_delay_period(unsigned long value)
 600  *
 601  *      user space has updated our poll period value, need to
 602  *      reset our workq delays
 603  */
 604 void edac_mc_reset_delay_period(unsigned long value)
 605 {
 606         struct mem_ctl_info *mci;
 607         struct list_head *item;
 608
 609         mutex_lock(&mem_ctls_mutex);
 610
 611         list_for_each(item, &mc_devices) {
 612                 mci = list_entry(item, struct mem_ctl_info, link);
 613
 614                 if (mci->op_state == OP_RUNNING_POLL)
 615                         edac_mod_work(&mci->work, value);
 616         }
 617         mutex_unlock(&mem_ctls_mutex);
 618 }
 619
 620
 621
 622 /* Return 0 on success, 1 on failure.
 623  * Before calling this function, caller must
 624  * assign a unique value to mci->mc_idx.
 625  *
 626  *      locking model:
 627  *
 628  *              called with the mem_ctls_mutex lock held
 629  */
 630 static int add_mc_to_global_list(struct mem_ctl_info *mci)
 631 {
 632         struct list_head *item, *insert_before;
 633         struct mem_ctl_info *p;
 634
 635         insert_before = &mc_devices;
 636
 637         p = __find_mci_by_dev(mci->pdev);
 638         if (unlikely(p != NULL))
 639                 goto fail0;
 640
 641         list_for_each(item, &mc_devices) {
 642                 p = list_entry(item, struct mem_ctl_info, link);
 643
 644                 if (p->mc_idx >= mci->mc_idx) {
 645                         if (unlikely(p->mc_idx == mci->mc_idx))
 646                                 goto fail1;
 647
 648                         insert_before = item;
 649                         break;
 650                 }
 651         }
 652
 653         list_add_tail_rcu(&mci->link, insert_before);
 654         return 0;
 655
 656 fail0:
 657         edac_printk(KERN_WARNING, EDAC_MC,
 658                 "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
 659                 edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
 660         return 1;
 661
 662 fail1:
 663         edac_printk(KERN_WARNING, EDAC_MC,
 664                 "bug in low-level driver: attempt to assign\n"
 665                 "    duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
 666         return 1;
 667 }
 668
 669 static int del_mc_from_global_list(struct mem_ctl_info *mci)
 670 {
 671         list_del_rcu(&mci->link);
 672
 673         /* these are for safe removal of devices from global list while
 674          * NMI handlers may be traversing list
 675          */
 676         synchronize_rcu();
 677         INIT_LIST_HEAD(&mci->link);
 678
 679         return list_empty(&mc_devices);
 680 }
 681
 682 struct mem_ctl_info *edac_mc_find(int idx)
 683 {
 684         struct mem_ctl_info *mci;
 685         struct list_head *item;
 686
 687         mutex_lock(&mem_ctls_mutex);
 688
 689         list_for_each(item, &mc_devices) {
 690                 mci = list_entry(item, struct mem_ctl_info, link);
 691                 if (mci->mc_idx == idx)
 692                         goto unlock;
 693         }
 694
 695         mci = NULL;
 696 unlock:
 697         mutex_unlock(&mem_ctls_mutex);
 698         return mci;
 699 }
 700 EXPORT_SYMBOL(edac_mc_find);
 701
 702 const char *edac_get_owner(void)
 703 {
 704         return edac_mc_owner;
 705 }
 706 EXPORT_SYMBOL_GPL(edac_get_owner);
 707
 708 /* FIXME - should a warning be printed if no error detection? correction? */
 709 int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
 710                                const struct attribute_group **groups)
 711 {
 712         int ret = -EINVAL;
 713         edac_dbg(0, "\n");
 714
 715         if (mci->mc_idx >= EDAC_MAX_MCS) {
 716                 pr_warn_once("Too many memory controllers: %d\n", mci->mc_idx);
 717                 return -ENODEV;
 718         }
 719
 720 #ifdef CONFIG_EDAC_DEBUG
 721         if (edac_debug_level >= 3)
 722                 edac_mc_dump_mci(mci);
 723
 724         if (edac_debug_level >= 4) {
 725                 int i;
 726
 727                 for (i = 0; i < mci->nr_csrows; i++) {
 728                         struct csrow_info *csrow = mci->csrows[i];
 729                         u32 nr_pages = 0;
 730                         int j;
 731
 732                         for (j = 0; j < csrow->nr_channels; j++)
 733                                 nr_pages += csrow->channels[j]->dimm->nr_pages;
 734                         if (!nr_pages)
 735                                 continue;
 736                         edac_mc_dump_csrow(csrow);
 737                         for (j = 0; j < csrow->nr_channels; j++)
 738                                 if (csrow->channels[j]->dimm->nr_pages)
 739                                         edac_mc_dump_channel(csrow->channels[j]);
 740                 }
 741                 for (i = 0; i < mci->tot_dimms; i++)
 742                         if (mci->dimms[i]->nr_pages)
 743                                 edac_mc_dump_dimm(mci->dimms[i], i);
 744         }
 745 #endif
 746         mutex_lock(&mem_ctls_mutex);
 747
 748         if (edac_mc_owner && edac_mc_owner != mci->mod_name) {
 749                 ret = -EPERM;
 750                 goto fail0;
 751         }
 752
 753         if (add_mc_to_global_list(mci))
 754                 goto fail0;
 755
 756         /* set load time so that error rate can be tracked */
 757         mci->start_time = jiffies;
 758
 759         mci->bus = &mc_bus[mci->mc_idx];
 760
 761         if (edac_create_sysfs_mci_device(mci, groups)) {
 762                 edac_mc_printk(mci, KERN_WARNING,
 763                         "failed to create sysfs device\n");
 764                 goto fail1;
 765         }
 766
 767         if (mci->edac_check) {
 768                 mci->op_state = OP_RUNNING_POLL;
 769
 770                 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
 771                 edac_queue_work(&mci->work, msecs_to_jiffies(edac_mc_get_poll_msec()));
 772
 773         } else {
 774                 mci->op_state = OP_RUNNING_INTERRUPT;
 775         }
 776
 777         /* Report action taken */
 778         edac_mc_printk(mci, KERN_INFO,
 779                 "Giving out device to module %s controller %s: DEV %s (%s)\n",
 780                 mci->mod_name, mci->ctl_name, mci->dev_name,
 781                 edac_op_state_to_string(mci->op_state));
 782
 783         edac_mc_owner = mci->mod_name;
 784
 785         mutex_unlock(&mem_ctls_mutex);
 786         return 0;
 787
 788 fail1:
 789         del_mc_from_global_list(mci);
 790
 791 fail0:
 792         mutex_unlock(&mem_ctls_mutex);
 793         return ret;
 794 }
 795 EXPORT_SYMBOL_GPL(edac_mc_add_mc_with_groups);
 796
 797 struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
 798 {
 799         struct mem_ctl_info *mci;
 800
 801         edac_dbg(0, "\n");
 802
 803         mutex_lock(&mem_ctls_mutex);
 804
 805         /* find the requested mci struct in the global list */
 806         mci = __find_mci_by_dev(dev);
 807         if (mci == NULL) {
 808                 mutex_unlock(&mem_ctls_mutex);
 809                 return NULL;
 810         }
 811
 812         /* mark MCI offline: */
 813         mci->op_state = OP_OFFLINE;
 814
 815         if (del_mc_from_global_list(mci))
 816                 edac_mc_owner = NULL;
 817
 818         mutex_unlock(&mem_ctls_mutex);
 819
 820         if (mci->edac_check)
 821                 edac_stop_work(&mci->work);
 822
 823         /* remove from sysfs */
 824         edac_remove_sysfs_mci_device(mci);
 825
 826         edac_printk(KERN_INFO, EDAC_MC,
 827                 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
 828                 mci->mod_name, mci->ctl_name, edac_dev_name(mci));
 829
 830         return mci;
 831 }
 832 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
 833
 834 static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
 835                                 u32 size)
 836 {
 837         struct page *pg;
 838         void *virt_addr;
 839         unsigned long flags = 0;
 840
 841         edac_dbg(3, "\n");
 842
 843         /* ECC error page was not in our memory. Ignore it. */
 844         if (!pfn_valid(page))
 845                 return;
 846
 847         /* Find the actual page structure then map it and fix */
 848         pg = pfn_to_page(page);
 849
 850         if (PageHighMem(pg))
 851                 local_irq_save(flags);
 852
 853         virt_addr = kmap_atomic(pg);
 854
 855         /* Perform architecture specific atomic scrub operation */
 856         edac_atomic_scrub(virt_addr + offset, size);
 857
 858         /* Unmap and complete */
 859         kunmap_atomic(virt_addr);
 860
 861         if (PageHighMem(pg))
 862                 local_irq_restore(flags);
 863 }
 864
 865 /* FIXME - should return -1 */
 866 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
 867 {
 868         struct csrow_info **csrows = mci->csrows;
 869         int row, i, j, n;
 870
 871         edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
 872         row = -1;
 873
 874         for (i = 0; i < mci->nr_csrows; i++) {
 875                 struct csrow_info *csrow = csrows[i];
 876                 n = 0;
 877                 for (j = 0; j < csrow->nr_channels; j++) {
 878                         struct dimm_info *dimm = csrow->channels[j]->dimm;
 879                         n += dimm->nr_pages;
 880                 }
 881                 if (n == 0)
 882                         continue;
 883
 884                 edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
 885                          mci->mc_idx,
 886                          csrow->first_page, page, csrow->last_page,
 887                          csrow->page_mask);
 888
 889                 if ((page >= csrow->first_page) &&
 890                     (page <= csrow->last_page) &&
 891                     ((page & csrow->page_mask) ==
 892                      (csrow->first_page & csrow->page_mask))) {
 893                         row = i;
 894                         break;
 895                 }
 896         }
 897
 898         if (row == -1)
 899                 edac_mc_printk(mci, KERN_ERR,
 900                         "could not look up page error address %lx\n",
 901                         (unsigned long)page);
 902
 903         return row;
 904 }
 905 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
 906
 907 const char *edac_layer_name[] = {
 908         [EDAC_MC_LAYER_BRANCH] = "branch",
 909         [EDAC_MC_LAYER_CHANNEL] = "channel",
 910         [EDAC_MC_LAYER_SLOT] = "slot",
 911         [EDAC_MC_LAYER_CHIP_SELECT] = "csrow",
 912         [EDAC_MC_LAYER_ALL_MEM] = "memory",
 913 };
 914 EXPORT_SYMBOL_GPL(edac_layer_name);
 915
 916 static void edac_inc_ce_error(struct mem_ctl_info *mci,
 917                               bool enable_per_layer_report,
 918                               const int pos[EDAC_MAX_LAYERS],
 919                               const u16 count)
 920 {
 921         int i, index = 0;
 922
 923         mci->ce_mc += count;
 924
 925         if (!enable_per_layer_report) {
 926                 mci->ce_noinfo_count += count;
 927                 return;
 928         }
 929
 930         for (i = 0; i < mci->n_layers; i++) {
 931                 if (pos[i] < 0)
 932                         break;
 933                 index += pos[i];
 934                 mci->ce_per_layer[i][index] += count;
 935
 936                 if (i < mci->n_layers - 1)
 937                         index *= mci->layers[i + 1].size;
 938         }
 939 }
 940
 941 static void edac_inc_ue_error(struct mem_ctl_info *mci,
 942                                     bool enable_per_layer_report,
 943                                     const int pos[EDAC_MAX_LAYERS],
 944                                     const u16 count)
 945 {
 946         int i, index = 0;
 947
 948         mci->ue_mc += count;
 949
 950         if (!enable_per_layer_report) {
 951                 mci->ue_noinfo_count += count;
 952                 return;
 953         }
 954
 955         for (i = 0; i < mci->n_layers; i++) {
 956                 if (pos[i] < 0)
 957                         break;
 958                 index += pos[i];
 959                 mci->ue_per_layer[i][index] += count;
 960
 961                 if (i < mci->n_layers - 1)
 962                         index *= mci->layers[i + 1].size;
 963         }
 964 }
 965
 966 static void edac_ce_error(struct mem_ctl_info *mci,
 967                           const u16 error_count,
 968                           const int pos[EDAC_MAX_LAYERS],
 969                           const char *msg,
 970                           const char *location,
 971                           const char *label,
 972                           const char *detail,
 973                           const char *other_detail,
 974                           const bool enable_per_layer_report,
 975                           const unsigned long page_frame_number,
 976                           const unsigned long offset_in_page,
 977                           long grain)
 978 {
 979         unsigned long remapped_page;
 980         char *msg_aux = "";
 981
 982         if (*msg)
 983                 msg_aux = " ";
 984
 985         if (edac_mc_get_log_ce()) {
 986                 if (other_detail && *other_detail)
 987                         edac_mc_printk(mci, KERN_WARNING,
 988                                        "%d CE %s%son %s (%s %s - %s)\n",
 989                                        error_count, msg, msg_aux, label,
 990                                        location, detail, other_detail);
 991                 else
 992                         edac_mc_printk(mci, KERN_WARNING,
 993                                        "%d CE %s%son %s (%s %s)\n",
 994                                        error_count, msg, msg_aux, label,
 995                                        location, detail);
 996         }
 997         edac_inc_ce_error(mci, enable_per_layer_report, pos, error_count);
 998
 999         if (mci->scrub_mode == SCRUB_SW_SRC) {
1000                 /*
1001                         * Some memory controllers (called MCs below) can remap
1002                         * memory so that it is still available at a different
1003                         * address when PCI devices map into memory.
1004                         * MC's that can't do this, lose the memory where PCI
1005                         * devices are mapped. This mapping is MC-dependent
1006                         * and so we call back into the MC driver for it to
1007                         * map the MC page to a physical (CPU) page which can
1008                         * then be mapped to a virtual page - which can then
1009                         * be scrubbed.
1010                         */
1011                 remapped_page = mci->ctl_page_to_phys ?
1012                         mci->ctl_page_to_phys(mci, page_frame_number) :
1013                         page_frame_number;
1014
1015                 edac_mc_scrub_block(remapped_page,
1016                                         offset_in_page, grain);
1017         }
1018 }
1019
1020 static void edac_ue_error(struct mem_ctl_info *mci,
1021                           const u16 error_count,
1022                           const int pos[EDAC_MAX_LAYERS],
1023                           const char *msg,
1024                           const char *location,
1025                           const char *label,
1026                           const char *detail,
1027                           const char *other_detail,
1028                           const bool enable_per_layer_report)
1029 {
1030         char *msg_aux = "";
1031
1032         if (*msg)
1033                 msg_aux = " ";
1034
1035         if (edac_mc_get_log_ue()) {
1036                 if (other_detail && *other_detail)
1037                         edac_mc_printk(mci, KERN_WARNING,
1038                                        "%d UE %s%son %s (%s %s - %s)\n",
1039                                        error_count, msg, msg_aux, label,
1040                                        location, detail, other_detail);
1041                 else
1042                         edac_mc_printk(mci, KERN_WARNING,
1043                                        "%d UE %s%son %s (%s %s)\n",
1044                                        error_count, msg, msg_aux, label,
1045                                        location, detail);
1046         }
1047
1048         if (edac_mc_get_panic_on_ue()) {
1049                 if (other_detail && *other_detail)
1050                         panic("UE %s%son %s (%s%s - %s)\n",
1051                               msg, msg_aux, label, location, detail, other_detail);
1052                 else
1053                         panic("UE %s%son %s (%s%s)\n",
1054                               msg, msg_aux, label, location, detail);
1055         }
1056
1057         edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count);
1058 }
1059
1060 void edac_raw_mc_handle_error(const enum hw_event_mc_err_type type,
1061                               struct mem_ctl_info *mci,
1062                               struct edac_raw_error_desc *e)
1063 {
1064         char detail[80];
1065         int pos[EDAC_MAX_LAYERS] = { e->top_layer, e->mid_layer, e->low_layer };
1066
1067         /* Memory type dependent details about the error */
1068         if (type == HW_EVENT_ERR_CORRECTED) {
1069                 snprintf(detail, sizeof(detail),
1070                         "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
1071                         e->page_frame_number, e->offset_in_page,
1072                         e->grain, e->syndrome);
1073                 edac_ce_error(mci, e->error_count, pos, e->msg, e->location, e->label,
1074                               detail, e->other_detail, e->enable_per_layer_report,
1075                               e->page_frame_number, e->offset_in_page, e->grain);
1076         } else {
1077                 snprintf(detail, sizeof(detail),
1078                         "page:0x%lx offset:0x%lx grain:%ld",
1079                         e->page_frame_number, e->offset_in_page, e->grain);
1080
1081                 edac_ue_error(mci, e->error_count, pos, e->msg, e->location, e->label,
1082                               detail, e->other_detail, e->enable_per_layer_report);
1083         }
1084
1085
1086 }
1087 EXPORT_SYMBOL_GPL(edac_raw_mc_handle_error);
1088
1089 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
1090                           struct mem_ctl_info *mci,
1091                           const u16 error_count,
1092                           const unsigned long page_frame_number,
1093                           const unsigned long offset_in_page,
1094                           const unsigned long syndrome,
1095                           const int top_layer,
1096                           const int mid_layer,
1097                           const int low_layer,
1098                           const char *msg,
1099                           const char *other_detail)
1100 {
1101         char *p;
1102         int row = -1, chan = -1;
1103         int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
1104         int i, n_labels = 0;
1105         u8 grain_bits;
1106         struct edac_raw_error_desc *e = &mci->error_desc;
1107
1108         edac_dbg(3, "MC%d\n", mci->mc_idx);
1109
1110         /* Fills the error report buffer */
1111         memset(e, 0, sizeof (*e));
1112         e->error_count = error_count;
1113         e->top_layer = top_layer;
1114         e->mid_layer = mid_layer;
1115         e->low_layer = low_layer;
1116         e->page_frame_number = page_frame_number;
1117         e->offset_in_page = offset_in_page;
1118         e->syndrome = syndrome;
1119         e->msg = msg;
1120         e->other_detail = other_detail;
1121
1122         /*
1123          * Check if the event report is consistent and if the memory
1124          * location is known. If it is known, enable_per_layer_report will be
1125          * true, the DIMM(s) label info will be filled and the per-layer
1126          * error counters will be incremented.
1127          */
1128         for (i = 0; i < mci->n_layers; i++) {
1129                 if (pos[i] >= (int)mci->layers[i].size) {
1130
1131                         edac_mc_printk(mci, KERN_ERR,
1132                                        "INTERNAL ERROR: %s value is out of range (%d >= %d)\n",
1133                                        edac_layer_name[mci->layers[i].type],
1134                                        pos[i], mci->layers[i].size);
1135                         /*
1136                          * Instead of just returning it, let's use what's
1137                          * known about the error. The increment routines and
1138                          * the DIMM filter logic will do the right thing by
1139                          * pointing the likely damaged DIMMs.
1140                          */
1141                         pos[i] = -1;
1142                 }
1143                 if (pos[i] >= 0)
1144                         e->enable_per_layer_report = true;
1145         }
1146
1147         /*
1148          * Get the dimm label/grain that applies to the match criteria.
1149          * As the error algorithm may not be able to point to just one memory
1150          * stick, the logic here will get all possible labels that could
1151          * pottentially be affected by the error.
1152          * On FB-DIMM memory controllers, for uncorrected errors, it is common
1153          * to have only the MC channel and the MC dimm (also called "branch")
1154          * but the channel is not known, as the memory is arranged in pairs,
1155          * where each memory belongs to a separate channel within the same
1156          * branch.
1157          */
1158         p = e->label;
1159         *p = '\0';
1160
1161         for (i = 0; i < mci->tot_dimms; i++) {
1162                 struct dimm_info *dimm = mci->dimms[i];
1163
1164                 if (top_layer >= 0 && top_layer != dimm->location[0])
1165                         continue;
1166                 if (mid_layer >= 0 && mid_layer != dimm->location[1])
1167                         continue;
1168                 if (low_layer >= 0 && low_layer != dimm->location[2])
1169                         continue;
1170
1171                 /* get the max grain, over the error match range */
1172                 if (dimm->grain > e->grain)
1173                         e->grain = dimm->grain;
1174
1175                 /*
1176                  * If the error is memory-controller wide, there's no need to
1177                  * seek for the affected DIMMs because the whole
1178                  * channel/memory controller/...  may be affected.
1179                  * Also, don't show errors for empty DIMM slots.
1180                  */
1181                 if (e->enable_per_layer_report && dimm->nr_pages) {
1182                         if (n_labels >= EDAC_MAX_LABELS) {
1183                                 e->enable_per_layer_report = false;
1184                                 break;
1185                         }
1186                         n_labels++;
1187                         if (p != e->label) {
1188                                 strcpy(p, OTHER_LABEL);
1189                                 p += strlen(OTHER_LABEL);
1190                         }
1191                         strcpy(p, dimm->label);
1192                         p += strlen(p);
1193                         *p = '\0';
1194
1195                         /*
1196                          * get csrow/channel of the DIMM, in order to allow
1197                          * incrementing the compat API counters
1198                          */
1199                         edac_dbg(4, "%s csrows map: (%d,%d)\n",
1200                                  mci->csbased ? "rank" : "dimm",
1201                                  dimm->csrow, dimm->cschannel);
1202                         if (row == -1)
1203                                 row = dimm->csrow;
1204                         else if (row >= 0 && row != dimm->csrow)
1205                                 row = -2;
1206
1207                         if (chan == -1)
1208                                 chan = dimm->cschannel;
1209                         else if (chan >= 0 && chan != dimm->cschannel)
1210                                 chan = -2;
1211                 }
1212         }
1213
1214         if (!e->enable_per_layer_report) {
1215                 strcpy(e->label, "any memory");
1216         } else {
1217                 edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
1218                 if (p == e->label)
1219                         strcpy(e->label, "unknown memory");
1220                 if (type == HW_EVENT_ERR_CORRECTED) {
1221                         if (row >= 0) {
1222                                 mci->csrows[row]->ce_count += error_count;
1223                                 if (chan >= 0)
1224                                         mci->csrows[row]->channels[chan]->ce_count += error_count;
1225                         }
1226                 } else
1227                         if (row >= 0)
1228                                 mci->csrows[row]->ue_count += error_count;
1229         }
1230
1231         /* Fill the RAM location data */
1232         p = e->location;
1233
1234         for (i = 0; i < mci->n_layers; i++) {
1235                 if (pos[i] < 0)
1236                         continue;
1237
1238                 p += sprintf(p, "%s:%d ",
1239                              edac_layer_name[mci->layers[i].type],
1240                              pos[i]);
1241         }
1242         if (p > e->location)
1243                 *(p - 1) = '\0';
1244
1245         /* Sanity-check driver-supplied grain value. */
1246         if (WARN_ON_ONCE(!e->grain))
1247                 e->grain = 1;
1248
1249         grain_bits = fls_long(e->grain - 1);
1250
1251         /* Report the error via the trace interface */
1252         if (IS_ENABLED(CONFIG_RAS))
1253                 trace_mc_event(type, e->msg, e->label, e->error_count,
1254                                mci->mc_idx, e->top_layer, e->mid_layer,
1255                                e->low_layer,
1256                                (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
1257                                grain_bits, e->syndrome, e->other_detail);
1258
1259         edac_raw_mc_handle_error(type, mci, e);
1260 }
1261 EXPORT_SYMBOL_GPL(edac_mc_handle_error);